mirror of
https://github.com/kanjitalk755/macemu.git
synced 2024-09-07 01:54:28 +00:00
Use fixed-size integer types, especially for 64-bit quantities. HP-UX for IPF
is essentially an ILP32 platform but machine registers are 64-bit wide. Make IA64_SET_GR() set the NaT bit at the same time as the register value.
This commit is contained in:
gbeauche
parent
b5ac45434a
commit
3615be1d4d
@ -1226,9 +1226,10 @@ static bool ix86_skip_instruction(SIGSEGV_REGISTER_TYPE * regs)
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// Decode and skip IA-64 instruction
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#if defined(__ia64__)
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typedef uint64_t ia64_bundle_t[2];
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#if defined(__linux__)
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// We can directly patch the slot number
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#define IA64_CAN_PATCH_IP_SLOT 1
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#define IA64_CAN_PATCH_IP_SLOT 1
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// Helper macros to access the machine context
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#define IA64_CONTEXT_TYPE struct sigcontext *
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#define IA64_CONTEXT scp
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@ -1236,9 +1237,18 @@ static bool ix86_skip_instruction(SIGSEGV_REGISTER_TYPE * regs)
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#define IA64_SET_IP(V) (IA64_CONTEXT->sc_ip = (V))
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#define IA64_GET_PR(P) ((IA64_CONTEXT->sc_pr >> (P)) & 1)
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#define IA64_GET_NAT(I) ((IA64_CONTEXT->sc_nat >> (I)) & 1)
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#define IA64_SET_NAT(I,V) (IA64_CONTEXT->sc_nat= (IA64_CONTEXT->sc_nat & ~(1ul << (I))) | (((unsigned long)!!(V)) << (I)))
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#define IA64_GET_GR(R) (IA64_CONTEXT->sc_gr[(R)])
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#define IA64_SET_GR(R,V) (IA64_CONTEXT->sc_gr[(R)] = (V))
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#define _IA64_SET_GR(R,V) (IA64_CONTEXT->sc_gr[(R)] = (V))
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#define _IA64_SET_NAT(I,V) (IA64_CONTEXT->sc_nat = (IA64_CONTEXT->sc_nat & ~(1ull << (I))) | (((uint64_t)!!(V)) << (I)))
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#define IA64_SET_GR(R,V,N) (_IA64_SET_GR(R,V), _IA64_SET_NAT(R,N))
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// Load bundle (in little-endian)
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static inline void ia64_load_bundle(ia64_bundle_t bundle, uint64_t raw_ip)
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{
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uint64_t *ip = (uint64_t *)(raw_ip & ~3ull);
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bundle[0] = ip[0];
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bundle[1] = ip[1];
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}
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#endif
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// Instruction operations
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@ -1280,112 +1290,114 @@ const int IA64_N_OPERANDS = 4;
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// Decoded operand type
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struct ia64_operand_t {
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unsigned char commit; // commit result of operation to register file?
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unsigned char valid; // XXX: not really used, can be removed (debug)
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signed char index; // index of GPR, or -1 if immediate value
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unsigned char nat; // NaT state before operation
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unsigned long value; // register contents or immediate value
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uint8_t commit; // commit result of operation to register file?
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uint8_t valid; // XXX: not really used, can be removed (debug)
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int8_t index; // index of GPR, or -1 if immediate value
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uint8_t nat; // NaT state before operation
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uint64_t value; // register contents or immediate value
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};
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// Decoded instruction type
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struct ia64_instruction_t {
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unsigned char mnemo; // operation to perform
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unsigned char pred; // predicate register to check
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unsigned char no_memory; // used to emulated main fault instruction
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unsigned long inst; // the raw instruction bits (41-bit wide)
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uint8_t mnemo; // operation to perform
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uint8_t pred; // predicate register to check
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uint8_t no_memory; // used to emulated main fault instruction
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uint64_t inst; // the raw instruction bits (41-bit wide)
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ia64_operand_t operands[IA64_N_OPERANDS];
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};
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// Get immediate sign-bit
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static inline int ia64_inst_get_sbit(unsigned long inst)
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static inline int ia64_inst_get_sbit(uint64_t inst)
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{
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return (inst >> 36) & 1;
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}
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// Get 8-bit immediate value (A3, A8, I27, M30)
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static inline unsigned long ia64_inst_get_imm8(unsigned long inst)
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static inline uint64_t ia64_inst_get_imm8(uint64_t inst)
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{
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unsigned long value = (inst >> 13) & 0x7ful;
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uint64_t value = (inst >> 13) & 0x7full;
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if (ia64_inst_get_sbit(inst))
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value |= ~0x7ful;
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value |= ~0x7full;
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return value;
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}
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// Get 9-bit immediate value (M3)
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static inline unsigned long ia64_inst_get_imm9b(unsigned long inst)
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static inline uint64_t ia64_inst_get_imm9b(uint64_t inst)
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{
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unsigned long value = (((inst >> 27) & 1) << 7) | ((inst >> 13) & 0x7f);
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uint64_t value = (((inst >> 27) & 1) << 7) | ((inst >> 13) & 0x7f);
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if (ia64_inst_get_sbit(inst))
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value |= ~0xfful;
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value |= ~0xffull;
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return value;
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}
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// Get 9-bit immediate value (M5)
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static inline unsigned long ia64_inst_get_imm9a(unsigned long inst)
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static inline uint64_t ia64_inst_get_imm9a(uint64_t inst)
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{
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unsigned long value = (((inst >> 27) & 1) << 7) | ((inst >> 6) & 0x7f);
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uint64_t value = (((inst >> 27) & 1) << 7) | ((inst >> 6) & 0x7f);
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if (ia64_inst_get_sbit(inst))
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value |= ~0xfful;
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value |= ~0xffull;
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return value;
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}
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// Get 14-bit immediate value (A4)
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static inline unsigned long ia64_inst_get_imm14(unsigned long inst)
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static inline uint64_t ia64_inst_get_imm14(uint64_t inst)
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{
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unsigned long value = (((inst >> 27) & 0x3f) << 7) | (inst & 0x7f);
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uint64_t value = (((inst >> 27) & 0x3f) << 7) | (inst & 0x7f);
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if (ia64_inst_get_sbit(inst))
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value |= ~0x1fful;
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value |= ~0x1ffull;
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return value;
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}
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// Get 22-bit immediate value (A5)
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static inline unsigned long ia64_inst_get_imm22(unsigned long inst)
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static inline uint64_t ia64_inst_get_imm22(uint64_t inst)
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{
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unsigned long value = ((((inst >> 22) & 0x1f) << 16) |
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(((inst >> 27) & 0x1ff) << 7) |
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(inst & 0x7f));
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uint64_t value = ((((inst >> 22) & 0x1f) << 16) |
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(((inst >> 27) & 0x1ff) << 7) |
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(inst & 0x7f));
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if (ia64_inst_get_sbit(inst))
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value |= ~0x1ffffful;
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value |= ~0x1fffffull;
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return value;
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}
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// Get 21-bit immediate value (I19)
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static inline unsigned long ia64_inst_get_imm21(unsigned long inst)
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static inline uint64_t ia64_inst_get_imm21(uint64_t inst)
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{
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return (((inst >> 36) & 1) << 20) | ((inst >> 6) & 0xfffff);
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}
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// Get 2-bit count value (A2)
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static inline int ia64_inst_get_count2(unsigned long inst)
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static inline int ia64_inst_get_count2(uint64_t inst)
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{
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return (inst >> 27) & 0x3;
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}
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// Get bundle template
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static inline unsigned int ia64_get_template(unsigned long raw_ip)
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static inline unsigned int ia64_get_template(uint64_t ip)
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{
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unsigned long *ip = (unsigned long *)(raw_ip & ~3ul);
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return ip[0] & 0x1f;
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ia64_bundle_t bundle;
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ia64_load_bundle(bundle, ip);
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return bundle[0] & 0x1f;
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}
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// Get specified instruction in bundle
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static unsigned long ia64_get_instruction(unsigned long raw_ip, int slot)
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static uint64_t ia64_get_instruction(uint64_t ip, int slot)
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{
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unsigned long inst;
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unsigned long *ip = (unsigned long *)(raw_ip & ~3ul);
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uint64_t inst;
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ia64_bundle_t bundle;
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ia64_load_bundle(bundle, ip);
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#if DEBUG
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printf("Bundle: %016lx%016lx\n", ip[1], ip[0]);
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printf("Bundle: %016llx%016llx\n", bundle[1], bundle[0]);
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#endif
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switch (slot) {
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case 0:
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inst = (ip[0] >> 5) & 0x1fffffffffful;
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inst = (bundle[0] >> 5) & 0x1ffffffffffull;
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break;
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case 1:
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inst = ((ip[1] & 0x7ffffful) << 18) | ((ip[0] >> 46) & 0x3fffful);
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inst = ((bundle[1] & 0x7fffffull) << 18) | ((bundle[0] >> 46) & 0x3ffffull);
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break;
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case 2:
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inst = (ip[1] >> 23) & 0x1fffffffffful;
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inst = (bundle[1] >> 23) & 0x1ffffffffffull;
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break;
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case 3:
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fprintf(stderr, "ERROR: ia64_get_instruction(), invalid slot number %d\n", slot);
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@ -1394,7 +1406,7 @@ static unsigned long ia64_get_instruction(unsigned long raw_ip, int slot)
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}
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#if DEBUG
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printf(" Instruction %d: 0x%016lx\n", slot, inst);
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printf(" Instruction %d: 0x%016llx\n", slot, inst);
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#endif
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return inst;
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}
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@ -1678,8 +1690,8 @@ static bool ia64_emulate_instruction(ia64_instruction_t *inst, IA64_CONTEXT_TYPE
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if (inst->pred && !IA64_GET_PR(inst->pred))
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return true;
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unsigned char nat, nat2;
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unsigned long dst, dst2, src1, src2, src3;
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uint8_t nat, nat2;
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uint64_t dst, dst2, src1, src2, src3;
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switch (inst->mnemo) {
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case IA64_INST_NOP:
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@ -1716,12 +1728,12 @@ static bool ia64_emulate_instruction(ia64_instruction_t *inst, IA64_CONTEXT_TYPE
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case IA64_INST_ZXT4:
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src1 = inst->operands[1].value;
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switch (inst->mnemo) {
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case IA64_INST_SXT1: dst = (signed long)(signed char)src1; break;
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case IA64_INST_SXT2: dst = (signed long)(signed short)src1; break;
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case IA64_INST_SXT4: dst = (signed long)(signed int)src1; break;
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case IA64_INST_ZXT1: dst = (unsigned char)src1; break;
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case IA64_INST_ZXT2: dst = (unsigned short)src1; break;
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case IA64_INST_ZXT4: dst = (unsigned int)src1; break;
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case IA64_INST_SXT1: dst = (int64_t)(int8_t)src1; break;
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case IA64_INST_SXT2: dst = (int64_t)(int16_t)src1; break;
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case IA64_INST_SXT4: dst = (int64_t)(int32_t)src1; break;
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case IA64_INST_ZXT1: dst = (uint8_t)src1; break;
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case IA64_INST_ZXT2: dst = (uint16_t)src1; break;
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case IA64_INST_ZXT4: dst = (uint32_t)src1; break;
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}
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inst->operands[0].commit = true;
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inst->operands[0].value = dst;
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@ -1744,10 +1756,10 @@ static bool ia64_emulate_instruction(ia64_instruction_t *inst, IA64_CONTEXT_TYPE
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dst = 0;
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else {
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switch (inst->mnemo) {
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case IA64_INST_LD1: case IA64_INST_LD1_UPDATE: dst = *((unsigned char *)src1); break;
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case IA64_INST_LD2: case IA64_INST_LD2_UPDATE: dst = *((unsigned short *)src1); break;
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case IA64_INST_LD4: case IA64_INST_LD4_UPDATE: dst = *((unsigned int *)src1); break;
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case IA64_INST_LD8: case IA64_INST_LD8_UPDATE: dst = *((unsigned long *)src1); break;
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case IA64_INST_LD1: case IA64_INST_LD1_UPDATE: dst = *((uint8_t *)src1); break;
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case IA64_INST_LD2: case IA64_INST_LD2_UPDATE: dst = *((uint16_t *)src1); break;
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case IA64_INST_LD4: case IA64_INST_LD4_UPDATE: dst = *((uint32_t *)src1); break;
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case IA64_INST_LD8: case IA64_INST_LD8_UPDATE: dst = *((uint64_t *)src1); break;
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}
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}
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inst->operands[0].commit = true;
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@ -1772,10 +1784,10 @@ static bool ia64_emulate_instruction(ia64_instruction_t *inst, IA64_CONTEXT_TYPE
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src1 = inst->operands[1].value;
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if (!inst->no_memory) {
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switch (inst->mnemo) {
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case IA64_INST_ST1: case IA64_INST_ST1_UPDATE: *((unsigned char *)dst) = src1; break;
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case IA64_INST_ST2: case IA64_INST_ST2_UPDATE: *((unsigned short *)dst) = src1; break;
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case IA64_INST_ST4: case IA64_INST_ST4_UPDATE: *((unsigned int *)dst) = src1; break;
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case IA64_INST_ST8: case IA64_INST_ST8_UPDATE: *((unsigned long *)dst) = src1; break;
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case IA64_INST_ST1: case IA64_INST_ST1_UPDATE: *((uint8_t *)dst) = src1; break;
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case IA64_INST_ST2: case IA64_INST_ST2_UPDATE: *((uint16_t *)dst) = src1; break;
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case IA64_INST_ST4: case IA64_INST_ST4_UPDATE: *((uint32_t *)dst) = src1; break;
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case IA64_INST_ST8: case IA64_INST_ST8_UPDATE: *((uint64_t *)dst) = src1; break;
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}
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}
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inst->operands[0].value = dst2;
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@ -1791,13 +1803,12 @@ static bool ia64_emulate_instruction(ia64_instruction_t *inst, IA64_CONTEXT_TYPE
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continue;
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if (op.index == -1)
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return false; // XXX: internal error
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IA64_SET_GR(op.index, op.value);
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IA64_SET_NAT(op.index, op.nat);
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IA64_SET_GR(op.index, op.value, op.nat);
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}
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return true;
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}
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static bool ia64_emulate_instruction(unsigned long raw_inst, IA64_CONTEXT_TYPE IA64_CONTEXT)
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static bool ia64_emulate_instruction(uint64_t raw_inst, IA64_CONTEXT_TYPE IA64_CONTEXT)
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{
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ia64_instruction_t inst;
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memset(&inst, 0, sizeof(inst));
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@ -1809,9 +1820,9 @@ static bool ia64_emulate_instruction(unsigned long raw_inst, IA64_CONTEXT_TYPE I
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static bool ia64_skip_instruction(IA64_CONTEXT_TYPE IA64_CONTEXT)
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{
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unsigned long ip = IA64_GET_IP();
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uint64_t ip = IA64_GET_IP();
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#if DEBUG
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printf("IP: 0x%016lx\n", ip);
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printf("IP: 0x%016llx\n", ip);
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#if 0
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printf(" Template 0x%02x\n", ia64_get_template(ip));
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ia64_get_instruction(ip, 0);
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@ -1929,12 +1940,12 @@ static bool ia64_skip_instruction(IA64_CONTEXT_TYPE IA64_CONTEXT)
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#if IA64_CAN_PATCH_IP_SLOT
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if ((slot = ip & 3) < 2)
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IA64_SET_IP((ip & ~3ul) + (slot + 1));
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IA64_SET_IP((ip & ~3ull) + (slot + 1));
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else
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#endif
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IA64_SET_IP((ip & ~3ul) + 16);
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IA64_SET_IP((ip & ~3ull) + 16);
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#if DEBUG
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printf("IP: 0x%016lx\n", IA64_GET_IP());
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printf("IP: 0x%016llx\n", IA64_GET_IP());
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#endif
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return true;
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}
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