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https://github.com/kanjitalk755/macemu.git
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Fix CMOV emulation on x86_64 in case the CPU doesn't support that instruction
(which is very unlikely).
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@ -528,12 +528,10 @@ LOWFUNC(READ,NONE,3,raw_cmov_l_rr,(RW4 d, R4 s, IMM cc))
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if (have_cmov)
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if (have_cmov)
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CMOVLrr(cc, s, d);
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CMOVLrr(cc, s, d);
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else { /* replacement using branch and mov */
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else { /* replacement using branch and mov */
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#if defined(__x86_64__)
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int8 *target_p = (int8 *)x86_get_target() + 1;
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write_log("x86-64 implementations are bound to have CMOV!\n");
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JCCSii(cc^1, 0);
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abort();
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#endif
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JCCSii(cc^1, 2);
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MOVLrr(s, d);
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MOVLrr(s, d);
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*target_p = (uintptr)x86_get_target() - ((uintptr)target_p + 1);
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}
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}
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}
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}
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LENDFUNC(READ,NONE,3,raw_cmov_l_rr,(RW4 d, R4 s, IMM cc))
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LENDFUNC(READ,NONE,3,raw_cmov_l_rr,(RW4 d, R4 s, IMM cc))
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@ -701,12 +699,10 @@ LOWFUNC(NONE,READ,5,raw_cmov_l_rm_indexed,(W4 d, IMM base, R4 index, IMM factor,
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if (have_cmov)
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if (have_cmov)
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ADDR32 CMOVLmr(cond, base, X86_NOREG, index, factor, d);
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ADDR32 CMOVLmr(cond, base, X86_NOREG, index, factor, d);
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else { /* replacement using branch and mov */
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else { /* replacement using branch and mov */
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#if defined(__x86_64__)
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int8 *target_p = (int8 *)x86_get_target() + 1;
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write_log("x86-64 implementations are bound to have CMOV!\n");
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JCCSii(cond^1, 0);
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abort();
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#endif
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JCCSii(cond^1, 7);
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ADDR32 MOVLmr(base, X86_NOREG, index, factor, d);
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ADDR32 MOVLmr(base, X86_NOREG, index, factor, d);
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*target_p = (uintptr)x86_get_target() - ((uintptr)target_p + 1);
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}
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}
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}
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}
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LENDFUNC(NONE,READ,5,raw_cmov_l_rm_indexed,(W4 d, IMM base, R4 index, IMM factor, IMM cond))
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LENDFUNC(NONE,READ,5,raw_cmov_l_rm_indexed,(W4 d, IMM base, R4 index, IMM factor, IMM cond))
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@ -716,12 +712,10 @@ LOWFUNC(NONE,READ,3,raw_cmov_l_rm,(W4 d, IMM mem, IMM cond))
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if (have_cmov)
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if (have_cmov)
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CMOVLmr(cond, mem, X86_NOREG, X86_NOREG, 1, d);
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CMOVLmr(cond, mem, X86_NOREG, X86_NOREG, 1, d);
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else { /* replacement using branch and mov */
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else { /* replacement using branch and mov */
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#if defined(__x86_64__)
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int8 *target_p = (int8 *)x86_get_target() + 1;
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write_log("x86-64 implementations are bound to have CMOV!\n");
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JCCSii(cond^1, 0);
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abort();
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#endif
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JCCSii(cond^1, 6);
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MOVLmr(mem, X86_NOREG, X86_NOREG, 1, d);
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MOVLmr(mem, X86_NOREG, X86_NOREG, 1, d);
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*target_p = (uintptr)x86_get_target() - ((uintptr)target_p + 1);
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}
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}
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}
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}
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LENDFUNC(NONE,READ,3,raw_cmov_l_rm,(W4 d, IMM mem, IMM cond))
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LENDFUNC(NONE,READ,3,raw_cmov_l_rm,(W4 d, IMM mem, IMM cond))
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@ -3936,6 +3930,12 @@ raw_init_cpu(void)
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/* Have CMOV support? */
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/* Have CMOV support? */
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have_cmov = c->x86_hwcap & (1 << 15);
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have_cmov = c->x86_hwcap & (1 << 15);
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#if defined(__x86_64__)
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if (!have_cmov) {
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write_log("x86-64 implementations are bound to have CMOV!\n");
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abort();
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}
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#endif
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/* Can the host CPU suffer from partial register stalls? */
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/* Can the host CPU suffer from partial register stalls? */
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have_rat_stall = (c->x86_vendor == X86_VENDOR_INTEL);
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have_rat_stall = (c->x86_vendor == X86_VENDOR_INTEL);
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