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https://github.com/kanjitalk755/macemu.git
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- FP endianness is now testing at configure time
- Fix junk introduced in previous rev for extract_extended()
This commit is contained in:
gbeauche
parent
e59e4904d3
commit
48986febc6
@ -79,24 +79,6 @@
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/* Global FPU context */
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fpu_t fpu;
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/* -------------------------------------------------------------------------- */
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/* --- Endianness --- */
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/* -------------------------------------------------------------------------- */
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// Taken from glibc 2.1.x: endian.h
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#define UAE_LITTLE_ENDIAN 1234
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#define UAE_BIG_ENDIAN 4321
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#if WORDS_BIGENDIAN
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#define UAE_BYTE_ORDER UAE_BIG_ENDIAN
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#else
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#define UAE_BYTE_ORDER UAE_LITTLE_ENDIAN
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#endif
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// Some machines may need to use a different endianness for floating point values
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// e.g. ARM in which case it is big endian
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#define UAE_FLOAT_WORD_ORDER UAE_BYTE_ORDER
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/* -------------------------------------------------------------------------- */
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/* --- Scopes Definition --- */
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/* -------------------------------------------------------------------------- */
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@ -394,6 +376,7 @@ PRIVATE inline void FFPU extract_extended(fpu_register const & src,
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*wrd3 = srp->ieee.mantissa1 << 11;
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#else
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// FIXME: USE_QUAD_DOUBLE
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uae_u32 *p = (uae_u32 *)&src;
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#ifdef WORDS_BIGENDIAN
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*wrd1 = p[0];
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*wrd2 = p[1];
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@ -103,32 +103,30 @@ union fpu_single_shape {
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/* This is the IEEE 754 single-precision format. */
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struct {
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#if UAE_BYTE_ORDER == UAE_BIG_ENDIAN
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#ifdef WORDS_BIGENDIAN
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unsigned int negative:1;
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unsigned int exponent:8;
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unsigned int mantissa:23;
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#endif /* Big endian. */
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#if UAE_BYTE_ORDER == UAE_LITTLE_ENDIAN
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#else
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unsigned int mantissa:23;
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unsigned int exponent:8;
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unsigned int negative:1;
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#endif /* Little endian. */
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#endif
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} ieee;
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/* This format makes it easier to see if a NaN is a signalling NaN. */
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struct {
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#if UAE_BYTE_ORDER == UAE_BIG_ENDIAN
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#ifdef WORDS_BIGENDIAN
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unsigned int negative:1;
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unsigned int exponent:8;
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unsigned int quiet_nan:1;
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unsigned int mantissa:22;
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#endif /* Big endian. */
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#if UAE_BYTE_ORDER == UAE_LITTLE_ENDIAN
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#else
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unsigned int mantissa:22;
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unsigned int quiet_nan:1;
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unsigned int exponent:8;
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unsigned int negative:1;
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#endif /* Little endian. */
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#endif
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} ieee_nan;
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};
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@ -138,15 +136,14 @@ union fpu_double_shape {
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/* This is the IEEE 754 double-precision format. */
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struct {
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#if UAE_BYTE_ORDER == UAE_BIG_ENDIAN
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#ifdef WORDS_BIGENDIAN
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unsigned int negative:1;
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unsigned int exponent:11;
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/* Together these comprise the mantissa. */
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unsigned int mantissa0:20;
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unsigned int mantissa1:32;
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#endif /* Big endian. */
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#if UAE_BYTE_ORDER == UAE_LITTLE_ENDIAN
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# if UAE_FLOAT_WORD_ORDER == UAE_BIG_ENDIAN
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#else
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# if HOST_FLOAT_WORDS_BIG_ENDIAN
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unsigned int mantissa0:20;
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unsigned int exponent:11;
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unsigned int negative:1;
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@ -158,12 +155,12 @@ union fpu_double_shape {
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unsigned int exponent:11;
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unsigned int negative:1;
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# endif
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#endif /* Little endian. */
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#endif
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} ieee;
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/* This format makes it easier to see if a NaN is a signalling NaN. */
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struct {
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#if UAE_BYTE_ORDER == UAE_BIG_ENDIAN
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#ifdef WORDS_BIGENDIAN
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unsigned int negative:1;
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unsigned int exponent:11;
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unsigned int quiet_nan:1;
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@ -171,7 +168,7 @@ union fpu_double_shape {
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unsigned int mantissa0:19;
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unsigned int mantissa1:32;
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#else
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# if UAE_FLOAT_WORD_ORDER == UAE_BIG_ENDIAN
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# if HOST_FLOAT_WORDS_BIG_ENDIAN
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unsigned int mantissa0:19;
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unsigned int quiet_nan:1;
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unsigned int exponent:11;
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@ -190,7 +187,7 @@ union fpu_double_shape {
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/* This format is used to extract the sign_exponent and mantissa parts only */
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struct {
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#if UAE_FLOAT_WORD_ORDER == UAE_BIG_ENDIAN
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#if HOST_FLOAT_WORDS_BIG_ENDIAN
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unsigned int msw:32;
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unsigned int lsw:32;
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#else
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@ -207,15 +204,14 @@ union fpu_extended_shape {
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/* This is the IEEE 854 double-extended-precision format. */
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struct {
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#if UAE_BYTE_ORDER == UAE_BIG_ENDIAN
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#ifdef WORDS_BIGENDIAN
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unsigned int negative:1;
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unsigned int exponent:15;
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unsigned int empty:16;
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unsigned int mantissa0:32;
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unsigned int mantissa1:32;
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#endif
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#if UAE_BYTE_ORDER == UAE_LITTLE_ENDIAN
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# if UAE_FLOAT_WORD_ORDER == UAE_BIG_ENDIAN
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#else
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# if HOST_FLOAT_WORDS_BIG_ENDIAN
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unsigned int exponent:15;
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unsigned int negative:1;
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unsigned int empty:16;
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@ -233,7 +229,7 @@ union fpu_extended_shape {
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/* This is for NaNs in the IEEE 854 double-extended-precision format. */
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struct {
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#if UAE_BYTE_ORDER == UAE_BIG_ENDIAN
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#ifdef WORDS_BIGENDIAN
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unsigned int negative:1;
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unsigned int exponent:15;
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unsigned int empty:16;
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@ -241,9 +237,8 @@ union fpu_extended_shape {
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unsigned int quiet_nan:1;
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unsigned int mantissa0:30;
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unsigned int mantissa1:32;
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#endif
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#if UAE_BYTE_ORDER == UAE_LITTLE_ENDIAN
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# if UAE_FLOAT_WORD_ORDER == UAE_BIG_ENDIAN
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#else
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# if HOST_FLOAT_WORDS_BIG_ENDIAN
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unsigned int exponent:15;
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unsigned int negative:1;
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unsigned int empty:16;
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@ -265,7 +260,7 @@ union fpu_extended_shape {
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/* This format is used to extract the sign_exponent and mantissa parts only */
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struct {
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#if UAE_FLOAT_WORD_ORDER == UAE_BIG_ENDIAN
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#if HOST_FLOAT_WORDS_BIG_ENDIAN
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unsigned int sign_exponent:16;
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unsigned int empty:16;
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unsigned int msw:32;
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@ -287,7 +282,7 @@ union fpu_extended_shape {
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/* This is the IEEE 854 quad-precision format. */
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struct {
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#if UAE_BYTE_ORDER == UAE_BIG_ENDIAN
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#ifdef WORDS_BIGENDIAN
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unsigned int negative:1;
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unsigned int exponent:15;
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unsigned int mantissa0:16;
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@ -306,7 +301,7 @@ union fpu_extended_shape {
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/* This is for NaNs in the IEEE 854 quad-precision format. */
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struct {
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#if UAE_BYTE_ORDER == UAE_BIG_ENDIAN
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#ifdef WORDS_BIGENDIAN
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unsigned int negative:1;
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unsigned int exponent:15;
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unsigned int quiet_nan:1;
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@ -326,7 +321,7 @@ union fpu_extended_shape {
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} ieee_nan;
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/* This format is used to extract the sign_exponent and mantissa parts only */
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#if UAE_FLOAT_WORD_ORDER == UAE_BIG_ENDIAN
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#if HOST_FLOAT_WORDS_BIG_ENDIAN
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struct {
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uae_u64 msw;
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uae_u64 lsw;
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@ -106,6 +106,10 @@ typedef uae_f32 fpu_single;
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#elif defined(FPU_IEEE)
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#if HOST_FLOAT_FORMAT != IEEE_FLOAT_FORMAT
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#error "No IEEE float format, you lose."
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#endif
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/* 4-byte floats */
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#if SIZEOF_FLOAT == 4
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typedef float uae_f32;
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