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- FP endianness is now testing at configure time

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- Fix junk introduced in previous rev for extract_extended()
This commit is contained in:
gbeauche 2002-09-16 12:01:38 +00:00
parent e59e4904d3
commit 48986febc6
3 changed files with 28 additions and 46 deletions
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19
BasiliskII/src/uae_cpu/fpu/fpu_ieee.cpp
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@ -79,24 +79,6 @@
/* Global FPU context */ /* Global FPU context */
fpu_t fpu; fpu_t fpu;
/* -------------------------------------------------------------------------- */
/* --- Endianness --- */
/* -------------------------------------------------------------------------- */
// Taken from glibc 2.1.x: endian.h
#define UAE_LITTLE_ENDIAN 1234
#define UAE_BIG_ENDIAN 4321
#if WORDS_BIGENDIAN
#define UAE_BYTE_ORDER UAE_BIG_ENDIAN
#else
#define UAE_BYTE_ORDER UAE_LITTLE_ENDIAN
#endif
// Some machines may need to use a different endianness for floating point values
// e.g. ARM in which case it is big endian
#define UAE_FLOAT_WORD_ORDER UAE_BYTE_ORDER
/* -------------------------------------------------------------------------- */ /* -------------------------------------------------------------------------- */
/* --- Scopes Definition --- */ /* --- Scopes Definition --- */
/* -------------------------------------------------------------------------- */ /* -------------------------------------------------------------------------- */
@ -394,6 +376,7 @@ PRIVATE inline void FFPU extract_extended(fpu_register const & src,
*wrd3 = srp->ieee.mantissa1 << 11; *wrd3 = srp->ieee.mantissa1 << 11;
#else #else
// FIXME: USE_QUAD_DOUBLE // FIXME: USE_QUAD_DOUBLE
uae_u32 *p = (uae_u32 *)&src;
#ifdef WORDS_BIGENDIAN #ifdef WORDS_BIGENDIAN
*wrd1 = p[0]; *wrd1 = p[0];
*wrd2 = p[1]; *wrd2 = p[1];

51
BasiliskII/src/uae_cpu/fpu/mathlib.h
View File

@ -103,32 +103,30 @@ union fpu_single_shape {
/* This is the IEEE 754 single-precision format. */ /* This is the IEEE 754 single-precision format. */
struct { struct {
#if UAE_BYTE_ORDER == UAE_BIG_ENDIAN #ifdef WORDS_BIGENDIAN
unsigned int negative:1; unsigned int negative:1;
unsigned int exponent:8; unsigned int exponent:8;
unsigned int mantissa:23; unsigned int mantissa:23;
#endif /* Big endian. */ #else
#if UAE_BYTE_ORDER == UAE_LITTLE_ENDIAN
unsigned int mantissa:23; unsigned int mantissa:23;
unsigned int exponent:8; unsigned int exponent:8;
unsigned int negative:1; unsigned int negative:1;
#endif /* Little endian. */ #endif
} ieee; } ieee;
/* This format makes it easier to see if a NaN is a signalling NaN. */ /* This format makes it easier to see if a NaN is a signalling NaN. */
struct { struct {
#if UAE_BYTE_ORDER == UAE_BIG_ENDIAN #ifdef WORDS_BIGENDIAN
unsigned int negative:1; unsigned int negative:1;
unsigned int exponent:8; unsigned int exponent:8;
unsigned int quiet_nan:1; unsigned int quiet_nan:1;
unsigned int mantissa:22; unsigned int mantissa:22;
#endif /* Big endian. */ #else
#if UAE_BYTE_ORDER == UAE_LITTLE_ENDIAN
unsigned int mantissa:22; unsigned int mantissa:22;
unsigned int quiet_nan:1; unsigned int quiet_nan:1;
unsigned int exponent:8; unsigned int exponent:8;
unsigned int negative:1; unsigned int negative:1;
#endif /* Little endian. */ #endif
} ieee_nan; } ieee_nan;
}; };
@ -138,15 +136,14 @@ union fpu_double_shape {
/* This is the IEEE 754 double-precision format. */ /* This is the IEEE 754 double-precision format. */
struct { struct {
#if UAE_BYTE_ORDER == UAE_BIG_ENDIAN #ifdef WORDS_BIGENDIAN
unsigned int negative:1; unsigned int negative:1;
unsigned int exponent:11; unsigned int exponent:11;
/* Together these comprise the mantissa. */ /* Together these comprise the mantissa. */
unsigned int mantissa0:20; unsigned int mantissa0:20;
unsigned int mantissa1:32; unsigned int mantissa1:32;
#endif /* Big endian. */ #else
#if UAE_BYTE_ORDER == UAE_LITTLE_ENDIAN # if HOST_FLOAT_WORDS_BIG_ENDIAN
# if UAE_FLOAT_WORD_ORDER == UAE_BIG_ENDIAN
unsigned int mantissa0:20; unsigned int mantissa0:20;
unsigned int exponent:11; unsigned int exponent:11;
unsigned int negative:1; unsigned int negative:1;
@ -158,12 +155,12 @@ union fpu_double_shape {
unsigned int exponent:11; unsigned int exponent:11;
unsigned int negative:1; unsigned int negative:1;
# endif # endif
#endif /* Little endian. */ #endif
} ieee; } ieee;
/* This format makes it easier to see if a NaN is a signalling NaN. */ /* This format makes it easier to see if a NaN is a signalling NaN. */
struct { struct {
#if UAE_BYTE_ORDER == UAE_BIG_ENDIAN #ifdef WORDS_BIGENDIAN
unsigned int negative:1; unsigned int negative:1;
unsigned int exponent:11; unsigned int exponent:11;
unsigned int quiet_nan:1; unsigned int quiet_nan:1;
@ -171,7 +168,7 @@ union fpu_double_shape {
unsigned int mantissa0:19; unsigned int mantissa0:19;
unsigned int mantissa1:32; unsigned int mantissa1:32;
#else #else
# if UAE_FLOAT_WORD_ORDER == UAE_BIG_ENDIAN # if HOST_FLOAT_WORDS_BIG_ENDIAN
unsigned int mantissa0:19; unsigned int mantissa0:19;
unsigned int quiet_nan:1; unsigned int quiet_nan:1;
unsigned int exponent:11; unsigned int exponent:11;
@ -190,7 +187,7 @@ union fpu_double_shape {
/* This format is used to extract the sign_exponent and mantissa parts only */ /* This format is used to extract the sign_exponent and mantissa parts only */
struct { struct {
#if UAE_FLOAT_WORD_ORDER == UAE_BIG_ENDIAN #if HOST_FLOAT_WORDS_BIG_ENDIAN
unsigned int msw:32; unsigned int msw:32;
unsigned int lsw:32; unsigned int lsw:32;
#else #else
@ -207,15 +204,14 @@ union fpu_extended_shape {
/* This is the IEEE 854 double-extended-precision format. */ /* This is the IEEE 854 double-extended-precision format. */
struct { struct {
#if UAE_BYTE_ORDER == UAE_BIG_ENDIAN #ifdef WORDS_BIGENDIAN
unsigned int negative:1; unsigned int negative:1;
unsigned int exponent:15; unsigned int exponent:15;
unsigned int empty:16; unsigned int empty:16;
unsigned int mantissa0:32; unsigned int mantissa0:32;
unsigned int mantissa1:32; unsigned int mantissa1:32;
#endif #else
#if UAE_BYTE_ORDER == UAE_LITTLE_ENDIAN # if HOST_FLOAT_WORDS_BIG_ENDIAN
# if UAE_FLOAT_WORD_ORDER == UAE_BIG_ENDIAN
unsigned int exponent:15; unsigned int exponent:15;
unsigned int negative:1; unsigned int negative:1;
unsigned int empty:16; unsigned int empty:16;
@ -233,7 +229,7 @@ union fpu_extended_shape {
/* This is for NaNs in the IEEE 854 double-extended-precision format. */ /* This is for NaNs in the IEEE 854 double-extended-precision format. */
struct { struct {
#if UAE_BYTE_ORDER == UAE_BIG_ENDIAN #ifdef WORDS_BIGENDIAN
unsigned int negative:1; unsigned int negative:1;
unsigned int exponent:15; unsigned int exponent:15;
unsigned int empty:16; unsigned int empty:16;
@ -241,9 +237,8 @@ union fpu_extended_shape {
unsigned int quiet_nan:1; unsigned int quiet_nan:1;
unsigned int mantissa0:30; unsigned int mantissa0:30;
unsigned int mantissa1:32; unsigned int mantissa1:32;
#endif #else
#if UAE_BYTE_ORDER == UAE_LITTLE_ENDIAN # if HOST_FLOAT_WORDS_BIG_ENDIAN
# if UAE_FLOAT_WORD_ORDER == UAE_BIG_ENDIAN
unsigned int exponent:15; unsigned int exponent:15;
unsigned int negative:1; unsigned int negative:1;
unsigned int empty:16; unsigned int empty:16;
@ -265,7 +260,7 @@ union fpu_extended_shape {
/* This format is used to extract the sign_exponent and mantissa parts only */ /* This format is used to extract the sign_exponent and mantissa parts only */
struct { struct {
#if UAE_FLOAT_WORD_ORDER == UAE_BIG_ENDIAN #if HOST_FLOAT_WORDS_BIG_ENDIAN
unsigned int sign_exponent:16; unsigned int sign_exponent:16;
unsigned int empty:16; unsigned int empty:16;
unsigned int msw:32; unsigned int msw:32;
@ -287,7 +282,7 @@ union fpu_extended_shape {
/* This is the IEEE 854 quad-precision format. */ /* This is the IEEE 854 quad-precision format. */
struct { struct {
#if UAE_BYTE_ORDER == UAE_BIG_ENDIAN #ifdef WORDS_BIGENDIAN
unsigned int negative:1; unsigned int negative:1;
unsigned int exponent:15; unsigned int exponent:15;
unsigned int mantissa0:16; unsigned int mantissa0:16;
@ -306,7 +301,7 @@ union fpu_extended_shape {
/* This is for NaNs in the IEEE 854 quad-precision format. */ /* This is for NaNs in the IEEE 854 quad-precision format. */
struct { struct {
#if UAE_BYTE_ORDER == UAE_BIG_ENDIAN #ifdef WORDS_BIGENDIAN
unsigned int negative:1; unsigned int negative:1;
unsigned int exponent:15; unsigned int exponent:15;
unsigned int quiet_nan:1; unsigned int quiet_nan:1;
@ -326,7 +321,7 @@ union fpu_extended_shape {
} ieee_nan; } ieee_nan;
/* This format is used to extract the sign_exponent and mantissa parts only */ /* This format is used to extract the sign_exponent and mantissa parts only */
#if UAE_FLOAT_WORD_ORDER == UAE_BIG_ENDIAN #if HOST_FLOAT_WORDS_BIG_ENDIAN
struct { struct {
uae_u64 msw; uae_u64 msw;
uae_u64 lsw; uae_u64 lsw;

4
BasiliskII/src/uae_cpu/fpu/types.h
View File

@ -106,6 +106,10 @@ typedef uae_f32 fpu_single;
#elif defined(FPU_IEEE) #elif defined(FPU_IEEE)
#if HOST_FLOAT_FORMAT != IEEE_FLOAT_FORMAT
#error "No IEEE float format, you lose."
#endif
/* 4-byte floats */ /* 4-byte floats */
#if SIZEOF_FLOAT == 4 #if SIZEOF_FLOAT == 4
typedef float uae_f32; typedef float uae_f32;