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fix build on 64-bit platforms with gcc3.4, especially on x86_64

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This commit is contained in:
gbeauche 2004-11-10 06:47:17 +00:00
parent 20f5f531ca
commit 5d79c5a5f2
2 changed files with 35 additions and 32 deletions
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25
SheepShaver/src/kpx_cpu/src/cpu/jit/basic-dyngen-ops.cpp
View File

@ -32,21 +32,19 @@ register basic_cpu *CPU asm(REG_CPU);
#define CPU ((basic_cpu *)CPUPARAM)
#endif
#if SIZEOF_VOID_P == 8
#define REG32(X) ((uint32)X)
#define DYNGEN_DEFINE_GLOBAL_REGISTER(REG) \
register uintptr reg_##REG asm(REG_##REG); \
register uint32 REG asm(REG_##REG)
#else
#define REG32(X) X
#define DYNGEN_DEFINE_GLOBAL_REGISTER(REG) \
register uint32 REG asm(REG_##REG)
#endif
#define A0 REG32(reg_A0)
register uintptr reg_A0 asm(REG_A0);
#define T0 REG32(reg_T0)
register uintptr reg_T0 asm(REG_T0);
#define T1 REG32(reg_T1)
register uintptr reg_T1 asm(REG_T1);
#define T2 REG32(reg_T2)
register uintptr reg_T2 asm(REG_T2);
DYNGEN_DEFINE_GLOBAL_REGISTER(A0);
DYNGEN_DEFINE_GLOBAL_REGISTER(T0);
DYNGEN_DEFINE_GLOBAL_REGISTER(T1);
DYNGEN_DEFINE_GLOBAL_REGISTER(T2);
#ifdef REG_T3
#define T3 REG32(reg_T3)
register uintptr reg_T3 asm(REG_T3);
DYNGEN_DEFINE_GLOBAL_REGISTER(T3);
#endif
@ -348,7 +346,8 @@ void OPPROTO op_jmp_A0(void)
// Register calling conventions based arches don't need a stack frame
#if defined(__powerpc__) || defined(__x86_64__)
#define DEFINE_OP(NAME, CODE) \
static void OPPROTO impl_##NAME(void) \
static void OPPROTO impl_##NAME(void) __attribute__((used)); \
void OPPROTO impl_##NAME(void) \
{ \
asm volatile (#NAME ":"); \
CODE; \

42
SheepShaver/src/kpx_cpu/src/cpu/ppc/ppc-dyngen-ops.cpp
View File

@ -34,27 +34,31 @@ register struct powerpc_cpu *CPU asm(REG_CPU);
#define CPU ((powerpc_cpu *)CPUPARAM)
#endif
#if SIZEOF_VOID_P == 8
#define REG32(X) ((uint32)X)
#define DYNGEN_DEFINE_GLOBAL_REGISTER(REG) \
register uintptr reg_##REG asm(REG_##REG); \
register uint32 REG asm(REG_##REG)
#else
#define REG32(X) X
#define DYNGEN_DEFINE_GLOBAL_REGISTER(REG) \
register uint32 REG asm(REG_##REG)
#endif
#define FPREG(X) ((powerpc_fpr *)(X))
#define A0 REG32(reg_A0)
register uintptr reg_A0 asm(REG_A0);
#define T0 REG32(reg_T0)
#define F0 FPREG(reg_T0)->d
#define F0_dw FPREG(reg_T0)->j
register uintptr reg_T0 asm(REG_T0);
#define T1 REG32(reg_T1)
#define F1 FPREG(reg_T1)->d
#define F1_dw FPREG(reg_T1)->j
register uintptr reg_T1 asm(REG_T1);
#define T2 REG32(reg_T2)
#define F2 FPREG(reg_T2)->d
#define F2_dw FPREG(reg_T2)->j
register uintptr reg_T2 asm(REG_T2);
#define FD powerpc_dyngen_helper::fp_result()
#define FD_dw powerpc_dyngen_helper::fp_result_dw()
DYNGEN_DEFINE_GLOBAL_REGISTER(A0);
DYNGEN_DEFINE_GLOBAL_REGISTER(T0);
DYNGEN_DEFINE_GLOBAL_REGISTER(T1);
DYNGEN_DEFINE_GLOBAL_REGISTER(T2);
#ifdef REG_T3
DYNGEN_DEFINE_GLOBAL_REGISTER(T3);
#endif
// Floating-point registers
#define FPREG(X) ((powerpc_fpr *)(X))
#define F0 FPREG(reg_T0)->d
#define F0_dw FPREG(reg_T0)->j
#define F1 FPREG(reg_T1)->d
#define F1_dw FPREG(reg_T1)->j
#define F2 FPREG(reg_T2)->d
#define F2_dw FPREG(reg_T2)->j
#define FD powerpc_dyngen_helper::fp_result()
#define FD_dw powerpc_dyngen_helper::fp_result_dw()
// Vector registers
#define VREG(X) ((powerpc_vr *)(X))[0]