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gencpu builds cleanly on MSVC.

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Fixed nasty bitfield issue where MSVC enums are signed, so a two-bit bitfield set to 2 is later read as -2.
This commit is contained in:
James Touton 2015-08-06 01:25:15 -07:00
parent 2d2e721437
commit 8b4dc6ea81
6 changed files with 40 additions and 20 deletions
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32
BasiliskII/src/uae_cpu/gencpu.c
View File

@ -1199,10 +1199,10 @@ static void gen_opcode (unsigned long int opcode)
curi->size == sz_word ? sz_word : sz_long, "src");
break;
case i_MVMEL:
genmovemel (opcode);
genmovemel ((uae_u16)opcode);
break;
case i_MVMLE:
genmovemle (opcode);
genmovemle ((uae_u16)opcode);
break;
case i_TRAP:
genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
@ -1523,7 +1523,7 @@ static void gen_opcode (unsigned long int opcode)
printf ("\tcnt &= 63;\n");
printf ("\tCLEAR_CZNV;\n");
printf ("\tif (cnt >= %d) {\n", bit_size (curi->size));
printf ("\t\tval = %s & (uae_u32)-sign;\n", bit_mask (curi->size));
printf ("\t\tval = %s & (uae_u32)-(uae_s32)sign;\n", bit_mask (curi->size));
printf ("\t\tSET_CFLG (sign);\n");
duplicate_carry ();
if (source_is_imm1_8 (curi))
@ -1534,7 +1534,7 @@ static void gen_opcode (unsigned long int opcode)
printf ("\t\tSET_CFLG (val & 1);\n");
duplicate_carry ();
printf ("\t\tval >>= 1;\n");
printf ("\t\tval |= (%s << (%d - cnt)) & (uae_u32)-sign;\n",
printf ("\t\tval |= (%s << (%d - cnt)) & (uae_u32)-(uae_s32)sign;\n",
bit_mask (curi->size),
bit_size (curi->size));
printf ("\t\tval &= %s;\n", bit_mask (curi->size));
@ -2286,7 +2286,7 @@ static void generate_one_opcode (int rp)
const char *opcode_str;
if (table68k[opcode].mnemo == i_ILLG
|| table68k[opcode].clev > cpu_level)
|| table68k[opcode].clev > (unsigned)cpu_level)
return;
if (table68k[opcode].handler != -1)
@ -2475,10 +2475,16 @@ static void generate_func (void)
postfix = i;
fprintf (stblfile, "struct cputbl CPUFUNC(op_smalltbl_%d)[] = {\n", postfix);
/* Disable spurious warnings. */
printf ("\n"
"#ifdef _MSC_VER\n"
"#pragma warning(disable:4102) /* unreferenced label */\n"
"#endif\n");
/* sam: this is for people with low memory (eg. me :)) */
printf ("\n"
"#if !defined(PART_1) && !defined(PART_2) && "
"!defined(PART_3) && !defined(PART_4) && "
"!defined(PART_3) && !defined(PART_4) && "
"!defined(PART_5) && !defined(PART_6) && "
"!defined(PART_7) && !defined(PART_8)"
"\n"
@ -2534,5 +2540,19 @@ int main (int argc, char **argv)
fclose (headerfile);
fclose (stblfile);
fflush (out);
/* For build systems (IDEs mainly) that don't make it easy to compile the
* same file twice with different settings. */
stblfile = fopen ("cpustbl_nf.cpp", "w");
out = freopen ("cpuemu_nf.cpp", "w", stdout);
fprintf (stblfile, "#define NOFLAGS\n");
fprintf (stblfile, "#include \"cpustbl.cpp\"\n");
fclose (stblfile);
printf ("#define NOFLAGS\n");
printf ("#include \"cpuemu.cpp\"\n");
fflush (out);
return 0;
}

4
BasiliskII/src/uae_cpu/m68k.h
View File

@ -25,7 +25,7 @@
#ifdef OPTIMIZED_FLAGS
#if (defined(__i386__) && defined(X86_ASSEMBLY)) || (defined(__x86_64__) && defined(X86_64_ASSEMBLY))
#if defined(X86_ASSEMBLY) || defined(X86_64_ASSEMBLY) || defined(MSVC_INTRINSICS)
#ifndef SAHF_SETO_PROFITABLE
@ -352,7 +352,7 @@ static __inline__ int cctrue(int cc)
#endif
#elif defined(__sparc__) && (defined(SPARC_V8_ASSEMBLY) || defined(SPARC_V9_ASSEMBLY))
#elif defined(SPARC_V8_ASSEMBLY) || defined(SPARC_V9_ASSEMBLY)
struct flag_struct {
unsigned char nzvc;

10
BasiliskII/src/uae_cpu/newcpu.cpp
View File

@ -211,7 +211,7 @@ static void build_cpufunctbl (void)
{
int i;
unsigned long opcode;
int cpu_level = 0; // 68000 (default)
unsigned int cpu_level = 0; // 68000 (default)
if (CPUType == 4)
cpu_level = 4; // 68040 with FPU
else {
@ -979,8 +979,8 @@ void m68k_divl (uae_u32 opcode, uae_u32 src, uae_u16 extra, uaecptr oldpc)
SET_CFLG (0);
SET_ZFLG (((uae_s32)quot) == 0);
SET_NFLG (((uae_s32)quot) < 0);
m68k_dreg(regs, extra & 7) = rem;
m68k_dreg(regs, (extra >> 12) & 7) = quot;
m68k_dreg(regs, extra & 7) = (uae_u32)rem;
m68k_dreg(regs, (extra >> 12) & 7) = (uae_u32)quot;
}
} else {
/* unsigned */
@ -1002,8 +1002,8 @@ void m68k_divl (uae_u32 opcode, uae_u32 src, uae_u16 extra, uaecptr oldpc)
SET_CFLG (0);
SET_ZFLG (((uae_s32)quot) == 0);
SET_NFLG (((uae_s32)quot) < 0);
m68k_dreg(regs, extra & 7) = rem;
m68k_dreg(regs, (extra >> 12) & 7) = quot;
m68k_dreg(regs, extra & 7) = (uae_u32)rem;
m68k_dreg(regs, (extra >> 12) & 7) = (uae_u32)quot;
}
}
#else

6
BasiliskII/src/uae_cpu/readcpu.cpp
View File

@ -869,7 +869,7 @@ static void handle_merges (long int opcode)
}
for (srcreg=0; srcreg < sbitdst; srcreg++) {
for (dstreg=0; dstreg < dstend; dstreg++) {
uae_u16 code = opcode;
uae_u16 code = uae_u16(opcode);
code = (code & ~smsk) | (srcreg << table68k[opcode].spos);
code = (code & ~dmsk) | (dstreg << table68k[opcode].dpos);
@ -1023,11 +1023,11 @@ const char *get_instruction_string (unsigned int opcode)
strcat (out,".L");
strcat (out," ");
if (ins->suse)
strcat (out, get_ea_string (ins->smode, ins->size));
strcat (out, get_ea_string (amodes(ins->smode), wordsizes(ins->size)));
if (ins->duse) {
if (ins->suse)
strcat (out,",");
strcat (out, get_ea_string (ins->dmode, ins->size));
strcat (out, get_ea_string (amodes(ins->dmode), wordsizes(ins->size)));
}
return out;
}

6
BasiliskII/src/uae_cpu/readcpu.h
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@ -103,10 +103,10 @@ extern struct instr {
unsigned int mnemo:8;
unsigned int cc:4;
unsigned int plev:2;
wordsizes size:2;
amodes smode:5;
unsigned int size:2;
unsigned int smode:5;
unsigned int stype:3;
amodes dmode:5;
unsigned int dmode:5;
unsigned int suse:1;
unsigned int duse:1;
unsigned int unused1:1;

2
BasiliskII/src/uae_cpu/spcflags.h
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@ -71,7 +71,7 @@ enum {
regs.spcflags &= ~(m); \
} while (0)
#elif (defined(__i386__) || defined(__x86_64__)) && defined(X86_ASSEMBLY)
#elif defined(X86_ASSEMBLY)
#define HAVE_HARDWARE_LOCKS