mirror of
https://github.com/kanjitalk755/macemu.git
synced 2024-12-25 17:29:19 +00:00
Preserve all necessary registers on interrupt, thus also permitting nested
interrupts to occur. SheepShaver locks should now be reduced.
This commit is contained in:
gbeauche
parent
663facbf97
commit
9019e71cfc
@ -93,9 +93,6 @@ extern "C" void check_load_invoc(uint32 type, int16 id, uint32 h);
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// PowerPC EmulOp to exit from emulation looop
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const uint32 POWERPC_EXEC_RETURN = POWERPC_EMUL_OP | 1;
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// Enable interrupt routine safety checks?
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#define SAFE_INTERRUPT_PPC 1
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// Enable Execute68k() safety checks?
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#define SAFE_EXEC_68K 1
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@ -142,23 +139,6 @@ class sheepshaver_cpu
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void init_decoder();
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void execute_sheep(uint32 opcode);
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// CPU context to preserve on interrupt
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class interrupt_context {
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uint32 gpr[32];
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double fpr[32];
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uint32 pc;
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uint32 lr;
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uint32 ctr;
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uint32 cr;
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uint32 xer;
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uint32 fpscr;
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sheepshaver_cpu *cpu;
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const char *where;
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public:
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interrupt_context(sheepshaver_cpu *_cpu, const char *_where);
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~interrupt_context();
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};
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public:
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// Constructor
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@ -194,7 +174,6 @@ public:
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// Handle MacOS interrupt
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void interrupt(uint32 entry);
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void handle_interrupt();
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// Make sure the SIGSEGV handler can access CPU registers
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friend sigsegv_return_t sigsegv_handler(sigsegv_address_t, sigsegv_address_t);
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@ -479,56 +458,6 @@ int sheepshaver_cpu::compile1(codegen_context_t & cg_context)
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}
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#endif
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// CPU context to preserve on interrupt
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sheepshaver_cpu::interrupt_context::interrupt_context(sheepshaver_cpu *_cpu, const char *_where)
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{
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#if SAFE_INTERRUPT_PPC >= 2
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cpu = _cpu;
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where = _where;
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// Save interrupt context
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memcpy(&gpr[0], &cpu->gpr(0), sizeof(gpr));
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memcpy(&fpr[0], &cpu->fpr(0), sizeof(fpr));
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pc = cpu->pc();
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lr = cpu->lr();
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ctr = cpu->ctr();
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cr = cpu->get_cr();
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xer = cpu->get_xer();
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fpscr = cpu->fpscr();
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#endif
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}
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sheepshaver_cpu::interrupt_context::~interrupt_context()
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{
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#if SAFE_INTERRUPT_PPC >= 2
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// Check whether CPU context was preserved by interrupt
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if (memcmp(&gpr[0], &cpu->gpr(0), sizeof(gpr)) != 0) {
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printf("FATAL: %s: interrupt clobbers registers\n", where);
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for (int i = 0; i < 32; i++)
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if (gpr[i] != cpu->gpr(i))
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printf(" r%d: %08x -> %08x\n", i, gpr[i], cpu->gpr(i));
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}
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if (memcmp(&fpr[0], &cpu->fpr(0), sizeof(fpr)) != 0) {
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printf("FATAL: %s: interrupt clobbers registers\n", where);
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for (int i = 0; i < 32; i++)
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if (fpr[i] != cpu->fpr(i))
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printf(" r%d: %f -> %f\n", i, fpr[i], cpu->fpr(i));
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}
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if (pc != cpu->pc())
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printf("FATAL: %s: interrupt clobbers PC\n", where);
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if (lr != cpu->lr())
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printf("FATAL: %s: interrupt clobbers LR\n", where);
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if (ctr != cpu->ctr())
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printf("FATAL: %s: interrupt clobbers CTR\n", where);
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if (cr != cpu->get_cr())
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printf("FATAL: %s: interrupt clobbers CR\n", where);
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if (xer != cpu->get_xer())
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printf("FATAL: %s: interrupt clobbers XER\n", where);
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if (fpscr != cpu->fpscr())
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printf("FATAL: %s: interrupt clobbers FPSCR\n", where);
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#endif
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}
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// Handle MacOS interrupt
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void sheepshaver_cpu::interrupt(uint32 entry)
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{
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@ -537,13 +466,6 @@ void sheepshaver_cpu::interrupt(uint32 entry)
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const clock_t interrupt_start = clock();
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#endif
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#if SAFE_INTERRUPT_PPC
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static int depth = 0;
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if (depth != 0)
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printf("FATAL: sheepshaver_cpu::interrupt() called more than once: %d\n", depth);
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depth++;
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#endif
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// Save program counters and branch registers
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uint32 saved_pc = pc();
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uint32 saved_lr = lr();
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@ -597,10 +519,6 @@ void sheepshaver_cpu::interrupt(uint32 entry)
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#if EMUL_TIME_STATS
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interrupt_time += (clock() - interrupt_start);
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#endif
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#if SAFE_INTERRUPT_PPC
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depth--;
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#endif
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}
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// Execute 68k routine
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@ -1000,7 +918,7 @@ void TriggerInterrupt(void)
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#endif
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}
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void sheepshaver_cpu::handle_interrupt(void)
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void HandleInterrupt(powerpc_registers *r)
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{
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#ifdef USE_SDL_VIDEO
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// We must fill in the events queue in the same thread that did call SDL_SetVideoMode()
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@ -1011,29 +929,23 @@ void sheepshaver_cpu::handle_interrupt(void)
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if (int32(ReadMacInt32(XLM_IRQ_NEST)) > 0)
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return;
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// Current interrupt nest level
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static int interrupt_depth = 0;
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++interrupt_depth;
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// Increment interrupt counter
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#if EMUL_TIME_STATS
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interrupt_count++;
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#endif
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// Disable MacOS stack sniffer
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WriteMacInt32(0x110, 0);
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// Interrupt action depends on current run mode
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switch (ReadMacInt32(XLM_RUN_MODE)) {
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case MODE_68K:
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// 68k emulator active, trigger 68k interrupt level 1
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WriteMacInt16(tswap32(kernel_data->v[0x67c >> 2]), 1);
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set_cr(get_cr() | tswap32(kernel_data->v[0x674 >> 2]));
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r->cr.set(r->cr.get() | tswap32(kernel_data->v[0x674 >> 2]));
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break;
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#if INTERRUPTS_IN_NATIVE_MODE
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case MODE_NATIVE:
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// 68k emulator inactive, in nanokernel?
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if (gpr(1) != KernelDataAddr && interrupt_depth == 1) {
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interrupt_context ctx(this, "PowerPC mode");
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if (r->gpr[1] != KernelDataAddr) {
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// Prepare for 68k interrupt level 1
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WriteMacInt16(tswap32(kernel_data->v[0x67c >> 2]), 1);
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@ -1055,7 +967,6 @@ void sheepshaver_cpu::handle_interrupt(void)
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case MODE_EMUL_OP:
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// 68k emulator active, within EMUL_OP routine, execute 68k interrupt routine directly when interrupt level is 0
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if ((ReadMacInt32(XLM_68K_R25) & 7) == 0) {
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interrupt_context ctx(this, "68k mode");
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#if EMUL_TIME_STATS
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const clock_t interrupt_start = clock();
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#endif
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@ -1092,9 +1003,6 @@ void sheepshaver_cpu::handle_interrupt(void)
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break;
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#endif
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}
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// We are done with this interrupt
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--interrupt_depth;
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}
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static void get_resource(void);
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@ -391,12 +391,39 @@ void powerpc_cpu::fake_dump_registers(uint32)
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dump_registers();
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}
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void powerpc_registers::interrupt_copy(powerpc_registers &oregs, powerpc_registers const &iregs)
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{
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for (int i = 0; i < 32; i++) {
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oregs.gpr[i] = iregs.gpr[i];
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oregs.fpr[i] = iregs.fpr[i];
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}
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oregs.cr = iregs.cr;
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oregs.fpscr = iregs.fpscr;
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oregs.xer = iregs.xer;
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oregs.lr = iregs.lr;
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oregs.ctr = iregs.ctr;
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oregs.pc = iregs.pc;
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uint32 vrsave = iregs.vrsave;
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oregs.vrsave = vrsave;
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if (vrsave) {
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for (int i = 31; i >= 0; i--) {
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if (vrsave & 1)
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oregs.vr[i] = iregs.vr[i];
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vrsave >>= 1;
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}
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}
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}
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bool powerpc_cpu::check_spcflags()
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{
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#if PPC_CHECK_INTERRUPTS
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#ifdef SHEEPSHAVER
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if (spcflags().test(SPCFLAG_CPU_HANDLE_INTERRUPT)) {
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spcflags().clear(SPCFLAG_CPU_HANDLE_INTERRUPT);
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handle_interrupt();
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powerpc_registers r;
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powerpc_registers::interrupt_copy(r, regs);
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HandleInterrupt(&r);
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powerpc_registers::interrupt_copy(regs, r);
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}
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if (spcflags().test(SPCFLAG_CPU_TRIGGER_INTERRUPT)) {
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spcflags().clear(SPCFLAG_CPU_TRIGGER_INTERRUPT);
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@ -265,7 +265,6 @@ public:
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// Interrupts handling
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void trigger_interrupt();
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virtual void handle_interrupt() { }
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// Set VALUE to register ID
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void set_register(int id, any_register const & value);
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@ -478,4 +477,8 @@ inline void powerpc_cpu::trigger_interrupt()
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#endif
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}
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#ifdef SHEEPSHAVER
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extern void HandleInterrupt(powerpc_registers *r);
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#endif
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#endif /* PPC_CPU_H */
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@ -247,6 +247,7 @@ struct powerpc_registers
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static inline int GPR(int r) { return GPR_BASE + r; }
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static inline int FPR(int r) { return FPR_BASE + r; }
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static void interrupt_copy(powerpc_registers &oregs, powerpc_registers const &iregs);
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uint32 gpr[32]; // General-Purpose Registers
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powerpc_fpr fpr[32]; // Floating-Point Registers
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