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Do FOLLOW_CONST_JUMPS for bcl 20,BI,TARGET branches too, since that's an
unconditional jump and we don't need the LR in that case. Also fix this: SheepShaver: ../kpx_cpu/src/cpu/ppc/ppc-translate.cpp:1499: powerpc_block_info* powerpc_cpu::compile_block(unsigned int): Assertion `dg.jmp_addr[i] != __null' failed. Aborted aka. StuffIt Expander + pressing the 'Cancel' button.
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@ -449,16 +449,18 @@ powerpc_cpu::compile_block(uint32 entry_point)
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}
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}
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case PPC_I(BC): // Branch Conditional
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case PPC_I(BC): // Branch Conditional
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{
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{
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#if FOLLOW_CONST_JUMPS
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if (!LK_field::test(opcode)) {
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const int bo = BO_field::extract(opcode);
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const int bo = BO_field::extract(opcode);
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#if FOLLOW_CONST_JUMPS
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if (!BO_CONDITIONAL_BRANCH(bo) && !BO_DECREMENT_CTR(bo)) {
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if (!BO_CONDITIONAL_BRANCH(bo) && !BO_DECREMENT_CTR(bo)) {
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if (LK_field::test(opcode)) {
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const uint32 npc = dpc + 4;
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dg.gen_store_im_LR(npc);
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}
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if (AA_field::test(opcode))
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if (AA_field::test(opcode))
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dpc = 0;
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dpc = 0;
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op.jmp.target = ((dpc + operand_BD::get(this, opcode)) & -4);
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op.jmp.target = ((dpc + operand_BD::get(this, opcode)) & -4);
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goto do_const_jump;
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goto do_const_jump;
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}
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}
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}
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#endif
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#endif
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const uint32 tpc = ((AA_field::test(opcode) ? 0 : dpc) + operand_BD::get(this, opcode)) & -4;
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const uint32 tpc = ((AA_field::test(opcode) ? 0 : dpc) + operand_BD::get(this, opcode)) & -4;
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#if DYNGEN_DIRECT_BLOCK_CHAINING
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#if DYNGEN_DIRECT_BLOCK_CHAINING
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@ -467,6 +469,8 @@ powerpc_cpu::compile_block(uint32 entry_point)
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if (direct_chaining_possible(bi->pc, tpc)) {
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if (direct_chaining_possible(bi->pc, tpc)) {
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use_direct_block_chaining = true;
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use_direct_block_chaining = true;
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bi->jmp_pc[0] = tpc;
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bi->jmp_pc[0] = tpc;
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// Make sure it's a conditional branch
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if (BO_CONDITIONAL_BRANCH(bo) || BO_DECREMENT_CTR(bo))
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bi->jmp_pc[1] = npc;
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bi->jmp_pc[1] = npc;
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}
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}
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#endif
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#endif
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