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Don't handle XLM_IRQ_NEST atomically in emulated mode. That's useless since

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this variable is modified only within a single thread and interrupts are
not handled asynchronously.
This commit is contained in:
gbeauche 2004-06-22 17:10:08 +00:00
parent 1988a45a16
commit e0a76f9e38
5 changed files with 9 additions and 40 deletions
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8
SheepShaver/src/Unix/main_unix.cpp
View File

@ -1536,7 +1536,11 @@ void ClearInterruptFlag(uint32 flag)
void DisableInterrupt(void)
{
#if EMULATED_PPC
WriteMacInt32(XLM_IRQ_NEST, int32(ReadMacInt32(XLM_IRQ_NEST)) + 1);
#else
atomic_add((int *)XLM_IRQ_NEST, 1);
#endif
}
@ -1546,7 +1550,11 @@ void DisableInterrupt(void)
void EnableInterrupt(void)
{
#if EMULATED_PPC
WriteMacInt32(XLM_IRQ_NEST, int32(ReadMacInt32(XLM_IRQ_NEST)) - 1);
#else
atomic_add((int *)XLM_IRQ_NEST, -1);
#endif
}

2
SheepShaver/src/include/thunks.h
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@ -51,8 +51,6 @@ enum {
NATIVE_GET_IND_RESOURCE,
NATIVE_GET_1_IND_RESOURCE,
NATIVE_R_GET_RESOURCE,
NATIVE_DISABLE_INTERRUPT,
NATIVE_ENABLE_INTERRUPT,
NATIVE_MAKE_EXECUTABLE,
NATIVE_CHECK_LOAD_INVOC,
NATIVE_SYNC_HOOK,

16
SheepShaver/src/kpx_cpu/sheepshaver_glue.cpp
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@ -446,14 +446,6 @@ int sheepshaver_cpu::compile1(codegen_context_t & cg_context)
status = COMPILE_CODE_OK;
break;
#endif
case NATIVE_DISABLE_INTERRUPT:
dg.gen_invoke(DisableInterrupt);
status = COMPILE_CODE_OK;
break;
case NATIVE_ENABLE_INTERRUPT:
dg.gen_invoke(EnableInterrupt);
status = COMPILE_CODE_OK;
break;
case NATIVE_BITBLT:
dg.gen_load_T0_GPR(3);
dg.gen_invoke_T0((void (*)(uint32))NQD_bitblt);
@ -1068,7 +1060,7 @@ void TriggerInterrupt(void)
void sheepshaver_cpu::handle_interrupt(void)
{
// Do nothing if interrupts are disabled
if (*(int32 *)XLM_IRQ_NEST > 0)
if (int32(ReadMacInt32(XLM_IRQ_NEST)) > 0)
return;
// Current interrupt nest level
@ -1266,12 +1258,6 @@ void sheepshaver_cpu::execute_native_op(uint32 selector)
get_resource_callbacks[selector - NATIVE_GET_RESOURCE]();
break;
}
case NATIVE_DISABLE_INTERRUPT:
DisableInterrupt();
break;
case NATIVE_ENABLE_INTERRUPT:
EnableInterrupt();
break;
case NATIVE_MAKE_EXECUTABLE:
MakeExecutable(0, (void *)gpr(4), gpr(5));
break;

21
SheepShaver/src/rom_patches.cpp
View File

@ -1122,13 +1122,9 @@ static bool patch_68k_emul(void)
// Extra routine for 68k emulator start
lp = (uint32 *)(ROM_BASE + 0x36f900);
*lp++ = htonl(0x7c2903a6); // mtctr r1
#if EMULATED_PPC
*lp++ = htonl(NativeOpcode(NATIVE_DISABLE_INTERRUPT));
#else
*lp++ = htonl(0x80200000 + XLM_IRQ_NEST); // lwz r1,XLM_IRQ_NEST
*lp++ = htonl(0x38210001); // addi r1,r1,1
*lp++ = htonl(0x90200000 + XLM_IRQ_NEST); // stw r1,XLM_IRQ_NEST
#endif
*lp++ = htonl(0x80200000 + XLM_KERNEL_DATA);// lwz r1,XLM_KERNEL_DATA
*lp++ = htonl(0x90c10018); // stw r6,0x18(r1)
*lp++ = htonl(0x7cc902a6); // mfctr r6
@ -1156,13 +1152,9 @@ static bool patch_68k_emul(void)
// Extra routine for Mixed Mode
lp = (uint32 *)(ROM_BASE + 0x36fa00);
*lp++ = htonl(0x7c2903a6); // mtctr r1
#if EMULATED_PPC
*lp++ = htonl(NativeOpcode(NATIVE_DISABLE_INTERRUPT));
#else
*lp++ = htonl(0x80200000 + XLM_IRQ_NEST); // lwz r1,XLM_IRQ_NEST
*lp++ = htonl(0x38210001); // addi r1,r1,1
*lp++ = htonl(0x90200000 + XLM_IRQ_NEST); // stw r1,XLM_IRQ_NEST
#endif
*lp++ = htonl(0x80200000 + XLM_KERNEL_DATA);// lwz r1,XLM_KERNEL_DATA
*lp++ = htonl(0x90c10018); // stw r6,0x18(r1)
*lp++ = htonl(0x7cc902a6); // mfctr r6
@ -1190,13 +1182,9 @@ static bool patch_68k_emul(void)
// Extra routine for Reset/FC1E opcode
lp = (uint32 *)(ROM_BASE + 0x36fb00);
*lp++ = htonl(0x7c2903a6); // mtctr r1
#if EMULATED_PPC
*lp++ = htonl(NativeOpcode(NATIVE_DISABLE_INTERRUPT));
#else
*lp++ = htonl(0x80200000 + XLM_IRQ_NEST); // lwz r1,XLM_IRQ_NEST
*lp++ = htonl(0x38210001); // addi r1,r1,1
*lp++ = htonl(0x90200000 + XLM_IRQ_NEST); // stw r1,XLM_IRQ_NEST
#endif
*lp++ = htonl(0x80200000 + XLM_KERNEL_DATA);// lwz r1,XLM_KERNEL_DATA
*lp++ = htonl(0x90c10018); // stw r6,0x18(r1)
*lp++ = htonl(0x7cc902a6); // mfctr r6
@ -1224,13 +1212,9 @@ static bool patch_68k_emul(void)
// Extra routine for FE0A opcode (QuickDraw 3D needs this)
lp = (uint32 *)(ROM_BASE + 0x36fc00);
*lp++ = htonl(0x7c2903a6); // mtctr r1
#if EMULATED_PPC
*lp++ = htonl(NativeOpcode(NATIVE_DISABLE_INTERRUPT));
#else
*lp++ = htonl(0x80200000 + XLM_IRQ_NEST); // lwz r1,XLM_IRQ_NEST
*lp++ = htonl(0x38210001); // addi r1,r1,1
*lp++ = htonl(0x90200000 + XLM_IRQ_NEST); // stw r1,XLM_IRQ_NEST
#endif
*lp++ = htonl(0x80200000 + XLM_KERNEL_DATA);// lwz r1,XLM_KERNEL_DATA
*lp++ = htonl(0x90c10018); // stw r6,0x18(r1)
*lp++ = htonl(0x7cc902a6); // mfctr r6
@ -1397,15 +1381,10 @@ static bool patch_nanokernel(void)
uint32 npc = (uint32)(lp + 1) - ROM_BASE;
lp = (uint32 *)(ROM_BASE + 0x318000);
#if EMULATED_PPC
*lp++ = htonl(NativeOpcode(NATIVE_ENABLE_INTERRUPT));
*lp = htonl(0x48000000 + ((npc - 0x318004) & 0x03fffffc)); // b ROM_BASE+0x312c2c
#else
*lp++ = htonl(0x81400000 + XLM_IRQ_NEST); // lwz r10,XLM_IRQ_NEST
*lp++ = htonl(0x394affff); // subi r10,r10,1
*lp++ = htonl(0x91400000 + XLM_IRQ_NEST); // stw r10,XLM_IRQ_NEST
*lp = htonl(0x48000000 + ((npc - 0x31800c) & 0x03fffffc)); // b ROM_BASE+0x312c2c
#endif
/*
// Disable FE0A/FE06 opcodes

2
SheepShaver/src/thunks.cpp
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@ -55,8 +55,6 @@ uint32 NativeOpcode(int selector)
{
uint32 opcode;
switch (selector) {
case NATIVE_DISABLE_INTERRUPT:
case NATIVE_ENABLE_INTERRUPT:
case NATIVE_CHECK_LOAD_INVOC:
opcode = POWERPC_NATIVE_OP(0, selector);
break;