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Report SSSE3 instead of SSE4 (to be released later).
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@ -44,8 +44,8 @@ powerpc_dyngen::powerpc_dyngen(dyngen_cpu_base cpu, int cache_size)
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printf(" SSE2");
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printf(" SSE2");
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if (cpuinfo_check_sse3())
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if (cpuinfo_check_sse3())
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printf(" SSE3");
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printf(" SSE3");
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if (cpuinfo_check_sse4())
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if (cpuinfo_check_ssse3())
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printf(" SSE4");
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printf(" SSSE3");
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if (cpuinfo_check_altivec())
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if (cpuinfo_check_altivec())
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printf(" VMX");
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printf(" VMX");
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printf("\n");
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printf("\n");
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@ -32,8 +32,8 @@ enum {
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HWCAP_I386_SSE2 = 1 << 26,
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HWCAP_I386_SSE2 = 1 << 26,
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HWCAP_I386_EDX_FLAGS = (HWCAP_I386_CMOV|HWCAP_I386_MMX|HWCAP_I386_SSE|HWCAP_I386_SSE2),
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HWCAP_I386_EDX_FLAGS = (HWCAP_I386_CMOV|HWCAP_I386_MMX|HWCAP_I386_SSE|HWCAP_I386_SSE2),
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HWCAP_I386_SSE3 = 1 << 0,
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HWCAP_I386_SSE3 = 1 << 0,
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HWCAP_I386_SSE4 = 1 << 9,
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HWCAP_I386_SSSE3 = 1 << 9,
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HWCAP_I386_ECX_FLAGS = (HWCAP_I386_SSE3|HWCAP_I386_SSE4),
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HWCAP_I386_ECX_FLAGS = (HWCAP_I386_SSE3|HWCAP_I386_SSSE3),
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};
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};
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// Determine x86 CPU features
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// Determine x86 CPU features
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@ -110,10 +110,10 @@ bool cpuinfo_check_sse3(void)
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return x86_cpu_features & HWCAP_I386_SSE3;
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return x86_cpu_features & HWCAP_I386_SSE3;
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}
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}
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// Check for x86 feature SSE4
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// Check for x86 feature SSSE3
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bool cpuinfo_check_sse4(void)
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bool cpuinfo_check_ssse3(void)
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{
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{
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return x86_cpu_features & HWCAP_I386_SSE4;
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return x86_cpu_features & HWCAP_I386_SSSE3;
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}
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}
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// PowerPC CPU features
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// PowerPC CPU features
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@ -36,8 +36,8 @@ extern bool cpuinfo_check_sse2(void);
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// Check for x86 feature SSE3
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// Check for x86 feature SSE3
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extern bool cpuinfo_check_sse3(void);
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extern bool cpuinfo_check_sse3(void);
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// Check for x86 feature SSE4
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// Check for x86 feature SSSE3
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extern bool cpuinfo_check_sse4(void);
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extern bool cpuinfo_check_ssse3(void);
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// Check for ppc feature VMX (Altivec)
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// Check for ppc feature VMX (Altivec)
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extern bool cpuinfo_check_altivec(void);
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extern bool cpuinfo_check_altivec(void);
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