mirror of
https://github.com/kanjitalk755/macemu.git
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Implement "ignoresegv" feature on Darwin/ppc (tested on MacOS X)
- Unix/sigsegv.cpp (powerpc_decode_instruction): New. (get_fault_instruction [MacOS X]): Factorize code. (get_fault_instruction [Linux/m68k]): Don't use expression statement. - README (ignoresegv): Add Darwin/ppc to list of supported platforms.
This commit is contained in:
gbeauche
parent
c47819020c
commit
e81b9ace6d
@ -578,7 +578,7 @@ Unix:
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Set this to "true" to ignore illegal memory accesses. The default
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is "false". This feature is only implemented on the following
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platforms: Linux/x86, Linux/ppc.
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platforms: Linux/x86, Linux/ppc, Darwin/ppc.
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AmigaOS:
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@ -53,6 +53,155 @@ static sigsegv_state_dumper_t sigsegv_state_dumper = 0;
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static bool sigsegv_do_install_handler(int sig);
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/*
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* Instruction decoding aids
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*/
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// Transfer type
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enum transfer_type_t {
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TYPE_UNKNOWN,
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TYPE_LOAD,
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TYPE_STORE
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};
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// Transfer size
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enum transfer_size_t {
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SIZE_UNKNOWN,
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SIZE_BYTE,
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SIZE_WORD,
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SIZE_LONG
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};
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#if (defined(powerpc) || defined(__powerpc__) || defined(__ppc__))
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// Addressing mode
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enum addressing_mode_t {
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MODE_UNKNOWN,
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MODE_NORM,
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MODE_U,
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MODE_X,
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MODE_UX
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};
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// Decoded instruction
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struct instruction_t {
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transfer_type_t transfer_type;
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transfer_size_t transfer_size;
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addressing_mode_t addr_mode;
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unsigned int addr;
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char ra, rd;
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};
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static void powerpc_decode_instruction(instruction_t *instruction, unsigned int nip, unsigned int * gpr)
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{
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// Get opcode and divide into fields
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unsigned int opcode = *((unsigned int *)nip);
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unsigned int primop = opcode >> 26;
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unsigned int exop = (opcode >> 1) & 0x3ff;
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unsigned int ra = (opcode >> 16) & 0x1f;
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unsigned int rb = (opcode >> 11) & 0x1f;
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unsigned int rd = (opcode >> 21) & 0x1f;
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signed int imm = (signed short)(opcode & 0xffff);
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// Analyze opcode
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transfer_type_t transfer_type = TYPE_UNKNOWN;
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transfer_size_t transfer_size = SIZE_UNKNOWN;
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addressing_mode_t addr_mode = MODE_UNKNOWN;
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switch (primop) {
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case 31:
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switch (exop) {
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case 23: // lwzx
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transfer_type = TYPE_LOAD; transfer_size = SIZE_LONG; addr_mode = MODE_X; break;
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case 55: // lwzux
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transfer_type = TYPE_LOAD; transfer_size = SIZE_LONG; addr_mode = MODE_UX; break;
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case 87: // lbzx
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transfer_type = TYPE_LOAD; transfer_size = SIZE_BYTE; addr_mode = MODE_X; break;
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case 119: // lbzux
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transfer_type = TYPE_LOAD; transfer_size = SIZE_BYTE; addr_mode = MODE_UX; break;
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case 151: // stwx
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transfer_type = TYPE_STORE; transfer_size = SIZE_LONG; addr_mode = MODE_X; break;
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case 183: // stwux
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transfer_type = TYPE_STORE; transfer_size = SIZE_LONG; addr_mode = MODE_UX; break;
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case 215: // stbx
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transfer_type = TYPE_STORE; transfer_size = SIZE_BYTE; addr_mode = MODE_X; break;
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case 247: // stbux
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transfer_type = TYPE_STORE; transfer_size = SIZE_BYTE; addr_mode = MODE_UX; break;
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case 279: // lhzx
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transfer_type = TYPE_LOAD; transfer_size = SIZE_WORD; addr_mode = MODE_X; break;
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case 311: // lhzux
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transfer_type = TYPE_LOAD; transfer_size = SIZE_WORD; addr_mode = MODE_UX; break;
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case 343: // lhax
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transfer_type = TYPE_LOAD; transfer_size = SIZE_WORD; addr_mode = MODE_X; break;
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case 375: // lhaux
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transfer_type = TYPE_LOAD; transfer_size = SIZE_WORD; addr_mode = MODE_UX; break;
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case 407: // sthx
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transfer_type = TYPE_STORE; transfer_size = SIZE_WORD; addr_mode = MODE_X; break;
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case 439: // sthux
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transfer_type = TYPE_STORE; transfer_size = SIZE_WORD; addr_mode = MODE_UX; break;
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}
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break;
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case 32: // lwz
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transfer_type = TYPE_LOAD; transfer_size = SIZE_LONG; addr_mode = MODE_NORM; break;
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case 33: // lwzu
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transfer_type = TYPE_LOAD; transfer_size = SIZE_LONG; addr_mode = MODE_U; break;
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case 34: // lbz
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transfer_type = TYPE_LOAD; transfer_size = SIZE_BYTE; addr_mode = MODE_NORM; break;
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case 35: // lbzu
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transfer_type = TYPE_LOAD; transfer_size = SIZE_BYTE; addr_mode = MODE_U; break;
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case 36: // stw
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transfer_type = TYPE_STORE; transfer_size = SIZE_LONG; addr_mode = MODE_NORM; break;
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case 37: // stwu
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transfer_type = TYPE_STORE; transfer_size = SIZE_LONG; addr_mode = MODE_U; break;
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case 38: // stb
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transfer_type = TYPE_STORE; transfer_size = SIZE_BYTE; addr_mode = MODE_NORM; break;
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case 39: // stbu
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transfer_type = TYPE_STORE; transfer_size = SIZE_BYTE; addr_mode = MODE_U; break;
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case 40: // lhz
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transfer_type = TYPE_LOAD; transfer_size = SIZE_WORD; addr_mode = MODE_NORM; break;
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case 41: // lhzu
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transfer_type = TYPE_LOAD; transfer_size = SIZE_WORD; addr_mode = MODE_U; break;
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case 42: // lha
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transfer_type = TYPE_LOAD; transfer_size = SIZE_WORD; addr_mode = MODE_NORM; break;
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case 43: // lhau
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transfer_type = TYPE_LOAD; transfer_size = SIZE_WORD; addr_mode = MODE_U; break;
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case 44: // sth
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transfer_type = TYPE_STORE; transfer_size = SIZE_WORD; addr_mode = MODE_NORM; break;
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case 45: // sthu
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transfer_type = TYPE_STORE; transfer_size = SIZE_WORD; addr_mode = MODE_U; break;
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}
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// Calculate effective address
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unsigned int addr = 0;
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switch (addr_mode) {
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case MODE_X:
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case MODE_UX:
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if (ra == 0)
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addr = gpr[rb];
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else
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addr = gpr[ra] + gpr[rb];
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break;
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case MODE_NORM:
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case MODE_U:
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if (ra == 0)
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addr = (signed int)(signed short)imm;
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else
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addr = gpr[ra] + (signed int)(signed short)imm;
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break;
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default:
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break;
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}
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// Commit decoded instruction
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instruction->addr = addr;
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instruction->addr_mode = addr_mode;
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instruction->transfer_type = transfer_type;
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instruction->transfer_size = transfer_size;
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instruction->ra = ra;
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instruction->rd = rd;
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}
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#endif
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/*
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* OS-dependant SIGSEGV signals support section
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*/
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@ -69,8 +218,9 @@ static bool sigsegv_do_install_handler(int sig);
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#if defined(__linux__)
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#if (defined(i386) || defined(__i386__))
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#include <sys/ucontext.h>
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#define SIGSEGV_FAULT_INSTRUCTION (((ucontext_t *)scp)->uc_mcontext.gregs[14]) /* should use REG_EIP instead */
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#define SIGSEGV_REGISTER_FILE (unsigned long *)(((ucontext_t *)scp)->uc_mcontext.gregs)
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#define SIGSEGV_CONTEXT_REGS (((ucontext_t *)scp)->uc_mcontext.gregs)
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#define SIGSEGV_FAULT_INSTRUCTION SIGSEGV_CONTEXT_REGS[14] /* should use REG_EIP instead */
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#define SIGSEGV_REGISTER_FILE (unsigned int *)SIGSEGV_CONTEXT_REGS
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#define SIGSEGV_SKIP_INSTRUCTION ix86_skip_instruction
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#endif
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#if (defined(ia64) || defined(__ia64__))
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@ -78,8 +228,9 @@ static bool sigsegv_do_install_handler(int sig);
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#endif
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#if (defined(powerpc) || defined(__powerpc__))
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#include <sys/ucontext.h>
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#define SIGSEGV_FAULT_INSTRUCTION (((ucontext_t *)scp)->uc_mcontext.regs->nip)
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#define SIGSEGV_REGISTER_FILE (unsigned long *)(((ucontext_t *)scp)->uc_mcontext.regs)
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#define SIGSEGV_CONTEXT_REGS (((ucontext_t *)scp)->uc_mcontext.regs)
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#define SIGSEGV_FAULT_INSTRUCTION (SIGSEGV_CONTEXT_REGS->nip)
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#define SIGSEGV_REGISTER_FILE (unsigned int *)&SIGSEGV_CONTEXT_REGS->nip, (unsigned int *)(SIGSEGV_CONTEXT_REGS->gpr)
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#define SIGSEGV_SKIP_INSTRUCTION powerpc_skip_instruction
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#endif
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#endif
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@ -107,7 +258,7 @@ static bool sigsegv_do_install_handler(int sig);
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#define SIGSEGV_FAULT_HANDLER_ARGLIST int sig, struct sigcontext *scp
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#define SIGSEGV_FAULT_ADDRESS scp->regs->dar
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#define SIGSEGV_FAULT_INSTRUCTION scp->regs->nip
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#define SIGSEGV_REGISTER_FILE (unsigned long *)(scp->regs)
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#define SIGSEGV_REGISTER_FILE (unsigned int *)&scp->regs->nip, (unsigned int *)(scp->regs->gpr)
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#define SIGSEGV_SKIP_INSTRUCTION powerpc_skip_instruction
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#endif
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#if (defined(alpha) || defined(__alpha__))
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@ -162,25 +313,29 @@ static sigsegv_address_t get_fault_address(struct sigcontext *scp)
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#if (defined(m68k) || defined(__m68k__))
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#include <m68k/frame.h>
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#define SIGSEGV_FAULT_HANDLER_ARGLIST int sig, int code, struct sigcontext *scp
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#define SIGSEGV_FAULT_ADDRESS ({ \
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struct sigstate { \
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int ss_flags; \
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struct frame ss_frame; \
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}; \
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struct sigstate *state = (struct sigstate *)scp->sc_ap; \
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char *fault_addr; \
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switch (state->ss_frame.f_format) { \
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case 7: /* 68040 access error */ \
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/* "code" is sometimes unreliable (i.e. contains NULL or a bogus address), reason unknown */ \
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fault_addr = state->ss_frame.f_fmt7.f_fa; \
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break; \
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default: \
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fault_addr = (char *)code; \
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break; \
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} \
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fault_addr; \
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})
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#define SIGSEGV_FAULT_ADDRESS get_fault_address(scp)
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#define SIGSEGV_ALL_SIGNALS FAULT_HANDLER(SIGSEGV)
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// Use decoding scheme from BasiliskII/m68k native
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static sigsegv_address_t get_fault_address(struct sigcontext *scp)
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{
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struct sigstate {
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int ss_flags;
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struct frame ss_frame;
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};
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struct sigstate *state = (struct sigstate *)scp->sc_ap;
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char *fault_addr;
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switch (state->ss_frame.f_format) {
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case 7: /* 68040 access error */
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/* "code" is sometimes unreliable (i.e. contains NULL or a bogus address), reason unknown */
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fault_addr = state->ss_frame.f_fmt7.f_fa;
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break;
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default:
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fault_addr = (char *)code;
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break;
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}
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return (sigsegv_address_t)fault_addr;
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}
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#else
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#define SIGSEGV_FAULT_HANDLER_ARGLIST int sig, int code, void *scp, char *addr
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#define SIGSEGV_FAULT_ADDRESS addr
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@ -195,107 +350,27 @@ static sigsegv_address_t get_fault_address(struct sigcontext *scp)
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#define SIGSEGV_FAULT_ADDRESS get_fault_address(scp)
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#define SIGSEGV_FAULT_INSTRUCTION scp->sc_ir
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#define SIGSEGV_ALL_SIGNALS FAULT_HANDLER(SIGBUS)
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#define SIGSEGV_REGISTER_FILE (unsigned int *)&scp->sc_ir, &((unsigned int *) scp->sc_regs)[2]
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#define SIGSEGV_SKIP_INSTRUCTION powerpc_skip_instruction
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// From Boehm's GC 6.0alpha8
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#define EXTRACT_OP1(iw) (((iw) & 0xFC000000) >> 26)
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#define EXTRACT_OP2(iw) (((iw) & 0x000007FE) >> 1)
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#define EXTRACT_REGA(iw) (((iw) & 0x001F0000) >> 16)
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#define EXTRACT_REGB(iw) (((iw) & 0x03E00000) >> 21)
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#define EXTRACT_REGC(iw) (((iw) & 0x0000F800) >> 11)
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#define EXTRACT_DISP(iw) ((short *) &(iw))[1]
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// Use decoding scheme from SheepShaver
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static sigsegv_address_t get_fault_address(struct sigcontext *scp)
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{
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unsigned int instr = *((unsigned int *) scp->sc_ir);
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unsigned int * regs = &((unsigned int *) scp->sc_regs)[2];
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int disp = 0, tmp;
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unsigned int baseA = 0, baseB = 0;
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unsigned int addr, alignmask = 0xFFFFFFFF;
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unsigned int nip = (unsigned int) scp->sc_ir;
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unsigned int * gpr = &((unsigned int *) scp->sc_regs)[2];
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instruction_t instr;
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switch(EXTRACT_OP1(instr)) {
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case 38: /* stb */
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case 39: /* stbu */
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case 54: /* stfd */
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case 55: /* stfdu */
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case 52: /* stfs */
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case 53: /* stfsu */
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case 44: /* sth */
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case 45: /* sthu */
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case 47: /* stmw */
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case 36: /* stw */
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case 37: /* stwu */
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tmp = EXTRACT_REGA(instr);
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if(tmp > 0)
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baseA = regs[tmp];
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disp = EXTRACT_DISP(instr);
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break;
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case 31:
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switch(EXTRACT_OP2(instr)) {
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case 86: /* dcbf */
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case 54: /* dcbst */
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case 1014: /* dcbz */
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case 247: /* stbux */
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case 215: /* stbx */
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case 759: /* stfdux */
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case 727: /* stfdx */
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case 983: /* stfiwx */
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case 695: /* stfsux */
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case 663: /* stfsx */
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case 918: /* sthbrx */
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case 439: /* sthux */
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case 407: /* sthx */
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case 661: /* stswx */
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case 662: /* stwbrx */
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case 150: /* stwcx. */
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case 183: /* stwux */
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case 151: /* stwx */
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case 135: /* stvebx */
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case 167: /* stvehx */
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case 199: /* stvewx */
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case 231: /* stvx */
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case 487: /* stvxl */
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tmp = EXTRACT_REGA(instr);
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if(tmp > 0)
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baseA = regs[tmp];
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baseB = regs[EXTRACT_REGC(instr)];
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/* determine Altivec alignment mask */
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switch(EXTRACT_OP2(instr)) {
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case 167: /* stvehx */
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alignmask = 0xFFFFFFFE;
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break;
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case 199: /* stvewx */
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alignmask = 0xFFFFFFFC;
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break;
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case 231: /* stvx */
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alignmask = 0xFFFFFFF0;
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break;
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case 487: /* stvxl */
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alignmask = 0xFFFFFFF0;
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break;
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}
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break;
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case 725: /* stswi */
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tmp = EXTRACT_REGA(instr);
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if(tmp > 0)
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baseA = regs[tmp];
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break;
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default: /* ignore instruction */
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return 0;
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break;
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}
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break;
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default: /* ignore instruction */
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return 0;
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break;
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powerpc_decode_instruction(&instr, nip, gpr);
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return (sigsegv_address_t)instr.addr;
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}
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#endif
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#endif
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#endif
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addr = (baseA + baseB) + disp;
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addr &= alignmask;
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return (sigsegv_address_t)addr;
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}
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#endif
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#endif
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#endif
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/*
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* Instruction skipping
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*/
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#ifdef HAVE_SIGSEGV_SKIP_INSTRUCTION
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// Decode and skip X86 instruction
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@ -347,26 +422,15 @@ static inline int ix86_step_over_modrm(unsigned char * p)
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return offset;
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}
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static bool ix86_skip_instruction(sigsegv_address_t fault_instruction, unsigned long * regs)
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static bool ix86_skip_instruction(unsigned int * regs)
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{
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unsigned char * eip = (unsigned char *)fault_instruction;
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unsigned char * eip = (unsigned char *)regs[X86_REG_EIP];
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if (eip == 0)
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return false;
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// Transfer type
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enum {
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TYPE_UNKNOWN,
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TYPE_LOAD,
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TYPE_STORE
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} transfer_type = TYPE_UNKNOWN;
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// Transfer size
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enum {
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SIZE_BYTE,
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SIZE_WORD,
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SIZE_LONG
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} transfer_size = SIZE_LONG;
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transfer_type_t transfer_type = TYPE_UNKNOWN;
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transfer_size_t transfer_size = SIZE_LONG;
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int reg = -1;
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int len = 0;
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@ -467,151 +531,36 @@ static bool ix86_skip_instruction(sigsegv_address_t fault_instruction, unsigned
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return true;
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}
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#endif
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// Decode and skip PPC instruction
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#if (defined(powerpc) || defined(__powerpc__))
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#if defined(__linux__)
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enum {
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POWERPC_REG_GPR = 0,
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POWERPC_REG_NIP = 32
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};
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#endif
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static bool powerpc_skip_instruction(sigsegv_address_t fault_instruction, unsigned long * regs)
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#if (defined(powerpc) || defined(__powerpc__) || defined(__ppc__))
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static bool powerpc_skip_instruction(unsigned int * nip_p, unsigned int * regs)
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{
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// Get opcode and divide into fields
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unsigned int opcode = *((unsigned int *)fault_instruction);
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unsigned int primop = opcode >> 26;
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unsigned int exop = (opcode >> 1) & 0x3ff;
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unsigned int ra = (opcode >> 16) & 0x1f;
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unsigned int rb = (opcode >> 11) & 0x1f;
|
||||
unsigned int rd = (opcode >> 21) & 0x1f;
|
||||
signed int imm = (signed short)(opcode & 0xffff);
|
||||
instruction_t instr;
|
||||
powerpc_decode_instruction(&instr, *nip_p, regs);
|
||||
|
||||
// Analyze opcode
|
||||
enum {
|
||||
TYPE_UNKNOWN,
|
||||
TYPE_LOAD,
|
||||
TYPE_STORE
|
||||
} transfer_type = TYPE_UNKNOWN;
|
||||
enum {
|
||||
SIZE_UNKNOWN,
|
||||
SIZE_BYTE,
|
||||
SIZE_HALFWORD,
|
||||
SIZE_WORD
|
||||
} transfer_size = SIZE_UNKNOWN;
|
||||
enum {
|
||||
MODE_UNKNOWN,
|
||||
MODE_NORM,
|
||||
MODE_U,
|
||||
MODE_X,
|
||||
MODE_UX
|
||||
} addr_mode = MODE_UNKNOWN;
|
||||
switch (primop) {
|
||||
case 31:
|
||||
switch (exop) {
|
||||
case 23: // lwzx
|
||||
transfer_type = TYPE_LOAD; transfer_size = SIZE_WORD; addr_mode = MODE_X; break;
|
||||
case 55: // lwzux
|
||||
transfer_type = TYPE_LOAD; transfer_size = SIZE_WORD; addr_mode = MODE_UX; break;
|
||||
case 87: // lbzx
|
||||
transfer_type = TYPE_LOAD; transfer_size = SIZE_BYTE; addr_mode = MODE_X; break;
|
||||
case 119: // lbzux
|
||||
transfer_type = TYPE_LOAD; transfer_size = SIZE_BYTE; addr_mode = MODE_UX; break;
|
||||
case 151: // stwx
|
||||
transfer_type = TYPE_STORE; transfer_size = SIZE_WORD; addr_mode = MODE_X; break;
|
||||
case 183: // stwux
|
||||
transfer_type = TYPE_STORE; transfer_size = SIZE_WORD; addr_mode = MODE_UX; break;
|
||||
case 215: // stbx
|
||||
transfer_type = TYPE_STORE; transfer_size = SIZE_BYTE; addr_mode = MODE_X; break;
|
||||
case 247: // stbux
|
||||
transfer_type = TYPE_STORE; transfer_size = SIZE_BYTE; addr_mode = MODE_UX; break;
|
||||
case 279: // lhzx
|
||||
transfer_type = TYPE_LOAD; transfer_size = SIZE_HALFWORD; addr_mode = MODE_X; break;
|
||||
case 311: // lhzux
|
||||
transfer_type = TYPE_LOAD; transfer_size = SIZE_HALFWORD; addr_mode = MODE_UX; break;
|
||||
case 343: // lhax
|
||||
transfer_type = TYPE_LOAD; transfer_size = SIZE_HALFWORD; addr_mode = MODE_X; break;
|
||||
case 375: // lhaux
|
||||
transfer_type = TYPE_LOAD; transfer_size = SIZE_HALFWORD; addr_mode = MODE_UX; break;
|
||||
case 407: // sthx
|
||||
transfer_type = TYPE_STORE; transfer_size = SIZE_HALFWORD; addr_mode = MODE_X; break;
|
||||
case 439: // sthux
|
||||
transfer_type = TYPE_STORE; transfer_size = SIZE_HALFWORD; addr_mode = MODE_UX; break;
|
||||
}
|
||||
break;
|
||||
|
||||
case 32: // lwz
|
||||
transfer_type = TYPE_LOAD; transfer_size = SIZE_WORD; addr_mode = MODE_NORM; break;
|
||||
case 33: // lwzu
|
||||
transfer_type = TYPE_LOAD; transfer_size = SIZE_WORD; addr_mode = MODE_U; break;
|
||||
case 34: // lbz
|
||||
transfer_type = TYPE_LOAD; transfer_size = SIZE_BYTE; addr_mode = MODE_NORM; break;
|
||||
case 35: // lbzu
|
||||
transfer_type = TYPE_LOAD; transfer_size = SIZE_BYTE; addr_mode = MODE_U; break;
|
||||
case 36: // stw
|
||||
transfer_type = TYPE_STORE; transfer_size = SIZE_WORD; addr_mode = MODE_NORM; break;
|
||||
case 37: // stwu
|
||||
transfer_type = TYPE_STORE; transfer_size = SIZE_WORD; addr_mode = MODE_U; break;
|
||||
case 38: // stb
|
||||
transfer_type = TYPE_STORE; transfer_size = SIZE_BYTE; addr_mode = MODE_NORM; break;
|
||||
case 39: // stbu
|
||||
transfer_type = TYPE_STORE; transfer_size = SIZE_BYTE; addr_mode = MODE_U; break;
|
||||
case 40: // lhz
|
||||
transfer_type = TYPE_LOAD; transfer_size = SIZE_HALFWORD; addr_mode = MODE_NORM; break;
|
||||
case 41: // lhzu
|
||||
transfer_type = TYPE_LOAD; transfer_size = SIZE_HALFWORD; addr_mode = MODE_U; break;
|
||||
case 42: // lha
|
||||
transfer_type = TYPE_LOAD; transfer_size = SIZE_HALFWORD; addr_mode = MODE_NORM; break;
|
||||
case 43: // lhau
|
||||
transfer_type = TYPE_LOAD; transfer_size = SIZE_HALFWORD; addr_mode = MODE_U; break;
|
||||
case 44: // sth
|
||||
transfer_type = TYPE_STORE; transfer_size = SIZE_HALFWORD; addr_mode = MODE_NORM; break;
|
||||
case 45: // sthu
|
||||
transfer_type = TYPE_STORE; transfer_size = SIZE_HALFWORD; addr_mode = MODE_U; break;
|
||||
}
|
||||
|
||||
// Calculate effective address
|
||||
unsigned int addr = 0;
|
||||
switch (addr_mode) {
|
||||
case MODE_X:
|
||||
case MODE_UX:
|
||||
if (ra == 0)
|
||||
addr = regs[POWERPC_REG_GPR + rb];
|
||||
else
|
||||
addr = regs[POWERPC_REG_GPR + ra] + regs[POWERPC_REG_GPR + rb];
|
||||
break;
|
||||
case MODE_NORM:
|
||||
case MODE_U:
|
||||
if (ra == 0)
|
||||
addr = (signed int)(signed short)imm;
|
||||
else
|
||||
addr = regs[POWERPC_REG_GPR + ra] + (signed int)(signed short)imm;
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
if (transfer_type == TYPE_UNKNOWN) {
|
||||
if (instr.transfer_type == TYPE_UNKNOWN) {
|
||||
// Unknown machine code, let it crash. Then patch the decoder
|
||||
return false;
|
||||
}
|
||||
|
||||
#if DEBUG
|
||||
printf("%08x: %s %s access", fault_instruction,
|
||||
transfer_size == SIZE_BYTE ? "byte" : transfer_size == SIZE_HALFWORD ? "word" : "long",
|
||||
transfer_type == TYPE_LOAD ? "read" : "write");
|
||||
printf("%08x: %s %s access", *nip_p,
|
||||
instr.transfer_size == SIZE_BYTE ? "byte" : instr.transfer_size == SIZE_WORD ? "word" : "long",
|
||||
instr.transfer_type == TYPE_LOAD ? "read" : "write");
|
||||
|
||||
if (addr_mode == MODE_U || addr_mode == MODE_UX)
|
||||
printf(" r%d (ra = %08x)\n", ra, addr);
|
||||
if (transfer_type == TYPE_LOAD)
|
||||
printf(" r%d (rd = 0)\n", rd);
|
||||
if (instr.addr_mode == MODE_U || instr.addr_mode == MODE_UX)
|
||||
printf(" r%d (ra = %08x)\n", instr.ra, instr.addr);
|
||||
if (instr.transfer_type == TYPE_LOAD)
|
||||
printf(" r%d (rd = 0)\n", instr.rd);
|
||||
#endif
|
||||
|
||||
if (addr_mode == MODE_U || addr_mode == MODE_UX)
|
||||
regs[POWERPC_REG_GPR + ra] = addr;
|
||||
if (transfer_type == TYPE_LOAD)
|
||||
regs[POWERPC_REG_GPR + rd] = 0;
|
||||
if (instr.addr_mode == MODE_U || instr.addr_mode == MODE_UX)
|
||||
regs[instr.ra] = instr.addr;
|
||||
if (instr.transfer_type == TYPE_LOAD)
|
||||
regs[instr.rd] = 0;
|
||||
|
||||
regs[POWERPC_REG_NIP] += 4;
|
||||
*nip_p += 4;
|
||||
return true;
|
||||
}
|
||||
#endif
|
||||
@ -649,7 +598,7 @@ static void sigsegv_handler(SIGSEGV_FAULT_HANDLER_ARGLIST)
|
||||
#if HAVE_SIGSEGV_SKIP_INSTRUCTION
|
||||
else if (sigsegv_ignore_fault) {
|
||||
// Call the instruction skipper with the register file available
|
||||
if (SIGSEGV_SKIP_INSTRUCTION(fault_instruction, SIGSEGV_REGISTER_FILE))
|
||||
if (SIGSEGV_SKIP_INSTRUCTION(SIGSEGV_REGISTER_FILE))
|
||||
fault_recovered = true;
|
||||
}
|
||||
#endif
|
||||
|
||||
Loading…
Reference in New Issue
Block a user