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04dcff8ab4
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241 Commits

Author SHA1 Message Date
gbeauche
04dcff8ab4 Constrain NQD to powerpc (32-bit big endian) at this time 2004-04-18 23:17:54 +00:00
gbeauche
a65a6c6db2 Start Native QuickDraw acceleration 2004-04-18 23:03:53 +00:00
gbeauche
123a5210e4 Fix nested ppc_interrupt() stack corruption problem by allocating yet 
another stack when next signal is triggered. I am still unsure if
even MacOS would normally handle nested calls to NanoKernel interrupt
routine.
 2004-04-14 20:25:26 +00:00
gbeauche
fd474d041d Fix DGA mode for emulated PPC targets. It currently doesn't work in native 
mode as the stack is corrupted and we are jumping to garbage when moving
the mouse. Also add 1152x768 resolution from PBG4, but make timing match
the 1152x870 version.

Cleanups, further merges from Basilisk II tree.
 2004-04-13 22:22:22 +00:00
gbeauche
e6a05869ac Disable VidMode extension by default as some video cards don't support it 
well, thus causing a black screen. Besides, fix up sigsegv_recovery logic
 2004-04-13 22:13:19 +00:00
gbeauche
61aa371b48 Handle NO_CONFIGURE variable if we are only generating the configure script 2004-04-13 22:12:27 +00:00
gbeauche
e9ca9478d2 Map window close widget to the Mac "power" key. 2004-04-11 10:46:32 +00:00
gbeauche
9b4a75139e Merge run-time depth switching code from Basilisk II. 2004-04-10 23:15:22 +00:00
gbeauche
ec2511fd99 Load XPRAM default values if signature not found. i.e. don't hang on first 
boot.
 2004-04-06 19:47:56 +00:00
gbeauche
689d017cbd fix for SheepThreads (native mode) 2004-02-25 22:02:59 +00:00
gbeauche
9dc6cdc70e Portability fixes: declare Set_pthread_attr() only if HAVE_PTHREADS. Merge 
add_{serial,ether}_names() from B2 prefs editor for FreeBSD/IRIX.
 2004-02-24 23:09:39 +00:00
gbeauche
47348e8120 16-byte aligned memory allocator will try the following functions in-order 
(determined at compile-time): posix_memalign, memalign, valloc, malloc.
 2004-02-24 14:09:12 +00:00
gbeauche
ae93ea2f16 Make SheepShaver work with OS 8.6 out-of-the-box with no extra patch for 
the time being. i.e. ignore writes to the zero page when faking SCSIGlobals
 2004-02-24 11:12:54 +00:00
gbeauche
643f9ad5e5 fix auto-detection of SSE headers on x86 2004-02-24 10:21:21 +00:00
gbeauche
b802615c36 Don't include SSE/MMX intrinsics headers if they are not available 2004-02-20 17:33:28 +00:00
gbeauche
ab5adf0bb3 Add <*mmintrin.h> detection for generic SSE2/SSE/MMX optimizations 2004-02-20 17:21:08 +00:00
gbeauche
cdab3d6975 we have to 16-byte align sheepshaver_cpu object has it contains SSE values 
that require this alignment.
 2004-02-20 17:20:15 +00:00
gbeauche
443231c1da First round of SSE/MMX optimizations & experimentations. AltiVec Fractal 
Carbon performance increased by a factor 8 (420 MegaFlops).
 2004-02-20 17:18:44 +00:00
gbeauche
2b1f76f343 handle .rodata.cst4, generate HAVE_gen_op_XXX for compile-time detection of 
synthetic instruction generators available.
 2004-02-20 17:16:55 +00:00
gbeauche
ea3c6801ab Experiment with generic AltiVec optimizations for V4SF, V2DI operands (+60%) 2004-02-16 23:17:27 +00:00
gbeauche
680326da55 Add --with-dgcc=COMPILER to use C++ COMPILER (gcc) suitable to compile 
synthetic opcodes. Auto-detect ICC and force use of gcc for DYNGEN_CC.
 2004-02-16 16:30:22 +00:00
gbeauche
0c421f0be8 Filter out specific symbols first prior to triggering the general case with 
C++ symbol demangling.
 2004-02-16 15:36:34 +00:00
gbeauche
7a7abb30b4 GCC 3.4 fixes 2004-02-16 15:35:37 +00:00
gbeauche
18893e22bd GCC 3.4 does not allow the lazy_allocator instantiation, the other form is 
not supported by any GCC but ICC accepts it.
 2004-02-16 15:34:55 +00:00
gbeauche
8b66b778e6 Fixes for GCC 3.4 2004-02-16 15:33:22 +00:00
gbeauche
d10a3586f1 Year got increased "recently". ;-) 2004-02-16 10:57:07 +00:00
gbeauche
00280fbaaa is it better? 2004-02-16 09:05:28 +00:00
gbeauche
e944110707 try to fix cvs update -d conflicts 2004-02-16 09:04:57 +00:00
gbeauche
546f65a365 Now that we have AltiVec emulation, we can pretend for a G4 processor 
Also make sure to actually fix PVR code for 7400
 2004-02-15 17:20:36 +00:00
gbeauche
313cddeeb2 AltiVec emulation! ;-) 2004-02-15 17:17:37 +00:00
gbeauche
d92989dc53 Add AltiVec regression testsuite 2004-02-15 17:16:57 +00:00
gbeauche
8d4108dd3a Recognize 7400 & 7410 cpus 2004-01-31 11:10:49 +00:00
gbeauche
74cf5d2686 add barrier to inlined block dispatcher 2004-01-29 21:36:31 +00:00
gbeauche
c9edbd29ee Handle .rodata.cst16 on AMD64 for FP constants. 2004-01-27 17:02:13 +00:00
gbeauche
8afa65cc96 Inline fast basic block lookups. Only check top tag as it is a hit more than 
95% of the time. Overall, this improves performance by more than 2x on a P4.
 2004-01-27 13:54:51 +00:00
gbeauche
41d3975f22 Don't access VIA variables in NObj resource ID 100. aka. enable MacBench 5.0 
to run.
 2004-01-26 22:04:01 +00:00
gbeauche
9da81c79a2 Use bswap instruction on IA-32 too. Optimize bswap_64 on little-endian 
(x86 for now) systems.
 2004-01-26 13:52:31 +00:00
gbeauche
6a214d48b0 Faster double load/store on ia32 2004-01-26 13:51:01 +00:00
gbeauche
ea9553ee65 Optimize rlwinm further. Translate FP instructions if we don't need to 
compute exceptions.
 2004-01-25 23:21:06 +00:00
gbeauche
9c6b42b014 Optimize gen_mov_32_REG_im(0) case 2004-01-24 17:50:32 +00:00
gbeauche
82808234fa Merge in FP exceptions support but disable it for now as it is incomplete 
and slower. Implement mcrfs. Fix and optimize fctiw with native rounding.
 2004-01-24 16:43:45 +00:00
gbeauche
3de5a15902 Don't define disasm_block() in non-JIT mode. Also make sure to disassemble 
native code if we can (i.e. TARGET_NATIVE disassembler exists).
 2004-01-24 11:52:54 +00:00
gbeauche
10b9ab2c34 Generate PowerPC code wrapping GetResource() replacements. That way, it's 
a normal PPC function invocation that can be JIT compiled to native code
instead of nesting execute() calls which may lead to use the interpreter
(this took around 11% of total execution time on boot, downto 3%).

Also, optimize some SheepShaver EmulOps and actually report non-CTI.
 2004-01-24 11:28:06 +00:00
gbeauche
60d371486b Propagate done_compile down to compile1() in case it needs to override 
the end-of-block condition (e.g. sheep EmulOps)
 2004-01-24 11:22:48 +00:00
gbeauche
48d844a40a Add gen_spcflags_{init,set,clear} + load/store of GPRs to T2. 2004-01-24 11:20:33 +00:00
gbeauche
6a4463b8fb We need at least for native registers, hence we are guaranteed to have 
REG_T2 available. Add 16/32 sign-extension in T1. Add call generators
with (T0, T1) and (T0, T1, T2) arguments.
 2004-01-24 11:18:29 +00:00
gbeauche
324fba4137 Post-merge fixups: machine state wrappers, Apple assembler perticularities. 2004-01-18 22:59:06 +00:00
gbeauche
0665ab1139 No need to map ROM executable on emulated/ppc. Make sure to detect unaligned 
EA for lmw/stmw with real addr instead of relying on the signal number.
 2004-01-18 22:22:28 +00:00
gbeauche
7f13ce6fed Wrappers around machine state registers within signal handlers. 2004-01-18 22:14:31 +00:00
gbeauche
07fa8c79b3 Handle dummy files. Merge in configure stuff for Mach exception filters. 
Check whether struct sigaction defines sa_restorer member. Don't include
posix_sem.cpp on native Linux/ppc builds.
 2004-01-18 22:12:24 +00:00