340 Commits

Author SHA1 Message Date
Alexei Svitkine
4d5ed80740 dyngen: Fix more leaks. 2012-07-01 13:52:45 -04:00
Alexei Svitkine
a3a45f54e9 dyngen: Don't leak func_name on realloc and fix indentation. 2012-07-01 13:48:09 -04:00
Alexander von Gluck IV
668b8f14ba dyngen: Don't leak func_name if realloc fails 2012-07-01 13:46:12 -04:00
Alexander von Gluck IV
612761981f dyngen: Don't leak already malloc'ed demangled_name 2012-07-01 13:27:56 -04:00
Amadeusz Sławiński
8d5dc328e1 struct to class
In file included from ../kpx_cpu/sheepshaver_glue.cpp:32:
In file included from ../kpx_cpu/src/cpu/ppc/ppc-cpu.hpp:24:
../kpx_cpu/include/basic-cpu.hpp:50:1: warning: struct 'task_struct' was previously declared as a class [-Wmismatched-tags]
struct task_struct;
^
../kpx_cpu/include/task-plugin.hpp:27:7: note: previous use is here
class task_struct;
      ^
In file included from ../kpx_cpu/sheepshaver_glue.cpp:32:
In file included from ../kpx_cpu/src/cpu/ppc/ppc-cpu.hpp:24:
../kpx_cpu/include/basic-cpu.hpp:52:1: warning: 'basic_cpu' defined as a struct here but previously declared as a class [-Wmismatched-tags]
struct basic_cpu
^
../kpx_cpu/include/task-plugin.hpp:29:1: note: did you mean struct here?
class basic_cpu;
^~~~~
struct
../kpx_cpu/sheepshaver_glue.cpp:725:13: warning: unused function 'dump_log' [-Wunused-function]
static void dump_log(void)
            ^
3 warnings generated.
2012-06-21 21:51:52 -04:00
Alexei Svitkine
70f9c4dab9 Remove unused labels. 2012-06-21 21:48:32 -04:00
Alexei Svitkine
1bded034ad Support more reloc types in dyngen.c. 2012-06-19 00:17:30 -04:00
Christian Bauer
ca96911c07 add SheepShaver -> BasiliskII symlinks 2012-06-18 20:02:42 +02:00
asvitkine
d3787c146f force inlining to fix building with newer versions of gcc 2012-06-18 05:09:46 +00:00
asvitkine
6566ae16fa Dump PPC disassembly on crash 2012-06-16 02:16:40 +00:00
asvitkine
e9b8dd6877 always use the version of the code that scans backward on x86 2012-03-01 04:15:59 +00:00
asvitkine
14355b28cd fix test-powerpc build 2012-02-12 16:41:28 +00:00
asvitkine
fb4a2a6dc6 fix warning casting pointer to int 2011-12-28 20:15:08 +00:00
asvitkine
415e7d3f68 [Dave Dixon]
Patch file to fix JIT compiler on 64-bit Mac OS X 10.6 when using gcc 4.2.
This patch removes register rbx usage when compiling on 64-bit OS X.
2010-10-18 22:02:29 +00:00
asvitkine
b2d58d423e Fix compile problem with --enable-jit=no 2010-09-24 00:36:34 +00:00
asvitkine
e03ad25362 Fixed for Snow Leopard build. 2010-07-27 03:14:34 +00:00
asvitkine
b3c5b07f54 fix more platform compile failures caused by refactoring, based
on patch by Amadeusz Sławiński
2010-03-02 00:37:17 +00:00
asvitkine
2b03c79d48 fix dyngen.c breakage on non-MACHO platforms 2010-01-15 01:47:17 +00:00
asvitkine
8e1a2f7f48 use correct variable name 2009-11-19 02:07:44 +00:00
asvitkine
ded367a176 [ Patch from Jean-Pierre <chombier@free.fr> ]
More changes to support mach-o x86_64.
2009-11-13 01:46:35 +00:00
asvitkine
f4705aa5e1 code whitespace cleanup and patch_relocations() function 2009-11-08 19:11:02 +00:00
asvitkine
df4aef1fba [ Patch from Jean-Pierre <chombier@free.fr> ]
Dyngen patch for Snow Leopard x86_64 compatibility.
This work is mostly based on the unofficial and incomplete x86_64 mach-o patch of qemu.
2009-11-08 18:16:31 +00:00
asvitkine
b3b5db5456 [Michael Schmitt]
Attached is a patch to SheepShaver to fix memory allocation problems when OS X 10.5 is the host. It also relaxes the 512 MB RAM limit on OS X hosts.


Problem
-------
Some users have been unable to run SheepShaver on OS X 10.5 (Leopard) hosts. The symptom is error "ERROR: Cannot map RAM: File already exists".

SheepShaver allocates RAM at fixed addresses. If it is running in "Real" addressing mode, and can't allocate at address 0, then it was hard-coded to allocate the RAM area at 0x20000000. The ROM area as allocated at 0x40800000.

The normal configuration is for SheepShaver to run under SDL, which is a Cocoa wrapper. By the time SheepShaver does its memory allocations, the Cocoa application has already started. The result is the SheepShaver memory address space already contains libraries, fonts, Input Managers, and IOKit areas.

On Leopard hosts these areas can land on the same addresses SheepShaver needs, so SheepShaver's memory allocation fails.


Solution
--------
The approach is to change SheepShaver (on Unix & OS X hosts) to allocate the RAM area anywhere it can find the space, rather than at a fixed address.

This could result in the RAM allocated higher than the ROM area, which causes a crash. To prevent this from occurring, the RAM and ROM areas are allocated contiguously.

Previously the ROM starting address was a constant ROM_BASE, which was used throughout the source files. The ROM start address is now a variable ROMBase. ROMBase is allocated and set by main_*.cpp just like RAMBase.

A side-effect of this change is that it lifts the 512 MB RAM limit for OS X hosts. The limit was because the fixed RAM and ROM addresses were such that the RAM could only be 512 MB before it overlapped the ROM area.


Impact
------
The change to make ROMBase a variable is throughout all hosts & addressing modes.

The RAM and ROM areas will only shift when run on Unix & OS X hosts, otherwise the same fixed allocation address is used as before.

This change is limited to "Real" addressing mode. Unlike Basilisk II, SheepShaver *pre-calculates* the offset for "Direct" addressing mode; the offset is compiled into the program. If the RAM address were allowed to shift, it could result in the RAM area wrapping around address 0.


Changes to main_unix.cpp
------------------------
1. Real addressing mode no longer defines a RAM_BASE constant.

2. The base address of the Mac ROM (ROMBase) is defined and exported by this program.

3. Memory management helper vm_mac_acquire is renamed to vm_mac_acquire_fixed. Added a new memory management helper vm_mac_acquire, which allocates memory at any address.

4. Changed and rearranged the allocation of RAM and ROM areas.

Before it worked like this:

  - Allocate ROM area
  - If can, attempt to allocate RAM at address zero
  - If RAM not allocated at 0, allocate at fixed address

We still want to try allocating the RAM at zero, and if using DIRECT addressing we're still going to use the fixed addresses. So we don't know where the ROM should be until after we do the RAM. The new logic is:

  - If can, attempt to allocate RAM at address zero
  - If RAM not allocated at 0
      if REAL addressing
         allocate RAM and ROM together. The ROM address is aligned to a 1 MB boundary
      else (direct addressing)
         allocate RAM at fixed address
  - If ROM hasn't been allocated yet, allocate at fixed address

5. Calculate ROMBase and ROMBaseHost based on where the ROM was loaded.

6. There is a crash if the RAM is allocated too high. To try and catch this, check if it was allocated higher than the kernel data address.

7. Change subsequent code from using constant ROM_BASE to variable ROMBase.


Changes to Other Programs
-------------------------
emul_op.cpp, main.cpp, name_registery.cpp, rom_patches.cpp, rsrc_patches.cpp, emul_ppc.cpp, sheepshaver_glue.cpp, ppc-translate-cpp:
Change from constant ROM_BASE to variable ROMBase.

ppc_asm.S: It was setting register to a hard-coded literal address: 0x40b0d000. Changed to set it to ROMBase + 0x30d000.

ppc_asm.tmpl: It defined a macro ASM_LO16 but it assumed that the macro would always be used with operands that included a register specification. This is not true. Moved the register specification from the macro to the macro invocations.

main_beos.cpp, main_windows.cpp: Since the subprograms are all expecting a variable ROMBase, all the main_*.cpp pgrams have to define and export it. The ROM_BASE constant is moved here for consistency. The mains for beos and windows just allocate the ROM at the same fixed address as before, set ROMBaseHost and ROMBase to that address, and then use ROMBase for the subsequent code.

cpu_emulation.h: removed ROM_BASE constant. This value is moved to the main_*.cpp modules, to be consistent with RAM_BASE.

user_strings_unix.cpp, user_strings_unix.h: Added new error messages related to errors that occur when the RAM and ROM are allocated anywhere.
2009-08-18 18:26:11 +00:00
asvitkine
581ff8d86f add prefs option to ignore illegal instructions (ignoreillegal) 2009-07-20 18:50:28 +00:00
asvitkine
d6db773362 [patch from Darik Horn <dajhorn@vanadac.com> ]
Makes SheepShaver compatible with Ubuntu Intrepid and
other distros that bundle the gcc-4.3 compiler.

The patch changes two things:

1. Renames the block_cache where its name collides with its class
definition.

2. Fixes the "explicit template specialization cannot have a storage
class" error in the ppc-dyngen-ops.cpp file.
2009-01-15 23:25:08 +00:00
asvitkine
5505a5dc62 Change < to - in qsort compare functions to correctly return 0 for equality. 2008-09-14 19:54:36 +00:00
asvitkine
1002714623 Add frameskip 0 ("Dynamic") to MacOSX Prefs Editor, and fix line endings
and deprication warnings in the Objective-C code. Also, don't specify array
size with a macro in a header file.
2008-06-17 04:26:56 +00:00
gbeauche
b083b08fd1 Cope with recent run-time assembler changes. 2008-02-12 14:52:25 +00:00
gbeauche
b5746b4f68 Add SSSE3 optimizations (Intel Core 2 CPUs and newer) for LVX, STVX, VPERM.
This brings an overall +10% performance improvement in AltiVec Fractal Carbon.
2008-01-01 21:51:56 +00:00
gbeauche
c581996f82 Detect SSE 4.1 and SSE 4.1. 2008-01-01 13:34:47 +00:00
gbeauche
054c37ca0c Happy New Year! 2008-01-01 09:47:39 +00:00
gbeauche
19e145ad16 Sync with new SIGSEGV API. 2007-12-30 09:18:40 +00:00
gbeauche
efa32be9ec Optimize invalidate_cache_range() for short ranges. 2007-07-21 10:25:51 +00:00
gbeauche
b20a76f580 merge PPC_PROFILE_REGS_USE fixes from KPX branch 2007-02-17 09:01:31 +00:00
gbeauche
8e0088c4c6 generate lwarx/swcx. native code only for uniprocessor emulation 2007-02-17 08:59:56 +00:00
gbeauche
9999881c78 Enable JIT in non-constructor so that a user-defined value can be set later 2007-01-21 13:44:27 +00:00
gbeauche
3b6a579f33 Optimize lwarx/stwcx for uniprocessors and generate code for them. There is
no performance increase even though those two instructions represented approx
18M of untranslated instructions on a simple boot to MacOS.
2007-01-18 07:02:35 +00:00
gbeauche
b9486d35e3 Rearrange powerpc_registers struct and nuke fp_result register which is
only needed for JIT (and to be handled differently in the future).
2007-01-17 07:05:19 +00:00
gbeauche
69d3fcba95 Update for new instr_info_t format 2007-01-17 06:56:09 +00:00
gbeauche
5b0b60da76 Remove specialised decoders. This will be done differently, if necessary. 2007-01-17 06:20:36 +00:00
gbeauche
e4af8a1909 Report SSSE3 instead of SSE4 (to be released later). 2007-01-15 07:00:16 +00:00
gbeauche
954593d1c0 Generate spcflags checks at the start of the block. This makes better
opportunities when CR cache is implemented.
2006-07-30 16:29:10 +00:00
gbeauche
bcf7f9a2cd Add throw() specs for Linux glibc platforms 2006-07-30 09:49:21 +00:00
gbeauche
2c27914196 Fix op_record_cr6_VD() to use less branches (gcc 4.1.2 build fix on x86-32) 2006-07-19 22:21:46 +00:00
gbeauche
7705f85655 Add missing implementations for VAVGUB & VAVGUH. Optimize VSEL too. 2006-07-17 21:47:18 +00:00
gbeauche
07bf6fe6c1 Fix typo for ANDPS, ANDPD, ANDSS, ANDSD 2006-07-17 21:46:15 +00:00
gbeauche
c8a273332f Fix for 32-bit x86, was generating setcc CC,%dh instead of %dl.
i.e. force use of ecx & edx -- though it was fine in 64-bit mode, of course
2006-07-17 07:34:33 +00:00
gbeauche
e07e2196e3 Use new code generator. The gain is only 10%, bottlenecks are elsewhere.
Optimize Altivec vector splat instructions after Agner's guide.
2006-07-17 06:56:38 +00:00
gbeauche
ceb43ce19a Define global XMM registers for SIMD & FPU (64-bit mode) 2006-07-17 06:52:13 +00:00
gbeauche
4e624209d3 Add new code generator for testing purposes (i386, x86_64) -- It's to be
used for mid-level optimizations
2006-07-17 06:49:07 +00:00