gbeauche
389dd61d0d
Check for SIGSEGVs from DR Cache code too.
2004-05-31 10:08:31 +00:00
gbeauche
619aa9b319
Translate LMW, STMW and DCBZ instructions.
2004-05-23 16:34:38 +00:00
gbeauche
b0aae35951
Do FOLLOW_CONST_JUMPS for bcl 20,BI,TARGET branches too, since that's an
...
unconditional jump and we don't need the LR in that case.
Also fix this:
SheepShaver: ../kpx_cpu/src/cpu/ppc/ppc-translate.cpp:1499: powerpc_block_info* powerpc_cpu::compile_block(unsigned int): Assertion `dg.jmp_addr[i] != __null' failed.
Aborted
aka. StuffIt Expander + pressing the 'Cancel' button.
2004-05-23 06:41:25 +00:00
gbeauche
05bd5f40b4
Fix NativeOp code generation, especially in PPC_REENTRANT_JIT mode
2004-05-23 05:28:12 +00:00
gbeauche
f376933138
Attempt to fix direct block chaining code in corner cases. e.g. really
...
chain only blocks within page boundaries (compare against block entry point)
2004-05-22 17:57:36 +00:00
gbeauche
3a033cf79b
atomic spcflags
2004-05-20 17:19:59 +00:00
gbeauche
bd6eaf680a
Get rid of old (and broken) ASYNC_IRQ / MUTICORE code
2004-05-20 12:33:58 +00:00
gbeauche
3a960764ea
Don't allow "recursive" NanoKernel interrupts
2004-05-20 11:47:27 +00:00
gbeauche
ec6c98035b
Better interrupt context checking code
2004-05-20 11:05:30 +00:00
gbeauche
c3f2342f47
Make NativeOp() handler a sheepshaver_cpu handler, thus getting rid of ugly
...
GPR macro definition.
Make the JIT engine somewhat reentrant. This brings a massive performance
boost for applications that cause many Execute68k(). e.g. audio in PlayerPRO.
2004-05-19 21:23:17 +00:00
gbeauche
ae0e7293dd
Don't take an EMUL_OP mode switch for Microseconds() and SynchIdleTime()
2004-05-15 17:26:28 +00:00
gbeauche
7da40bee5c
Handle SAFE_INTERRUPT_PPC to check possible nested calls (and this happens)
2004-05-12 15:54:23 +00:00
gbeauche
05fad61b21
Direct block chaining works on all supported platforms
2004-05-12 11:36:39 +00:00
gbeauche
81ae2fee40
Direct block chaining on x86 and amd64 too. Optimize do_execute_branch_bo<>
...
No need to update Program Counter if we have direct linked blocks.
TODO: remove obsolete PC-related generators
2004-05-12 10:44:04 +00:00
gbeauche
15a0779328
Size optimization: don't generate jump_next_A0() code in block chaining
...
mode since the only case we would reach that is when there are pending
interrupts, thus needing to exit from this basic block ASAP. Otherwise,
we jumped to linker trampolines
2004-05-11 21:53:48 +00:00
gbeauche
08bcd2653d
direct block chaining, aka faster block dispatcher
2004-05-11 20:53:25 +00:00
gbeauche
5164fc9dfc
parentesisation
2004-05-07 14:19:50 +00:00
gbeauche
2eda71a795
build fixes for x86 and some older compilers
2004-05-07 13:27:26 +00:00
gbeauche
ba7bfc478e
Extend NativeOp count to 64 (6-bit value), aka fix NATIVE_FILLRECT opcpdes.
...
Translate NQD_{bitblt,fillrect,invrect} to direct native calls.
Use Mac2HostAddr() for converting Mac base address to native.
2004-04-22 22:54:47 +00:00
gbeauche
8b40a7e721
NQD: use ReadMacInt*() and WriteMacInt*() accessors, i.e. code should now
...
be little-endian and 64-bit safe.
2004-04-22 21:45:18 +00:00
gbeauche
b4ac3fb507
Basic fillrect/invrect NQD. Code may need to be factored out somehow.
...
Verify that bitblt NQD transfer modes are really CopyBits() ones [MB5].
2004-04-22 20:57:31 +00:00
gbeauche
a65a6c6db2
Start Native QuickDraw acceleration
2004-04-18 23:03:53 +00:00
gbeauche
47348e8120
16-byte aligned memory allocator will try the following functions in-order
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(determined at compile-time): posix_memalign, memalign, valloc, malloc.
2004-02-24 14:09:12 +00:00
gbeauche
ae93ea2f16
Make SheepShaver work with OS 8.6 out-of-the-box with no extra patch for
...
the time being. i.e. ignore writes to the zero page when faking SCSIGlobals
2004-02-24 11:12:54 +00:00
gbeauche
643f9ad5e5
fix auto-detection of SSE headers on x86
2004-02-24 10:21:21 +00:00
gbeauche
b802615c36
Don't include SSE/MMX intrinsics headers if they are not available
2004-02-20 17:33:28 +00:00
gbeauche
cdab3d6975
we have to 16-byte align sheepshaver_cpu object has it contains SSE values
...
that require this alignment.
2004-02-20 17:20:15 +00:00
gbeauche
443231c1da
First round of SSE/MMX optimizations & experimentations. AltiVec Fractal
...
Carbon performance increased by a factor 8 (420 MegaFlops).
2004-02-20 17:18:44 +00:00
gbeauche
2b1f76f343
handle .rodata.cst4, generate HAVE_gen_op_XXX for compile-time detection of
...
synthetic instruction generators available.
2004-02-20 17:16:55 +00:00
gbeauche
ea3c6801ab
Experiment with generic AltiVec optimizations for V4SF, V2DI operands (+60%)
2004-02-16 23:17:27 +00:00
gbeauche
0c421f0be8
Filter out specific symbols first prior to triggering the general case with
...
C++ symbol demangling.
2004-02-16 15:36:34 +00:00
gbeauche
7a7abb30b4
GCC 3.4 fixes
2004-02-16 15:35:37 +00:00
gbeauche
18893e22bd
GCC 3.4 does not allow the lazy_allocator instantiation, the other form is
...
not supported by any GCC but ICC accepts it.
2004-02-16 15:34:55 +00:00
gbeauche
d10a3586f1
Year got increased "recently". ;-)
2004-02-16 10:57:07 +00:00
gbeauche
313cddeeb2
AltiVec emulation! ;-)
2004-02-15 17:17:37 +00:00
gbeauche
d92989dc53
Add AltiVec regression testsuite
2004-02-15 17:16:57 +00:00
gbeauche
74cf5d2686
add barrier to inlined block dispatcher
2004-01-29 21:36:31 +00:00
gbeauche
c9edbd29ee
Handle .rodata.cst16 on AMD64 for FP constants.
2004-01-27 17:02:13 +00:00
gbeauche
8afa65cc96
Inline fast basic block lookups. Only check top tag as it is a hit more than
...
95% of the time. Overall, this improves performance by more than 2x on a P4.
2004-01-27 13:54:51 +00:00
gbeauche
6a214d48b0
Faster double load/store on ia32
2004-01-26 13:51:01 +00:00
gbeauche
ea9553ee65
Optimize rlwinm further. Translate FP instructions if we don't need to
...
compute exceptions.
2004-01-25 23:21:06 +00:00
gbeauche
9c6b42b014
Optimize gen_mov_32_REG_im(0) case
2004-01-24 17:50:32 +00:00
gbeauche
82808234fa
Merge in FP exceptions support but disable it for now as it is incomplete
...
and slower. Implement mcrfs. Fix and optimize fctiw with native rounding.
2004-01-24 16:43:45 +00:00
gbeauche
3de5a15902
Don't define disasm_block() in non-JIT mode. Also make sure to disassemble
...
native code if we can (i.e. TARGET_NATIVE disassembler exists).
2004-01-24 11:52:54 +00:00
gbeauche
10b9ab2c34
Generate PowerPC code wrapping GetResource() replacements. That way, it's
...
a normal PPC function invocation that can be JIT compiled to native code
instead of nesting execute() calls which may lead to use the interpreter
(this took around 11% of total execution time on boot, downto 3%).
Also, optimize some SheepShaver EmulOps and actually report non-CTI.
2004-01-24 11:28:06 +00:00
gbeauche
60d371486b
Propagate done_compile down to compile1() in case it needs to override
...
the end-of-block condition (e.g. sheep EmulOps)
2004-01-24 11:22:48 +00:00
gbeauche
48d844a40a
Add gen_spcflags_{init,set,clear} + load/store of GPRs to T2.
2004-01-24 11:20:33 +00:00
gbeauche
6a4463b8fb
We need at least for native registers, hence we are guaranteed to have
...
REG_T2 available. Add 16/32 sign-extension in T1. Add call generators
with (T0, T1) and (T0, T1, T2) arguments.
2004-01-24 11:18:29 +00:00
gbeauche
09cd7ccfd6
gcc on darwin defines __ppc__, not __powerpc__
2004-01-14 23:16:37 +00:00
gbeauche
07f0be19b5
Fix FP single operations. aka fix scrollbar & Graphing Calculator bugs.
2004-01-13 23:50:09 +00:00
