Macintosh-Tools/macemu
1
0
Fork 0
mirror of https://github.com/kanjitalk755/macemu.git synced 2024-12-27 00:29:40 +00:00
Code Issues Projects Releases Wiki Activity
939 Commits 6 Branches 17 Tags 21 MiB
c9edbd29ee
Commit Graph

208 Commits

Author SHA1 Message Date
gbeauche
213b8c1b7d audio fixes 2003-12-27 09:08:51 +00:00
gbeauche
9e1d1606ff Cosmetic fixes to vm_write_memory_*() functions. 2003-12-26 17:27:47 +00:00
gbeauche
97ce4fdc75 Match Linux/ppc native version better: jump to ROM with EmulatorData in r4, 
preserve CR & XER registers on EmulOp.
 2003-12-25 23:54:36 +00:00
gbeauche
561046449a Fix no JIT & no decode cache case to default to interpretive mode only. 2003-12-25 23:33:15 +00:00
gbeauche
f5aed53e3c clean-ups, going to beat myself tonight 2003-12-15 15:27:01 +00:00
gbeauche
c3a706d354 There may be extra instructions before moving stuff to SCC registers. 2003-12-15 15:25:38 +00:00
gbeauche
24c4ae354c Fix SCC initialization code detection. Move up AddrMap patch space since 
we clobber 40 bytes below it and it may intersect with GetScrap patch space.
 2003-12-15 15:23:59 +00:00
gbeauche
ae8c08b260 Generic ROM patches from ROMTYPE_PARCELS experiments, no apparent 
regession. There is no improvement either.
 2003-12-14 14:23:46 +00:00
gbeauche
bbde2a2054 Use an alternate stack base while servicing PowerPC interrupts. 2003-12-05 13:37:56 +00:00
gbeauche
c3bb2eabf1 Really clear the zero page. 2003-12-05 12:41:19 +00:00
gbeauche
4755f118df Revert 32-bit EA load/stores workaround, problem was 0xffffffff read from 
[PgChk]+4 which yields to 3 on 32-bit arches and something > 32-bit on AMD64
 2003-12-05 12:38:44 +00:00
gbeauche
e517594a51 Fake reading from [HpChk]+4 (FIXME: the callchain reports some function 
from DriverServicesLib). Also make fake SCSIGlobals map to zero page.
 2003-12-05 12:37:14 +00:00
gbeauche
44e54f730a Add XLM_ZERO_PAGE globals which points to a read-only page with all bits 
set to zero.
 2003-12-05 12:36:11 +00:00
gbeauche
091a219280 Use a unique ExecuteNative() interface in any case, i.e. native & emulated 2003-12-04 23:37:38 +00:00
gbeauche
7a7363fd18 Forgot to add thunks.cpp to BeOS Makefile too 2003-12-04 22:34:48 +00:00
gbeauche
d1a676eb1c Fix ExecutePPC() with nw SheepRoutineDescriptor 2003-12-04 22:34:34 +00:00
gbeauche
ddbebd7111 Fix ExecutePPC() merge with new SheepRoutineDescriptor 2003-12-04 22:33:24 +00:00
gbeauche
779b4858d2 We do need <pthread.h> in any case, especially native Linux/PPC 2003-12-04 22:29:15 +00:00
gbeauche
63219873b4 Don't set WANT_JIT if not EMULATED_PPC 2003-12-04 22:28:40 +00:00
gbeauche
158f63d1e3 Force 32-bit EA in load/store operations. This fixes SheepShaver/JIT on AMD64. 2003-12-04 18:10:36 +00:00
gbeauche
5dca41d253 Add gen_invoke_CPU_im_im() to invoke do_record_step(pc, opcode). 2003-12-04 17:53:04 +00:00
gbeauche
328bb9f239 Add new thunking system for 64-bit fixes. 2003-12-04 17:26:38 +00:00
gbeauche
982424dabd Use "cpu/vm.hpp" if EMULATED_PPC, so that target optimized functions are 
used to match alignment/endianess needs.
 2003-12-03 15:06:09 +00:00
gbeauche
490fa2d553 Add x86 asm opts (though disabled for now) 2003-12-03 11:45:45 +00:00
gbeauche
5b0569944f Don't enable asm opts for now, this hides measurability of other generic 
optimizations. Remove no longer used synthetic instructions.
 2003-12-03 11:45:13 +00:00
gbeauche
0c2735dbcc fix stats reports 2003-12-03 10:59:43 +00:00
gbeauche
7ebe0347bf Add "jit" prefs item. Fix PPC_DECODE_CACHE version to fill in new min_pc & 
max_pc members of block info. Increase -finline-limit to 10000 for older gcc
 2003-12-03 10:52:50 +00:00
gbeauche
34f90d6b3a PowerPC tester: open results file in binary mode, aka fix pb on DOS. 2003-12-03 09:16:46 +00:00
gbeauche
8db8d10287 fix extraction of XER from QEMU engine 2003-12-03 07:27:05 +00:00
gbeauche
04214f3820 Fix decrement the CTR, then branch conditional if decremented CTR != 0. 
Remove CR cache for now. Remove BC & MODE_68K hacks for SheepShaver,
that was a colateral damage of wrong branch emulation of the former.
 2003-12-02 22:49:18 +00:00
gbeauche
dc79320904 cleanups 2003-12-02 15:00:40 +00:00
gbeauche
3ca595a337 PowerPC tester: add support for QEMU engine. 2003-12-02 14:57:07 +00:00
gbeauche
07c8e505c9 PowerPC tester: add support for Bart's Model 3 CPU emulator 2003-12-02 11:29:46 +00:00
gbeauche
32133b2261 Add PPC_PROFILE_GENERIC_CALLS, don't enable PPC_PROFILE_COMPILE_TIME by 
default.
 2003-12-01 13:51:35 +00:00
gbeauche
e2ca6270f8 Implement ISYNC, MTCRF, MCRF. 2003-12-01 13:40:38 +00:00
gbeauche
054748532a NOP'ize unimplemented instructions 2003-12-01 13:21:41 +00:00
gbeauche
dd956c78db gather some stats on untranslated instructions 2003-12-01 13:07:26 +00:00
gbeauche
32f34c07c5 fix stack allocation, really roundup to next 16 KB boundaries 2003-12-01 11:02:13 +00:00
gbeauche
f034ae704f handle ROM areas and put associated blocks into dormant state 2003-12-01 00:16:21 +00:00
gbeauche
ceb9b4a428 cleanups & optimize for constant branches (i.e. follow them). 2003-12-01 00:03:02 +00:00
gbeauche
4a3cd024ed better handling of static translation cache allocation, handle nested 
execution paths from the cpu core, cleanups for KPX_MAX_CPUS == 1.
 2003-11-30 17:21:53 +00:00
gbeauche
c1dba58808 fix & reenable asm compare ops for ppc 2003-11-30 17:18:17 +00:00
gbeauche
10db506aa5 handle CR cache though it's not efficient with current approach without 
superblock (traces) optimization.
 2003-11-30 17:17:32 +00:00
gbeauche
7594e26d36 fix new block creation on full cache that was just invalidated, add 
provisions for following constants jumps in next commit.
 2003-11-30 17:16:24 +00:00
gbeauche
833fc0c935 remove dead code 2003-11-30 17:13:10 +00:00
gbeauche
efad4ff3b6 Handle even more XER test masks to be preserved or to be set. 2003-11-30 09:07:36 +00:00
gbeauche
d0a2277325 Gather stats about compile time. Define KPX_MAX_CPUS to 1 for allowing 
allocation of translation cache into .data section on PowerPC.
 2003-11-28 22:13:50 +00:00
gbeauche
0301afb3eb first part of CR caching fixes 2003-11-28 22:11:59 +00:00
gbeauche
6a7c8f7e83 Add PowerPC tester glue for Microlib CPU core 2003-11-28 15:12:37 +00:00
gbeauche
3bea82fa1c fix merge, hunks were missing 2003-11-27 23:59:00 +00:00
gbeauche
8ca440d0b5 Fix SRAW on non PowerPC platforms. 2003-11-27 23:53:41 +00:00
gbeauche
8711c4afd6 Add support for external results file for non PowerPC platforms. 2003-11-27 23:52:19 +00:00
gbeauche
687b9c5a74 I manually synchronize with Kheperix code. 2003-11-27 20:07:33 +00:00
gbeauche
aee3e05e4b The JIT should work now but there is an extra bottleneck causing it to 
not match Kheperix speeds while executing Linux/ppc binaries.

Fix x86 DYNGEN_OP_FLAGS settings. Only allocate translation cache in .data
on PPC since x86 can do jumps anywhere.
 2003-11-27 11:09:38 +00:00
gbeauche
2bacb2fd01 Workaround CR expectations in MODE_68K execution 2003-11-27 11:06:23 +00:00
gbeauche
d7ac6a0e68 Fix SLW & SRW, an x86 does not work the same way as a ppc 2003-11-27 10:53:37 +00:00
gbeauche
ae2d91912c fix dummy includes 2003-11-27 10:06:27 +00:00
gbeauche
36ce9c07e6 Statically allocate the translation cache on PowerPC. This makes it possible 
to generate direct bl instructions for function invokation.
 2003-11-27 00:26:35 +00:00
gbeauche
e30001bc00 Fix BCCTR & BCLR. However, conditions are still wrong somehow, disabled 
this case. Factored & optimized branch instructions.
 2003-11-26 23:58:14 +00:00
gbeauche
2eba241021 self credit cpu emulator ;-) 2003-11-25 10:27:59 +00:00
gbeauche
73d51962f6 Merge in-progress PowerPC "JIT1" engine for AMD64, IA-32, PPC. 
The merge probably got wrong as there are some problems probably due to the
experiment begining with CR deferred evaluation. With nbench/ppc, performance
improvement was around 2x. With nbench on x86, performance improvement was
around 4x on average.

Incompatible change: instr_info_t has a new field in the middle. But since
insertion of PPC_I(XXX) identifiers is auto-generated, there is no problem.
 2003-11-24 23:45:52 +00:00
gbeauche
7968a20100 Handle "JIT1" engine but disable it for now since there are some problems 
with SheepShaver integration from Kheperix.
 2003-11-24 23:39:35 +00:00
gbeauche
09a774ae51 Add link to B2 Unix/config.{guess,sub} 2003-11-24 22:19:35 +00:00
gbeauche
2a0f750a83 Optimize memory accesses on little endian systems that can do unaligned 
accesses to memory. Fix build when vm.hpp is included in a C program.
 2003-11-24 21:30:17 +00:00
gbeauche
04349eebce Optimized bswap_32() for AMD64 2003-11-24 21:20:47 +00:00
gbeauche
1dbe1179c6 Merge in "keycodes" support from Basilisk II. e.g. make French keyboard 
layout work correctly for me.
 2003-11-21 17:01:33 +00:00
gbeauche
5b950fa2ef fix shm screen image allocation. 2003-11-20 16:24:57 +00:00
gbeauche
b7c917e6d1 little endian fixes to name registry 2003-11-20 15:54:10 +00:00
gbeauche
e9f3546539 Remove even more obsolete code. Drop TBL/TBU registers, they are manually 
handled through the mftb instruction accessor.
 2003-11-11 11:44:34 +00:00
gbeauche
cf0ed72f24 Remove obsolete code related to PPC_NO_FPSCR_UPDATE, PPC_LAZY_PC_UPDATE, 
PPC_LAZY_CC_UPDATE, PPC_HAVE_SPLIT_CR defines.
 2003-11-11 11:32:27 +00:00
gbeauche
b66d8ef433 Fix "ignoresegv" case to actually skip the faulty instruction. Merge 
conditions to skip instruction on SIGSEGVfrom PowerPC native mode. The
instruction skipper takes care to set the output register to 0.
 2003-11-10 16:23:58 +00:00
gbeauche
26ec1b8899 Merge Set_pthread_attr() from Basilisk II. 2003-11-10 16:05:52 +00:00
gbeauche
0260210ddf - XLM_IRQ_NEST is always in native byte order format since any write to 
this variable go through {Enable,Disable}Interrupt().
- Add Ether thunks but only for WORDS_BIGENDIAN case since we do need more
complicated translation functions.
 2003-11-10 15:11:44 +00:00
gbeauche
cbb8efd492 little endian fixes 2003-11-10 14:18:34 +00:00
gbeauche
cd86ff9e94 - Start emulating the FPSCR. Fix mtfsf, mffs. 
- Implement mftbr so that MacOS can fully boot with extensions. However,
  using clock() is probably not the right solution. Patching UpTime from
  DriverServicesLib et al. may be a better solution.
 2003-11-09 15:39:30 +00:00
gbeauche
59e6227c08 fix mullwo & divw on invalid inputs 2003-11-09 07:19:39 +00:00
gbeauche
aebcb7a6bb New testing framework faster to compile and more flexible. i.e. we now 
generate 350K+ instructions. This exhausts errors for mullwo & divw.
 2003-11-08 11:57:04 +00:00
gbeauche
4b73163083 Fix PPC_LAZY_CC_UPDATE build. TODO: remove since this is slower. 2003-11-04 22:01:36 +00:00
gbeauche
175dfeea02 fix lfs/stfs breakage introduced with latest FPR type change 2003-11-04 20:56:21 +00:00
gbeauche
8c40d739b6 Add some statistics for interrupt handling, Execute68k/Trap, MacOS & NativeOp 2003-11-04 20:48:29 +00:00
gbeauche
42e1cabc94 Move variables for compile statistics to powerpc_cpu private data 2003-11-04 20:45:46 +00:00
gbeauche
30bd089279 PowerPC floating-point registers are now an union of uint64 & double. This 
eases FP load/stores.
 2003-11-04 15:03:15 +00:00
gbeauche
8ddf749ed5 fix vm_do_read_memory_8() 2003-11-04 15:00:02 +00:00
gbeauche
a42281aad1 Implement partial block cache invalidation. Rewrite core cached blocks 
execution loop with a Duff's device. Gather some predecode time statistics.
This shows that only around 2% of total emulation time is spent for
predecoding the instructions.
 2003-11-03 21:28:32 +00:00
gbeauche
f0ea192460 Optimized pointers to non virtual member functions. This reduces space 
and overhead since runtime checks are eliminated. Actually, it yields
up to 10% performance improvement with specialized decoders.
 2003-11-02 14:48:20 +00:00
gbeauche
d956d3c4ca add specialized instruction decoders (disabled for now) 2003-11-01 17:07:17 +00:00
gbeauche
066af7452a fix ppc-execute.o dependency 2003-11-01 17:03:55 +00:00
gbeauche
89d0f9ca29 Integrate spcflags handling code to kpx_cpu core. We can also remove 
oldish EXEC_RETURN handling with a throw/catch mechanism since we
do have a dependency on extra conditions (invalidated cache) that
prevents fast execution loops.
 2003-11-01 15:15:31 +00:00
gbeauche
9ce43c6cf3 Fix ASYNC_IRQ build but locks may still happen. Note that with a predecode 
cache, checking for pending interrupts may not be the bottle neck nowadays.
 2003-10-26 14:16:40 +00:00
gbeauche
60d34a6816 Rewrite interrupts handling code so that the emulator can work with a 
predecode cache. This implies to run in interpreted mode only while
processing EmulOps or other native (nested) runs.

Note that the FLIGHT_RECORDER with a predecode cache gets slower than
without caching at all.
 2003-10-26 13:59:04 +00:00
gbeauche
d766049d59 - enable multicore cpu emulation with ASYNC_IRQ 
- move atomic_* operations to main_unix so that they could use spinlocks or
  other platform-specific locking mechanisms
 2003-10-26 09:14:14 +00:00
gbeauche
7312739738 fix MakeExecutable patch for little endian systems 2003-10-26 08:48:48 +00:00
gbeauche
46a1b4ada5 allow DGA & Xshm only on local displays 2003-10-26 07:54:02 +00:00
cebix
5f0a739cc7 - fixed compilation problems under BeOS 
- boot drive wasn't set correctly
 2003-10-26 00:32:31 +00:00
gbeauche
ccf89d9efb Preserve CR in execute_68k(). This enables MacOS 8.6 to work. ;-) 2003-10-19 21:37:43 +00:00
gbeauche
cb13fe3007 Log both r24 (m68k emulator PC) & stack pointer in SheepShaver mode only 2003-10-19 21:36:21 +00:00
gbeauche
9a05805a27 - Fix ADDME & ADDZE decoders, add RA==R0 testers 
- Increase predecode cache size to 32K entries
- Enable PPC_EXECUTE_DUMP_STATE for predecode cache as well
 2003-10-18 13:43:25 +00:00
gbeauche
1b9876889e - Record address range of block to invalidate. i.e. icbi records ranges 
and isync actually invalidate caches
 2003-10-12 06:44:04 +00:00
gbeauche
7e0dccc544 - Handle MakeExecutable() replacement 
- Disable predecode cache in CVS for now
- Fix flight recorder ordering in predecode cache mode
 2003-10-12 05:44:17 +00:00
gbeauche
a3036b0c9d Really enable flight_recorder with predecode cache on 2003-10-11 16:43:42 +00:00