gbeauche
d7ac6a0e68
Fix SLW & SRW, an x86 does not work the same way as a ppc
2003-11-27 10:53:37 +00:00
gbeauche
ae2d91912c
fix dummy includes
2003-11-27 10:06:27 +00:00
gbeauche
36ce9c07e6
Statically allocate the translation cache on PowerPC. This makes it possible
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to generate direct bl instructions for function invokation.
2003-11-27 00:26:35 +00:00
gbeauche
e30001bc00
Fix BCCTR & BCLR. However, conditions are still wrong somehow, disabled
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this case. Factored & optimized branch instructions.
2003-11-26 23:58:14 +00:00
gbeauche
2eba241021
self credit cpu emulator ;-)
2003-11-25 10:27:59 +00:00
gbeauche
73d51962f6
Merge in-progress PowerPC "JIT1" engine for AMD64, IA-32, PPC.
...
The merge probably got wrong as there are some problems probably due to the
experiment begining with CR deferred evaluation. With nbench/ppc, performance
improvement was around 2x. With nbench on x86, performance improvement was
around 4x on average.
Incompatible change: instr_info_t has a new field in the middle. But since
insertion of PPC_I(XXX) identifiers is auto-generated, there is no problem.
2003-11-24 23:45:52 +00:00
gbeauche
7968a20100
Handle "JIT1" engine but disable it for now since there are some problems
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with SheepShaver integration from Kheperix.
2003-11-24 23:39:35 +00:00
gbeauche
09a774ae51
Add link to B2 Unix/config.{guess,sub}
2003-11-24 22:19:35 +00:00
gbeauche
2a0f750a83
Optimize memory accesses on little endian systems that can do unaligned
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accesses to memory. Fix build when vm.hpp is included in a C program.
2003-11-24 21:30:17 +00:00
gbeauche
04349eebce
Optimized bswap_32() for AMD64
2003-11-24 21:20:47 +00:00
gbeauche
1dbe1179c6
Merge in "keycodes" support from Basilisk II. e.g. make French keyboard
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layout work correctly for me.
2003-11-21 17:01:33 +00:00
gbeauche
5b950fa2ef
fix shm screen image allocation.
2003-11-20 16:24:57 +00:00
gbeauche
b7c917e6d1
little endian fixes to name registry
2003-11-20 15:54:10 +00:00
gbeauche
e9f3546539
Remove even more obsolete code. Drop TBL/TBU registers, they are manually
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handled through the mftb instruction accessor.
2003-11-11 11:44:34 +00:00
gbeauche
cf0ed72f24
Remove obsolete code related to PPC_NO_FPSCR_UPDATE, PPC_LAZY_PC_UPDATE,
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PPC_LAZY_CC_UPDATE, PPC_HAVE_SPLIT_CR defines.
2003-11-11 11:32:27 +00:00
gbeauche
b66d8ef433
Fix "ignoresegv" case to actually skip the faulty instruction. Merge
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conditions to skip instruction on SIGSEGVfrom PowerPC native mode. The
instruction skipper takes care to set the output register to 0.
2003-11-10 16:23:58 +00:00
gbeauche
26ec1b8899
Merge Set_pthread_attr() from Basilisk II.
2003-11-10 16:05:52 +00:00
gbeauche
0260210ddf
- XLM_IRQ_NEST is always in native byte order format since any write to
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this variable go through {Enable,Disable}Interrupt().
- Add Ether thunks but only for WORDS_BIGENDIAN case since we do need more
complicated translation functions.
2003-11-10 15:11:44 +00:00
gbeauche
cbb8efd492
little endian fixes
2003-11-10 14:18:34 +00:00
gbeauche
cd86ff9e94
- Start emulating the FPSCR. Fix mtfsf, mffs.
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- Implement mftbr so that MacOS can fully boot with extensions. However,
using clock() is probably not the right solution. Patching UpTime from
DriverServicesLib et al. may be a better solution.
2003-11-09 15:39:30 +00:00
gbeauche
59e6227c08
fix mullwo & divw on invalid inputs
2003-11-09 07:19:39 +00:00
gbeauche
aebcb7a6bb
New testing framework faster to compile and more flexible. i.e. we now
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generate 350K+ instructions. This exhausts errors for mullwo & divw.
2003-11-08 11:57:04 +00:00
gbeauche
4b73163083
Fix PPC_LAZY_CC_UPDATE build. TODO: remove since this is slower.
2003-11-04 22:01:36 +00:00
gbeauche
175dfeea02
fix lfs/stfs breakage introduced with latest FPR type change
2003-11-04 20:56:21 +00:00
gbeauche
8c40d739b6
Add some statistics for interrupt handling, Execute68k/Trap, MacOS & NativeOp
2003-11-04 20:48:29 +00:00
gbeauche
42e1cabc94
Move variables for compile statistics to powerpc_cpu private data
2003-11-04 20:45:46 +00:00
gbeauche
30bd089279
PowerPC floating-point registers are now an union of uint64 & double. This
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eases FP load/stores.
2003-11-04 15:03:15 +00:00
gbeauche
8ddf749ed5
fix vm_do_read_memory_8()
2003-11-04 15:00:02 +00:00
gbeauche
a42281aad1
Implement partial block cache invalidation. Rewrite core cached blocks
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execution loop with a Duff's device. Gather some predecode time statistics.
This shows that only around 2% of total emulation time is spent for
predecoding the instructions.
2003-11-03 21:28:32 +00:00
gbeauche
f0ea192460
Optimized pointers to non virtual member functions. This reduces space
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and overhead since runtime checks are eliminated. Actually, it yields
up to 10% performance improvement with specialized decoders.
2003-11-02 14:48:20 +00:00
gbeauche
d956d3c4ca
add specialized instruction decoders (disabled for now)
2003-11-01 17:07:17 +00:00
gbeauche
066af7452a
fix ppc-execute.o dependency
2003-11-01 17:03:55 +00:00
gbeauche
89d0f9ca29
Integrate spcflags handling code to kpx_cpu core. We can also remove
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oldish EXEC_RETURN handling with a throw/catch mechanism since we
do have a dependency on extra conditions (invalidated cache) that
prevents fast execution loops.
2003-11-01 15:15:31 +00:00
gbeauche
9ce43c6cf3
Fix ASYNC_IRQ build but locks may still happen. Note that with a predecode
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cache, checking for pending interrupts may not be the bottle neck nowadays.
2003-10-26 14:16:40 +00:00
gbeauche
60d34a6816
Rewrite interrupts handling code so that the emulator can work with a
...
predecode cache. This implies to run in interpreted mode only while
processing EmulOps or other native (nested) runs.
Note that the FLIGHT_RECORDER with a predecode cache gets slower than
without caching at all.
2003-10-26 13:59:04 +00:00
gbeauche
d766049d59
- enable multicore cpu emulation with ASYNC_IRQ
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- move atomic_* operations to main_unix so that they could use spinlocks or
other platform-specific locking mechanisms
2003-10-26 09:14:14 +00:00
gbeauche
7312739738
fix MakeExecutable patch for little endian systems
2003-10-26 08:48:48 +00:00
gbeauche
46a1b4ada5
allow DGA & Xshm only on local displays
2003-10-26 07:54:02 +00:00
cebix
5f0a739cc7
- fixed compilation problems under BeOS
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- boot drive wasn't set correctly
2003-10-26 00:32:31 +00:00
gbeauche
ccf89d9efb
Preserve CR in execute_68k(). This enables MacOS 8.6 to work. ;-)
2003-10-19 21:37:43 +00:00
gbeauche
cb13fe3007
Log both r24 (m68k emulator PC) & stack pointer in SheepShaver mode only
2003-10-19 21:36:21 +00:00
gbeauche
9a05805a27
- Fix ADDME & ADDZE decoders, add RA==R0 testers
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- Increase predecode cache size to 32K entries
- Enable PPC_EXECUTE_DUMP_STATE for predecode cache as well
2003-10-18 13:43:25 +00:00
gbeauche
1b9876889e
- Record address range of block to invalidate. i.e. icbi records ranges
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and isync actually invalidate caches
2003-10-12 06:44:04 +00:00
gbeauche
7e0dccc544
- Handle MakeExecutable() replacement
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- Disable predecode cache in CVS for now
- Fix flight recorder ordering in predecode cache mode
2003-10-12 05:44:17 +00:00
gbeauche
a3036b0c9d
Really enable flight_recorder with predecode cache on
2003-10-11 16:43:42 +00:00
gbeauche
7e20a8d205
- Add support for FLIGHT_RECORDER with predecode cache
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- Always enable predecode cache & flight recorder for now
2003-10-11 09:57:52 +00:00
gbeauche
b05c68e90e
Move PPC emulator config to here
2003-10-11 09:34:35 +00:00
gbeauche
ebb67f0421
- Minor optimization to execute_ppc() as we apparently don't need to move
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target PC into CTR.
- Fix breakage introduced during little endian fixing. We now assume that
MacOS doesn't rely on any PPC register that may have been saved on top
of it stack. i.e. register state is saved onto native stack.
2003-10-11 09:33:27 +00:00
gbeauche
1012da75dd
- Cleanups & make sure PPC emulator config is setup in sysdeps.h
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- Log r24 in SheepShaver mode as this represents the 68k emulator PC
2003-10-11 09:03:03 +00:00
gbeauche
be50ff1b42
Adapt ROM patches space to Gossamer ROMs layout. Weird that it passed the
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other day.
2003-10-07 19:28:09 +00:00
