mirror of
https://github.com/Spritetm/minimacplus.git
synced 2024-06-12 21:29:35 +00:00
80MHz-ify everything, move active display area down a bit
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parent
ea1ed9972a
commit
fc7e934111
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@ -29,8 +29,8 @@ Thing to emulate single-lane MIPI using a flipflop and a bunch of resistors.
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#define HOST VSPI_HOST
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#define IRQSRC ETS_SPI3_DMA_INTR_SOURCE
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#define HOST HSPI_HOST
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#define IRQSRC ETS_SPI2_DMA_INTR_SOURCE
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#define DMACH 2
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#define DESCCNT 8
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@ -16,18 +16,29 @@
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#include <stdlib.h>
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#include "esp_err.h"
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#include "nvs_flash.h"
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#include "nvs.h"
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#include "esp_partition.h"
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#include "emu.h"
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#include "tmeconfig.h"
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#include "rtc.h"
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unsigned char *romdata;
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nvs_handle nvs;
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void emuTask(void *pvParameters)
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{
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tmeStartEmu(romdata);
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}
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void saveRtcMem(char *data) {
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esp_err_t err;
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err=nvs_set_blob(nvs, "pram", data, 32);
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if (err!=ESP_OK) {
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printf("NVS: Saving to PRAM failed!");
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}
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}
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void app_main()
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{
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@ -35,6 +46,23 @@ void app_main()
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const esp_partition_t* part;
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spi_flash_mmap_handle_t hrom;
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esp_err_t err;
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uint8_t pram[32];
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nvs_flash_init();
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err=nvs_open("pram", NVS_READWRITE, &nvs);
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if (err!=ESP_OK) {
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printf("NVS: Try erase\n");
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nvs_flash_erase();
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err=nvs_open("pram", NVS_READWRITE, &nvs);
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}
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unsigned int sz=32;
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err = nvs_get_blob(nvs, "pram", pram, &sz);
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if (err == ESP_OK) {
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rtcInit((char*)pram);
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} else {
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printf("NVS: Cannot load pram!\n");
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}
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part=esp_partition_find_first(0x40, 0x1, NULL);
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if (part==0) printf("Couldn't find bootrom part!\n");
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@ -203,6 +203,9 @@ static inline void setRowRange(int ystart, int yend) {
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mipiDsiSendLong(0x39, cmd, 5);
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}
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//Use this to move the display area down.
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#define YOFFSET 8
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static void IRAM_ATTR displayTask(void *arg) {
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uint8_t *img=malloc((LINESPERBUF*320*2)+1);
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assert(img);
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@ -246,7 +249,7 @@ static void IRAM_ATTR displayTask(void *arg) {
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memcpy(oldImg, myData, 512*342/8);
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if (ystart!=yend) {
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setRowRange(ystart, 319);
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setRowRange(ystart+YOFFSET, 319);
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img[0]=0x2c;
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uint8_t *p=&img[1];
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for (int j=ystart; j<yend; j++) {
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@ -527,8 +527,8 @@ void tmeStartEmu(void *rom) {
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viaControlWrite(VIA_CA2, ca2);
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rtcTick();
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frame=0;
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// printFps();
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// printf("%d Hz\n", cyclesPerSec);
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printFps();
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printf("%d Hz\n", cyclesPerSec);
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cyclesPerSec=0;
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}
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}
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@ -548,7 +548,7 @@ void sccIrq(int req) {
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void viaCbPortAWrite(unsigned int val) {
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static int writes=0;
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if ((writes++)==0) val=0x67;
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printf("VIA PORTA WRITE %x\n", val);
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// printf("VIA PORTA WRITE %x\n", val);
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video_remap=(val&(1<<6))?1:0;
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rom_remap=(val&(1<<4))?1:0;
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audio_remap=(val&(1<<3))?1:0;
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@ -558,7 +558,7 @@ void viaCbPortAWrite(unsigned int val) {
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}
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void viaCbPortBWrite(unsigned int val) {
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printf("VIA PORTB WRITE %x\n", val);
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// printf("VIA PORTB WRITE %x\n", val);
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int b;
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b=rtcCom(val&4, val&1, val&2);
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if (b) viaSet(VIA_PORTB, 1); else viaClear(VIA_PORTB, 1);
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@ -168,7 +168,7 @@ unsigned int ncrRead(unsigned int addr, unsigned int dack) {
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ret=ncr.din;
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// printf("READ BYTE (NCR addr6) %02X dack=%d\n", ret, dack);
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} else if (addr==7) {
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printf("!UNIMPLEMENTED!\n");
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printf("Scsi: !UNIMPLEMENTED! (addr 7)\n");
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}
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// printf("%08X SCSI: (dack %d), cur st %s read %s (reg %d) = %x \n",
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// pc, dack, stateNames[ncr.state], regNamesR[addr], addr, ret);
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@ -1,11 +1,11 @@
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#include <stdint.h>
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#include <stdio.h>
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#include <string.h>
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typedef struct {
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int lastClkVal;
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int pos;
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uint8_t cmd;
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uint16_t cmd;
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uint8_t mem[32];
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} Rtc;
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@ -28,20 +28,22 @@ int rtcCom(int en, int dat, int clk) {
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rtc.pos=0;
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rtc.cmd=0;
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} else {
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if (clk!=rtc.lastClkVal && !clk) {
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if (clk!=rtc.lastClkVal && clk) {
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if (rtc.pos<8 || (rtc.pos<16 && ((rtc.cmd&0x8000)==0)) ) {
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//First 8 bits, or all 16 bits if write: accumulate data
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if (dat) rtc.cmd|=(1<<(15-rtc.pos));
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} else if (rtc.cmd&0x8000) {
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}
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// printf("RTC: clocktick %d, dataline %d, cmd %x\n", rtc.pos, dat, rtc.cmd);
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if (rtc.cmd&0x8000) { //read
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if (rtc.pos==8) {
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printf("RTC: Read cmd %x\n", rtc.cmd>>8);
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rtc.cmd|=rtc.mem[(rtc.cmd&0x7C00)>>10];
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}
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ret=((rtc.cmd&(1<<(15-rtc.pos)))?1:0);
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} else if (rtc.pos==15) {
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if ((rtc.cmd&0x8000)==0) {
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printf("RTC: Write cmd %x\n", rtc.cmd>>8);
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rtc.mem[(rtc.cmd&0x7C00)>>10]=rtc.cmd&0xff;
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saveRtcMem(rtc.mem);
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}
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printf("RTC/PRAM CMD %x\n", rtc.cmd);
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saveRtcMem((char*)rtc.mem);
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}
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rtc.pos++;
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}
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@ -1,2 +1,3 @@
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void rtcTick();
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int rtcCom(int en, int dat, int clk);
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void rtcInit(char *mem);
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@ -23,6 +23,7 @@ static void *loadRom(char *file) {
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}
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void saveRtcMem(char *data) {
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printf("Saving RTC mem...\n");
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FILE *f=fopen("pram.dat", "wb");
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if (f!=NULL) {
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fwrite(data, 32, 1, f);
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@ -38,6 +39,7 @@ int main(int argc, char **argv) {
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fread(data, 32, 1, f);
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rtcInit(data);
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fclose(f);
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printf("Loaded RTC data from pram.dat\n");
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}
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sdlDispAudioInit();
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tmeStartEmu(rom);
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@ -117,6 +117,7 @@ void viaControlWrite(int no, int val) {
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}
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void viaWrite(unsigned int addr, unsigned int val) {
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unsigned int pc=m68k_get_reg(NULL, M68K_REG_PC);
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if (addr==0x0) {
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//ORB
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viaCbPortBWrite(val);
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@ -185,7 +186,7 @@ void viaWrite(unsigned int addr, unsigned int val) {
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viaCbPortAWrite(val);
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via.ina=(via.ina&~via.ddra)|(val&via.ddra);
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}
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// printf("VIA write %s val %x\n", viaRegNames[addr], val);
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printf("PC %x VIA write %s val %x\n", pc, viaRegNames[addr], val);
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}
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@ -247,6 +248,6 @@ unsigned int viaRead(unsigned int addr) {
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//ORA
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val=via.ina;
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}
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// printf("PC %x VIA read %s val %x\n", pc, viaRegNames[addr], val);
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printf("PC %x VIA read %s val %x\n", pc, viaRegNames[addr], val);
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return val;
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}
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@ -1,6 +1,6 @@
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# Espressif ESP32 Partition Table
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# Name, Type, SubType, Offset, Size
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factory, app, factory, 0x10000, 928k
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wifidata,data, nvs, 0xFC000, 16K
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nvs, data, nvs, 0xFC000, 16K
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rom, 0x40, 0x01, 0x100000, 128K
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hd, 0x40, 0x02, 0x120000, 0x2e0000
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31
sdkconfig
31
sdkconfig
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@ -20,6 +20,8 @@ CONFIG_LOG_BOOTLOADER_LEVEL_INFO=y
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CONFIG_LOG_BOOTLOADER_LEVEL_DEBUG=
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CONFIG_LOG_BOOTLOADER_LEVEL_VERBOSE=
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CONFIG_LOG_BOOTLOADER_LEVEL=3
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CONFIG_BOOTLOADER_SPI_WP_PIN=7
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CONFIG_BOOTLOADER_VDDSDIO_BOOST=y
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#
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# Security features
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CONFIG_ESPTOOLPY_BAUD_OTHER_VAL=115200
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CONFIG_ESPTOOLPY_BAUD=921600
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CONFIG_ESPTOOLPY_COMPRESSED=y
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CONFIG_FLASHMODE_QIO=
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CONFIG_FLASHMODE_QIO=y
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CONFIG_FLASHMODE_QOUT=
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CONFIG_FLASHMODE_DIO=y
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CONFIG_FLASHMODE_DIO=
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CONFIG_FLASHMODE_DOUT=
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CONFIG_ESPTOOLPY_FLASHMODE="dio"
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CONFIG_ESPTOOLPY_FLASHFREQ_80M=
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CONFIG_ESPTOOLPY_FLASHFREQ_40M=y
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CONFIG_ESPTOOLPY_FLASHFREQ_80M=y
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CONFIG_ESPTOOLPY_FLASHFREQ_40M=
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CONFIG_ESPTOOLPY_FLASHFREQ_26M=
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CONFIG_ESPTOOLPY_FLASHFREQ_20M=
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CONFIG_ESPTOOLPY_FLASHFREQ="40m"
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CONFIG_ESPTOOLPY_FLASHFREQ="80m"
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CONFIG_ESPTOOLPY_FLASHSIZE_1MB=
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CONFIG_ESPTOOLPY_FLASHSIZE_2MB=
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CONFIG_ESPTOOLPY_FLASHSIZE_4MB=y
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CONFIG_OPTIMIZATION_ASSERTIONS_ENABLED=y
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CONFIG_OPTIMIZATION_ASSERTIONS_SILENT=
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CONFIG_OPTIMIZATION_ASSERTIONS_DISABLED=
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CONFIG_CXX_EXCEPTIONS=
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#
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# Component config
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# FreeRTOS SystemView Tracing
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#
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CONFIG_AWS_IOT_SDK=
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#
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# Bluetooth
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#
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CONFIG_BT_ENABLED=
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CONFIG_BTDM_CONTROLLER_PINNED_TO_CORE=0
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CONFIG_BT_RESERVE_DRAM=0
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#
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CONFIG_SPIRAM_USE_MALLOC=
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CONFIG_SPIRAM_TYPE_ESPPSRAM32=y
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CONFIG_SPIRAM_SIZE=4194304
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CONFIG_SPIRAM_SPEED_40M=y
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CONFIG_SPIRAM_SPEED_40M=
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CONFIG_SPIRAM_SPEED_80M=y
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CONFIG_SPIRAM_MEMTEST=y
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CONFIG_SPIRAM_CACHE_WORKAROUND=y
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CONFIG_MEMMAP_TRACEMEM=
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CONFIG_ESP32_PHY_MAX_WIFI_TX_POWER=20
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CONFIG_ESP32_PHY_MAX_TX_POWER=20
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#
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# Power Management
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#
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CONFIG_PM_ENABLE=
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#
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# Ethernet
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#
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CONFIG_TIMER_TASK_PRIORITY=1
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CONFIG_TIMER_TASK_STACK_DEPTH=2048
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CONFIG_TIMER_QUEUE_LENGTH=10
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CONFIG_FREERTOS_USE_TRACE_FACILITY=
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CONFIG_FREERTOS_DEBUG_INTERNALS=
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#
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#
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CONFIG_L2_TO_L3_COPY=
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CONFIG_LWIP_MAX_SOCKETS=10
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CONFIG_LWIP_THREAD_LOCAL_STORAGE_INDEX=0
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CONFIG_LWIP_SO_REUSE=
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CONFIG_LWIP_SO_RCVBUF=
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CONFIG_LWIP_DHCP_MAX_NTP_SERVERS=1
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#
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CONFIG_SPI_FLASH_ENABLE_COUNTERS=
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CONFIG_SPI_FLASH_ROM_DRIVER_PATCH=y
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CONFIG_SPI_FLASH_WRITING_DANGEROUS_REGIONS_ABORTS=y
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CONFIG_SPI_FLASH_WRITING_DANGEROUS_REGIONS_FAILS=
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CONFIG_SPI_FLASH_WRITING_DANGEROUS_REGIONS_ALLOWED=
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#
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# SPIFFS Configuration
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