transistor
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24e050a840
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Added supervisor checks
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2021-10-16 10:01:14 -07:00 |
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transistor
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1732c90f5b
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Added formatter for Instruction to output assembly
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2021-10-15 11:12:47 -07:00 |
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transistor
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eba1f9c9fc
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Fixed bug with ANDtoSR, which was actually using "or"
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2021-10-14 22:04:14 -07:00 |
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transistor
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43b1abfa19
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Minor changes
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2021-10-14 21:16:31 -07:00 |
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transistor
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39ecd1b0d9
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Added decode for ABCD and SBCD
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2021-10-10 20:47:51 -07:00 |
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transistor
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94141e112e
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Reorganized decode and add some support for other m68k processors
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2021-10-10 14:26:54 -07:00 |
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transistor
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b588563acc
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Updated readme
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2021-10-09 20:35:52 -07:00 |
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transistor
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8bb43f61ee
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Fixed interrupts and added tx enable for OS buffered output
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2021-10-08 10:52:15 -07:00 |
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transistor
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73d11ddb79
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Switched to using Rc<RefCell<Box<dyn Trait>>> for devices
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2021-10-07 09:41:01 -07:00 |
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transistor
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5ea2ccc128
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Added TRAP instruction and exception handling
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2021-10-05 21:53:18 -07:00 |
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transistor
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338e68a1d9
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Fixed some erroneous instruction decodes and added binaries
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2021-10-03 09:55:20 -07:00 |
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