Commit Graph

32 Commits

Author SHA1 Message Date
transistor
a00d7b2f26 Fixed warnings 2021-11-13 11:39:20 -08:00
transistor
9d799e308d Added command line options for minifb and TRS-80 2021-11-11 09:52:18 -08:00
transistor
7e999d4c3a Changed the way frontend works and added keyboard support 2021-11-06 21:44:25 -07:00
transistor
b6cccea437 Added read only memory and debugger numbered continuations
There is also a breakpoint error, so that if a read-only memory
location is written to, it will escape to the debugger rather than
exiting the program.
2021-11-03 15:33:22 -07:00
transistor
e0ef1d8fd9 Added start of Z80 decoder 2021-11-01 22:06:40 -07:00
transistor
58fc9ac827 Moved the debugger out of m68k 2021-11-01 16:51:45 -07:00
transistor
8fe76334af Added joystick host adapter 2021-10-31 11:00:14 -07:00
transistor
a02d8e5241 Fixed graphics finally for YM7101 scrolls 2021-10-30 16:17:28 -07:00
transistor
93c080eae6 Fixed interrupts
Previously the m68k wasn't masking interrupts with an equal priorty.
I also modified how they work, such that the cpus will check the
controller rather than wait for the notification call
2021-10-29 22:02:29 -07:00
transistor
c1ca666aa4 Simplified event queue 2021-10-29 20:06:15 -07:00
transistor
250c0e83d2 Minor fixes 2021-10-29 15:05:41 -07:00
transistor
109ae4db55 Added minifb frontend with very WIP genesis peripherals 2021-10-27 21:01:18 -07:00
transistor
8bbffbe34c Modified the read interface yet again 2021-10-26 17:33:23 -07:00
transistor
1ad7ad1807 Added Debuggable trait and added tests 2021-10-26 12:17:59 -07:00
transistor
fd894f0638 Modified to use a nanosecond clock 2021-10-23 22:22:02 -07:00
transistor
f9e018742b Refactored how UI interfacing will work 2021-10-21 21:55:27 -07:00
transistor
8d39d84545 Refactored to separate out the commands, and machine configs
Machine definitions are now in their own module and can be
optionally compiled in, and there is now a console and soon
to be gui version of the compiled binary, with individual
binaries for each machine
2021-10-20 15:53:25 -07:00
transistor
2d8e5f6359 Added support for long word MUL and DIV instructions 2021-10-18 21:22:57 -07:00
transistor
731c89845e Added MC68020+ addressing modes 2021-10-18 15:44:42 -07:00
transistor
32d2d591ce Added bit field instructions, and fixed some bugs 2021-10-17 21:18:59 -07:00
transistor
1262cbd8c0 Modified to use a common trait to derive other traits 2021-10-17 10:39:43 -07:00
transistor
24e050a840 Added supervisor checks 2021-10-16 10:01:14 -07:00
transistor
1732c90f5b Added formatter for Instruction to output assembly 2021-10-15 11:12:47 -07:00
transistor
eba1f9c9fc Fixed bug with ANDtoSR, which was actually using "or" 2021-10-14 22:04:14 -07:00
transistor
43b1abfa19 Minor changes 2021-10-14 21:16:31 -07:00
transistor
39ecd1b0d9 Added decode for ABCD and SBCD 2021-10-10 20:47:51 -07:00
transistor
94141e112e Reorganized decode and add some support for other m68k processors 2021-10-10 14:26:54 -07:00
transistor
b588563acc Updated readme 2021-10-09 20:35:52 -07:00
transistor
8bb43f61ee Fixed interrupts and added tx enable for OS buffered output 2021-10-08 10:52:15 -07:00
transistor
73d11ddb79 Switched to using Rc<RefCell<Box<dyn Trait>>> for devices 2021-10-07 09:41:01 -07:00
transistor
5ea2ccc128 Added TRAP instruction and exception handling 2021-10-05 21:53:18 -07:00
transistor
338e68a1d9 Fixed some erroneous instruction decodes and added binaries 2021-10-03 09:55:20 -07:00