Fixed/implemented roxx_mem, rox_mem, abcd, pack, unpk, cas2
Trying to finish up the last few unimplemented 68020 insts
This commit is contained in:
Peter Rutenbar
parent
3bc6aed00a
commit
36fdd1a6d6
300
core/cpu.c
300
core/cpu.c
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@ -305,7 +305,30 @@ static void inst_roxx_reg (void) {
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}
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static void inst_roxx_mem (void) {
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assert(!"roxx_mem: unimplemented\n");
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~decompose(shoe.op, 1110 010 d 11 MMMMMM);
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call_ea_read(M, 2);
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const uint16_t dat = shoe.dat;
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const uint16_t x = sr_x();
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uint16_t b;
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if (!d) { // right
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b = dat & 1;
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shoe.dat = (dat >> 1) | (x << 15);
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}
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else { // left
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b = dat >> 15;
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shoe.dat = (dat << 1) | x;
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}
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set_sr_x(b);
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set_sr_v(0);
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set_sr_c(b);
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set_sr_n(shoe.dat & 0x8000);
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set_sr_z(dat == 0);
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call_ea_write(M, 2);
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}
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static void inst_rox_reg (void) {
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@ -346,7 +369,28 @@ static void inst_rox_reg (void) {
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}
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static void inst_rox_mem (void) {
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assert(!"rox_mem: unimplemented\n");
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~decompose(shoe.op, 1110 011 d 11 MMMMMM);
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call_ea_read(M, 2);
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const uint16_t dat = shoe.dat;
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uint16_t b;
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if (!d) { // right
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b = dat & 1;
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shoe.dat = (dat >> 1) | (dat << 15);
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}
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else { // left
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b = dat >> 15;
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shoe.dat = (dat << 1) | (dat >> 15);
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}
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set_sr_v(0);
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set_sr_c(b);
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set_sr_n(shoe.dat & 0x8000);
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set_sr_z(dat == 0);
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call_ea_write(M, 2);
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}
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static void inst_sbcd (void) {
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@ -354,11 +398,57 @@ static void inst_sbcd (void) {
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}
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static void inst_pack (void) {
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assert(!"Hey! inst_pack isn't implemented!\n");
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~decompose(shoe.op, 1000 yyy 10100 r xxx);
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const uint16_t adj = nextword();
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if (!r) { // register mode
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const uint16_t unpacked = (adj + (shoe.d[x] & 0xffff)) & 0x0f0f;
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const uint8_t packed = unpacked | (unpacked >> 4);
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set_d(y, packed, 1);
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}
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else { // predecrement mode
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const uint16_t unpacked = (adj + lget(shoe.a[x] - 2, 2)) & 0x0f0f;
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if sunlikely(shoe.abort) return ;
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const uint8_t packed = unpacked | (unpacked >> 4);
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uint32_t dest_addr = shoe.a[y] - (y == 7 ? 2 : 1); // regular rules apply to byte-size predec/postinc on a7
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if (x == y)
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dest_addr -= 2; // decrements are cumulative when x==y
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lset(dest_addr, 1, packed);
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if sunlikely(shoe.abort) return ;
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shoe.a[x] -= 2;
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shoe.a[y] = dest_addr;
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}
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}
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static void inst_unpk (void) {
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assert(!"Hey! inst_unpk isn't implemented!\n");
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~decompose(shoe.op, 1000 yyy 11000 r xxx);
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const uint16_t adj = nextword();
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if (!r) { // register mode
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const uint16_t packed = shoe.d[x] & 0xff;
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const uint16_t unpacked = ((packed & 0x0f) | ((packed & 0xf0) << 4)) + adj;
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set_d(y, unpacked, 2);
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}
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else { // predecrement mode
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// regular rules apply to byte-size predec/postinc on a7
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const uint32_t src_addr = shoe.a[x] - (y == 7 ? 2 : 1);
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// decrements are cumulative when x==y
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const uint32_t dest_addr = (x == y) ? src_addr - 2 : shoe.a[y] - 2;
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const uint16_t packed = lget(src_addr, 1);
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if sunlikely(shoe.abort) return ;
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const uint16_t unpacked = ((packed & 0x0f) | ((packed & 0xf0) << 4)) + adj;
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lset(dest_addr, 2, unpacked);
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if sunlikely(shoe.abort) return ;
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shoe.a[x] = src_addr;
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shoe.a[y] = dest_addr;
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}
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}
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static void inst_divu (void) {
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@ -428,7 +518,9 @@ static void inst_divs (void) {
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}
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static void inst_bkpt (void) {
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assert(!"Hey! inst_bkpt isn't implemented!\n");
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~decompose(shoe.op, 0100 1000 0100 1 vvv);
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slog("bkpt: vector %u\n", v);
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throw_illegal_instruction();
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}
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static void inst_swap (void) {
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@ -440,56 +532,74 @@ static void inst_swap (void) {
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set_sr_n(mib(shoe.d[r], 4));
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}
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/*
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* This matches 68020's abcd implementation for every possible a, b, and X-bit
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* Given packed BCD a and b, returns a + b + X as packed BCD
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*
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* (e.g. X=1: abcd f7,ff -> 5d,
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* X=0: abcd 05,05 -> 10)
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*/
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static uint8_t _abcd_core(const uint8_t a, const uint8_t b)
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{
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uint16_t sum = sr_x();
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// First add the low digits
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const uint8_t al = a & 0xf;
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const uint8_t bl = b & 0xf;
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sum += al + bl;
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if (sum >= 10) {
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// If al+bl > 10, carry the 1.
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sum += 0x10;
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sum -= 10;
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}
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// Then add the high digits
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const uint16_t ah = a & 0xf0;
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const uint16_t bh = b & 0xf0;
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sum += ah + bh;
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if (sum >= (10 << 4)) {
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sum += 0x100;
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sum -= (10 << 4);
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}
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// sr_n is undefined, but apparently unmodified on 68020
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// same goes for sr_v
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set_sr_x(sum >= 0x100);
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set_sr_c(sum >= 0x100);
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if (sum & 0xff)
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set_sr_z(0);
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return sum & 0xff;
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}
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static void inst_abcd (void) {
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~decompose(shoe.op, 1100 xxx 10000 m yyy);
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uint8_t packed_x, packed_y;
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const uint8_t extend = sr_x() ? 1 : 0;
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// slog("abcd: pc=0x%08x extend=%u m=%u x=%u y=%u\n", shoe.orig_pc, extend, m, x, y);
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if (m) {
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// predecrement mem to predecrement mem
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// FIXME: these addresses aren't predecremented (check whether a7 is incremented 2 bytes)
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assert(!"acbd is broken");
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packed_x = lget(shoe.a[x], 1);
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if sunlikely(shoe.abort) return ;
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packed_y = lget(shoe.a[y], 1);
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if sunlikely(shoe.abort) return ;
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if (!m) {
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// Register -> register
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const uint8_t sum = _abcd_core((uint8_t)shoe.d[x], (uint8_t)shoe.d[y]);
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set_d(x, sum, 1);
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}
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else {
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packed_x = shoe.d[x] & 0xff;
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packed_y = shoe.d[y] & 0xff;
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}
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if (((packed_x & 0xF) > 9) || (((packed_x>>4) & 0xF) > 9) || ((packed_y & 0xF) > 9) || (((packed_y>>4) & 0xF) > 9))
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assert(!"abcd: badly packed byte");
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const uint8_t unpacked_x = (packed_x & 0xf) + ((packed_x >> 4) * 10);
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const uint8_t unpacked_y = (packed_y & 0xf) + ((packed_y >> 4) * 10);
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const uint8_t sum = unpacked_x + unpacked_y + extend;
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const uint8_t unpacked_sum = sum % 100;
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const uint8_t carry = (sum >= 100);
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const uint8_t packed_sum = ((unpacked_sum / 10) << 4) | (unpacked_sum % 10);
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// slog("abcd: packed_x = 0x%02x(%u) packed_y = 0x%02x(%u) sum=0x%02x(%u) carry=%u\n", packed_x, unpacked_x, packed_y, unpacked_y, packed_sum, unpacked_sum, carry);
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if (unpacked_sum)
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set_sr_z(0);
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set_sr_c(carry);
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set_sr_x(carry);
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if (m) {
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lset(shoe.a[x]-1, 1, packed_sum);
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// Memory -> memory
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// Usual rules apply for byte-size if x or y is a7
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const uint32_t source_addr = shoe.a[y] - (y == 7 ? 2 : 1);
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// The decrements are cumulative if x==y
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const uint32_t dest_addr = (x == y ? source_addr : shoe.a[x]) - (x == 7 ? 2 : 1);
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const uint8_t a = lget(source_addr, 1);
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if sunlikely(shoe.abort) return ;
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shoe.a[x]--;
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if (x != y)
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shoe.a[y]--;
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const uint8_t b = lget(dest_addr, 1);
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if sunlikely(shoe.abort) return ;
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const uint8_t sum = _abcd_core(a, b);
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lset(dest_addr, 1, sum);
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if sunlikely(shoe.abort) return ;
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shoe.a[y] = source_addr;
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shoe.a[x] = dest_addr;
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}
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else {
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set_d(x, packed_sum, 1);
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}
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}
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static void inst_muls (void) {
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@ -1363,6 +1473,23 @@ static void inst_moves (void) {
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}
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static void _cas_comparator(uint32_t source, uint32_t dest, uint8_t sz)
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{
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const uint32_t chopped_dest = chop(dest, sz);
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const uint32_t chopped_source = chop(source, sz);
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const uint32_t R = chopped_dest - chopped_source;
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const _Bool Sm = mib(chopped_source, sz);
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const _Bool Dm = mib(chopped_dest, sz);
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const _Bool Rm = mib(R, sz);
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const _Bool z = (chop(R, sz) == 0);
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set_sr_z(z);
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set_sr_n(Rm);
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set_sr_v((!Sm && Dm && !Rm) || (Sm && !Dm && Rm));
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set_sr_c((Sm && !Dm) || (Rm && !Dm) || (Sm && Rm));
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}
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static void inst_cas (void) {
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const uint16_t ext = nextword();
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~decompose(shoe.op, 0000 1ss0 11 MMMMMM);
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@ -1377,14 +1504,9 @@ static void inst_cas (void) {
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// EA = destination
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// Rc = source
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// EA = result
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const uint32_t chopped_source = get_d(c, sz);
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const uint32_t R = shoe.dat - chopped_source;
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const _Bool Sm = mib(get_d(c, sz), sz);
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const _Bool Dm = ea_n(sz);
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const _Bool Rm = mib(R, sz);
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const _Bool z = (chop(R, sz) == 0);
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_cas_comparator(get_d(c, sz), (uint32_t)shoe.dat, sz);
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if (z) {
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if (sr_z()) {
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// "If the operands are equal, the instruction writes the
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// update operand (Du) to the effective address operand"
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shoe.dat = get_d(u, sz);
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@ -1396,15 +1518,73 @@ static void inst_cas (void) {
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call_ea_read_commit(M, sz);
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set_d(c, shoe.dat, sz);
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}
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set_sr_z(z);
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set_sr_n(Rm);
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set_sr_v((!Sm && Dm && !Rm) || (Sm && !Dm && Rm));
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set_sr_c((Sm && !Dm) || (Rm && !Dm) || (Sm && Rm));
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}
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static void inst_cas2 (void) {
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assert(!"inst_cas2: error: not implemented!");
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~decompose(shoe.op, 0000 1 1s 0 1111 1100);
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const uint16_t r1 = nextword();
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const uint16_t r2 = nextword();
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~decompose(r1, d nnn 000 uuu 000 ccc);
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~decompose(r2, D NNN 000 UUU 000 CCC);
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const uint8_t sz = 2 << s;
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const uint32_t memory_op_addr_1 = d ? shoe.a[n] : shoe.d[n];
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const uint32_t memory_op_addr_2 = D ? shoe.a[N] : shoe.d[N];
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const uint32_t compare_op_1 = get_d(c, sz);
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const uint32_t compare_op_2 = get_d(C, sz);
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const uint32_t update_op_1 = get_d(u, sz);
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const uint32_t update_op_2 = get_d(U, sz);
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uint32_t memory_op_data_1, memory_op_data_2;
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_Bool equal = 0;
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// -- If we ever support SMP, synchronize and block the other CPUs here --
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memory_op_data_1 = lget(memory_op_addr_1, sz);
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if sunlikely(shoe.abort) goto unblock ;
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memory_op_data_2 = lget(memory_op_addr_2, sz);
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if sunlikely(shoe.abort) goto unblock ;
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// Compare operand pair 1, and if it's equal, compare operand pair 2
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_cas_comparator(compare_op_1, memory_op_data_1, sz);
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if (sr_z()) {
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_cas_comparator(compare_op_2, memory_op_data_2, sz);
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equal = sr_z();
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if (equal) {
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// Both comparison pairs match, write the update operands
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lset(memory_op_addr_1, sz, update_op_1);
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if sunlikely(shoe.abort) goto unblock ;
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lset(memory_op_addr_2, sz, update_op_2);
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}
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}
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// Else, one of the comparisons failed, we can unblock now
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unblock:
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// -- unblock CPUs here --
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if sunlikely(shoe.abort) return ;
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if (!equal) {
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/*
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* 68040 note:
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* 68kprm says (I think?) that memory_op_data_1 is written
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* back to memory_op_addr_1 as part of the locked access cycle
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* Remember to do that if we ever support 68040 cores.
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*/
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// Copy memory_op_data_1/2 to d[c] and d[C]
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// (if c==C, that register gets memory_op_data_1)
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set_d(C, memory_op_data_2, sz);
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set_d(c, memory_op_data_1, sz);
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}
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return ;
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}
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static void inst_move_to_sr (void) {
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@ -422,7 +422,7 @@ void sound_dma_write_raw(uint16_t addr, uint8_t sz, uint32_t data);
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uint32_t sound_dma_read_raw(uint16_t addr, uint8_t sz);
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void init_asc_state(void);
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typedef struct __attribute__ ((__packed__)) {
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typedef struct {
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uint8_t buf[0x800];
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uint8_t version; // read-only
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uint8_t asc_mode;
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@ -432,7 +432,7 @@ typedef struct __attribute__ ((__packed__)) {
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uint8_t unknown1;
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uint8_t volume_ctrl;
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uint8_t clock_ctrl;
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uint8_t unknown2[8];
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uint16_t left_ptr, right_ptr;
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} apple_sound_chip_registers_t;
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62
core/sound.c
62
core/sound.c
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@ -23,10 +23,19 @@
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* Props to MESS for their EASC register map: http://www.mess.org/mess/driver_info/easc
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* EASC's PCM mode is backwards compatible with ASC, so their registers are very similar.
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*/
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#include <assert.h>
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#include <string.h>
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#include "../core/shoebill.h"
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#define r_ptr (0x400 + (asc->right_ptr & 0x3ff)) /* right buf ptr */
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#define l_ptr (asc->left_ptr & 0x3ff) /* left buf ptr */
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#define m_ptr (asc->left_ptr & 0x7ff) /* mono buf ptr */
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void init_asc_state(void)
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{
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memset(&shoe.asc, 0, sizeof(shoe.asc));
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@ -40,42 +49,48 @@ static uint8_t sound_dma_read_byte(uint16_t addr)
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apple_sound_chip_registers_t *asc = &shoe.asc;
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if (addr < 0x800) {
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if (asc->asc_mode == 1) {
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// PCM mode (FIFO is append-only)
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if (asc->channel_ctrl & 2) {
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// stereo mode - return the byte referenced by the right pointer
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return asc->buf[r_ptr];
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}
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else {
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// mono mode - return the byte referenced by the left pointer
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return asc->buf[m_ptr];
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}
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}
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else {
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// Off or wavetable mode (FIFO is random access)
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return asc->buf[addr];
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}
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}
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switch (addr) {
|
||||
case 0x800: // Version
|
||||
return asc->version;
|
||||
break;
|
||||
|
||||
case 0x801: // ASC-mode
|
||||
return asc->asc_mode;
|
||||
break;
|
||||
|
||||
case 0x802: // Channel control
|
||||
return asc->channel_ctrl;
|
||||
break;
|
||||
|
||||
case 0x803: // FIFO control
|
||||
return asc->fifo_ctrl;
|
||||
break;
|
||||
|
||||
case 0x804: // FIFO interrupt
|
||||
//return asc->fifo_intr;
|
||||
return 0xff;
|
||||
break;
|
||||
|
||||
case 0x805: // Unknown (??)
|
||||
return asc->unknown1;
|
||||
break;
|
||||
|
||||
case 0x806: // Volume control
|
||||
return asc->volume_ctrl;
|
||||
break;
|
||||
|
||||
case 0x807: // Clock control
|
||||
return asc->clock_ctrl;
|
||||
break;
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
|
@ -90,15 +105,30 @@ static void sound_dma_write_byte(uint16_t addr, uint8_t data)
|
|||
// PCM mode (FIFO is append-only)
|
||||
if (asc->channel_ctrl & 2) {
|
||||
// stereo mode - each channel has its own buffer pointer
|
||||
if (addr < 0x400) {
|
||||
// left buffer
|
||||
asc->buf[l_ptr] = data;
|
||||
asc->left_ptr++;
|
||||
}
|
||||
else {
|
||||
// right buffer
|
||||
asc->buf[r_ptr] = data;
|
||||
asc->right_ptr++;
|
||||
}
|
||||
return ;
|
||||
|
||||
}
|
||||
else {
|
||||
// mono mode
|
||||
// Mono mode
|
||||
asc->buf[m_ptr] = data;
|
||||
asc->left_ptr++;
|
||||
return ;
|
||||
}
|
||||
}
|
||||
else {
|
||||
// Off or wavetable mode (FIFO is random access)
|
||||
asc->buf[asc->left_ptr] = data;
|
||||
asc->left_ptr = (asc->left_ptr + 1) & 0x7ff;
|
||||
asc->buf[addr] = data;
|
||||
return ;
|
||||
}
|
||||
}
|
||||
else {
|
||||
|
|
@ -199,13 +229,15 @@ ASC notes:
|
|||
0x800 - Version (?) MacII only ever seems to TST.B it
|
||||
(READ ONLY)
|
||||
|
||||
$00 -> My Mac II's ASC's version. According to the Mac II rom, there seem to be other masks with non-0x00 versions.
|
||||
$00 -> My Mac II's ASC's version
|
||||
|
||||
$b0 -> something more advanced than regular ASC (something with registers in the $fxx range)
|
||||
$?? -> Mac II's ROM is aware of other non-$00 ASC masks
|
||||
|
||||
$b0 -> EASC
|
||||
|
||||
————
|
||||
|
||||
0x801 - Mode (?) 0 == no output, 1 == PCM, 2 == wavetable
|
||||
0x801 - Mode (?) 0 == no output, 1 == PCM, 2 == wavetable, 3 == hissing static(??)
|
||||
- Preserves low 2 bits, ignores high 6 bits
|
||||
|
||||
0x802 - Channel selector
|
||||
|
|
|
|||
Loading…
Reference in New Issue