Lots of new ethernet-related code (doesn't work yet)
The board is basically implemented. It's just a dummy slot ROM with no driver or primary/secondary init, that looks enough like the Apple EtherTalk card. The DP8390 controller chip has its address space implemented, and some of its registers work. Lots more work to do on that With slog() tracing enabled, you can see A/UX try to send a multicast ethernet frame, then give up waiting for some kind of response from the chip, then decide that the ethernet controller is dead and print an error to console
This commit is contained in:
parent
20fedf386b
commit
fd31d642b0
|
@ -575,6 +575,27 @@ uint32_t shoebill_install_tfb_card(shoebill_config_t *config, uint8_t slotnum)
|
|||
return 1;
|
||||
}
|
||||
|
||||
uint32_t shoebill_install_ethernet_card(shoebill_config_t *config, uint8_t slotnum, uint8_t ethernet_addr[6])
|
||||
{
|
||||
shoebill_card_ethernet_t *ctx;
|
||||
|
||||
if (shoe.slots[slotnum].card_type != card_none) {
|
||||
sprintf(config->error_msg, "This slot (%u) already has a card\n", slotnum);
|
||||
return 0;
|
||||
}
|
||||
|
||||
ctx = p_alloc(shoe.pool, sizeof(shoebill_card_ethernet_t));
|
||||
shoe.slots[slotnum].ctx = ctx;
|
||||
|
||||
shoe.slots[slotnum].card_type = card_shoebill_ethernet;
|
||||
shoe.slots[slotnum].connected = 1;
|
||||
shoe.slots[slotnum].read_func = nubus_ethernet_read_func;
|
||||
shoe.slots[slotnum].write_func = nubus_ethernet_write_func;
|
||||
shoe.slots[slotnum].interrupts_enabled = 1;
|
||||
nubus_ethernet_init(ctx, slotnum, ethernet_addr);
|
||||
return 1;
|
||||
}
|
||||
|
||||
shoebill_video_frame_info_t shoebill_get_video_frame(uint8_t slotnum,
|
||||
_Bool just_params)
|
||||
{
|
||||
|
|
463
core/ethernet.c
463
core/ethernet.c
|
@ -0,0 +1,463 @@
|
|||
/*
|
||||
* Copyright (c) 2014, Peter Rutenbar <pruten@gmail.com>
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice, this
|
||||
* list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#include <assert.h>
|
||||
#include <stdlib.h>
|
||||
#include <string.h>
|
||||
#include "shoebill.h"
|
||||
|
||||
#include "ethernet_rom/rom.c"
|
||||
|
||||
static uint32_t compute_nubus_crc(uint8_t *rom, uint32_t len)
|
||||
{
|
||||
uint32_t i, sum = 0;
|
||||
|
||||
for (i=0; i<len; i++) {
|
||||
uint8_t byte = rom[i];
|
||||
|
||||
if (i==(len-9) || i==(len-10) || i==(len-11) || i==(len-12))
|
||||
byte = 0;
|
||||
|
||||
sum = (sum << 1) + (sum >> 31) + byte;
|
||||
}
|
||||
|
||||
rom[len-9] = sum & 0xff;
|
||||
rom[len-10] = (sum >> 8) & 0xff;
|
||||
rom[len-11] = (sum >> 16) & 0xff;
|
||||
rom[len-12] = (sum >> 24) & 0xff;
|
||||
|
||||
return sum;
|
||||
}
|
||||
|
||||
#define ETHPAGE() (ctx->cr >> 6)
|
||||
const char *eth_r0_reg_names[16] = {
|
||||
"cr", "clda0", "clda1", "bnry",
|
||||
"tsr", "ncr", "fifo", "isr",
|
||||
"crda0", "crda1", "reserved1", "reserved2",
|
||||
"rsr", "cntr0", "cntr1", "cntr2"
|
||||
};
|
||||
const char *eth_1_reg_names[16] = {
|
||||
"cr", "par0", "par1", "par2",
|
||||
"par3", "par4", "par5", "curr",
|
||||
"mar0", "mar1", "mar2", "mar3",
|
||||
"mar4", "mar5", "mar6", "mar7"
|
||||
};
|
||||
const char *eth_w0_reg_names[16] = {
|
||||
"cr", "pstart", "pstop", "bnry",
|
||||
"tpsr", "tbcr0", "tbcr1", "isr",
|
||||
"rsar0", "rsar1", "rbcr0", "rbcr1",
|
||||
"rcr", "tcr", "dcr", "imr"
|
||||
};
|
||||
|
||||
// command register bit masks
|
||||
enum ether_cr_masks {
|
||||
cr_stp = 1<<0, // stop
|
||||
cr_sta = 1<<1, // start
|
||||
cr_txp = 1<<2, // transmit packet
|
||||
cr_rd0 = 1<<3, // remote dma command (0)
|
||||
cr_rd1 = 1<<4, // remote dma command (1)
|
||||
cr_rd2 = 1<<5, // remote dma command (2)
|
||||
cr_ps0 = 1<<6, // page select (0)
|
||||
cr_ps1 = 1<<7, // page select (1)
|
||||
};
|
||||
|
||||
// interrupt service register bit masks
|
||||
enum ether_isr_masks {
|
||||
isr_prx = 1<<0, // packet received
|
||||
isr_ptx = 1<<1, // packet transmitted
|
||||
isr_rxe = 1<<2, // receive error
|
||||
isr_txe = 1<<3, // transmit error
|
||||
isr_ovw = 1<<4, // overwrite warning
|
||||
isr_cnt = 1<<5, // counter overflow
|
||||
isr_rdc = 1<<6, // remote dma complete
|
||||
isr_rst = 1<<7, // reset status (not actually an interrupt)
|
||||
};
|
||||
|
||||
// interrupt mask register bit masks
|
||||
enum ether_imr_masks {
|
||||
imr_pxre = 1<<0, // packet received interrupt enable
|
||||
imr_ptxe = 1<<1, // packet transmitted interrupt enable
|
||||
imr_rxee = 1<<2, // receive error interrupt enable
|
||||
imr_txee = 1<<3, // transmit error interrupt enable
|
||||
imr_ovwe = 1<<4, // overwrite warning interrupt enable
|
||||
imr_cnte = 1<<5, // counter overflow interrupt enable
|
||||
imr_rdce = 1<<6, // dma complete
|
||||
};
|
||||
|
||||
// receive configuration register bit masks
|
||||
enum ether_rcr_masks {
|
||||
rcr_sep = 1<<0, // save error packets
|
||||
rcr_ar = 1<<1, // accept runt packets
|
||||
rcr_ab = 1<<2, // accept broadcast
|
||||
rcr_am = 1<<3, // accept multicast
|
||||
rcr_pro = 1<<4, // promiscuous physical
|
||||
rcr_mon = 1<<5, // monitor mode
|
||||
};
|
||||
|
||||
// transmit configuration register bit masks
|
||||
enum ether_tcr_masks {
|
||||
tcr_crc = 1<<0, // inhibit crc
|
||||
tcr_lb0 = 1<<1, // encoded loopback control (0)
|
||||
tcr_lb1 = 1<<2, // encoded loopback control (1)
|
||||
tcr_atd = 1<<3, // auto transmit disable
|
||||
tcr_ofst = 1<<4, // collision offset enable
|
||||
};
|
||||
|
||||
// data configuration register bit masks
|
||||
enum ether_dcr_masks {
|
||||
dcr_wts = 1<<0, // word transfer select
|
||||
dcr_bos = 1<<1, // byte order select
|
||||
dcr_las = 1<<2, // long address select
|
||||
dcr_ls = 1<<3, // loopback select
|
||||
dcr_arm = 1<<4, // auto-initialize remote
|
||||
dcr_ft0 = 1<<5, // fifo threshhold select (0)
|
||||
dcr_ft1 = 1<<6, // fifo threshhold select (1)
|
||||
};
|
||||
|
||||
void nubus_ethernet_init(void *_ctx, uint8_t slotnum, uint8_t ethernet_addr[6])
|
||||
{
|
||||
shoebill_card_ethernet_t *ctx = (shoebill_card_ethernet_t*)_ctx;
|
||||
|
||||
memset(ctx, 0, sizeof(shoebill_card_ethernet_t));
|
||||
memcpy(ctx->rom, _ethernet_rom, 4096);
|
||||
|
||||
memcpy(ctx->ethernet_addr, ethernet_addr, 6);
|
||||
memcpy(ctx->rom, ethernet_addr, 6);
|
||||
ctx->rom[6] = 0x00;
|
||||
ctx->rom[7] = 0x00;
|
||||
|
||||
/*
|
||||
* The first 8 bytes contain the MAC address
|
||||
* and aren't part of the CRC
|
||||
*/
|
||||
compute_nubus_crc(&ctx->rom[8], 4096 - 8);
|
||||
|
||||
ctx->cr |= cr_stp; // "STP powers up high"
|
||||
ctx->isr |= isr_rst; // I presume ISR's RST powers up high too
|
||||
}
|
||||
|
||||
uint32_t nubus_ethernet_read_func(const uint32_t rawaddr,
|
||||
const uint32_t size,
|
||||
const uint8_t slotnum)
|
||||
{
|
||||
shoebill_card_ethernet_t *ctx = (shoebill_card_ethernet_t*)shoe.slots[slotnum].ctx;
|
||||
uint32_t result = 0;
|
||||
|
||||
switch ((rawaddr >> 16) & 0xf) {
|
||||
case 0xd: { // ram
|
||||
const uint16_t addr = rawaddr & 0xfff;
|
||||
uint8_t *ram = ctx->ram;
|
||||
|
||||
if (size == 1)
|
||||
result = ram[addr];
|
||||
else if (size == 2) {
|
||||
result = ram[addr] << 8;
|
||||
result |= ram[(addr+1) & 0xfff];
|
||||
}
|
||||
else
|
||||
assert(!"read: bogus size");
|
||||
|
||||
slog("ethernet: reading from ram addr 0x%x sz=%u ", addr, size);
|
||||
|
||||
goto done;
|
||||
}
|
||||
case 0xe: { // registers
|
||||
// For some reason, the register address bits are all inverted
|
||||
const uint8_t reg = 15 ^ ((rawaddr >> 2) & 15);
|
||||
assert(size == 1);
|
||||
|
||||
{
|
||||
const char *name = "???";
|
||||
if (ETHPAGE() == 0) name = eth_r0_reg_names[reg];
|
||||
else if (ETHPAGE() == 1) name = eth_1_reg_names[reg];
|
||||
slog("ethernet: reading from register %u (%s) (raw=0x%x) pc=0x%x ", reg, name, rawaddr, shoe.pc);
|
||||
}
|
||||
|
||||
if (reg == 0) { // command register (exists in all pages)
|
||||
result = ctx->cr;
|
||||
goto done;
|
||||
} else if (ETHPAGE() == 0) { // page 0
|
||||
switch (reg) {
|
||||
default:
|
||||
assert(!"never get here");
|
||||
goto done;
|
||||
case 1: // clda0 (current local dma address 0)
|
||||
goto done;
|
||||
|
||||
case 2: // clda1 (current local dma address 1)
|
||||
goto done;
|
||||
|
||||
case 3: // bnry (boundary pointer)
|
||||
result = ctx->bnry;
|
||||
goto done;
|
||||
|
||||
case 4: // tsr (transmit status)
|
||||
goto done;
|
||||
|
||||
case 5: // ncr (number of collisions)
|
||||
goto done;
|
||||
|
||||
case 6: // fifo
|
||||
goto done;
|
||||
|
||||
case 7: // isr (interrupt status register)
|
||||
result = ctx->isr;
|
||||
goto done;
|
||||
|
||||
case 8: // crda0 (current remote DMA address 0)
|
||||
goto done;
|
||||
|
||||
case 9: // crda1 (current remote DMA address 1)
|
||||
goto done;
|
||||
|
||||
case 10: // reserved 1
|
||||
assert("read to reserved 1");
|
||||
goto done;
|
||||
|
||||
case 11: // reserved 2
|
||||
assert(!"read to reserved 2");
|
||||
goto done;
|
||||
|
||||
case 12: // rsr (receive status register)
|
||||
goto done;
|
||||
|
||||
case 13: // cntr0 (tally counter 0 (frame alignment errors))
|
||||
goto done;
|
||||
|
||||
case 14: // cntr1 (tally counter 1 (crc errors))
|
||||
goto done;
|
||||
|
||||
case 15: // cntr2 (tally counter 2 (missed packet errors))
|
||||
goto done;
|
||||
}
|
||||
} else if (ETHPAGE() == 1) { // page 1
|
||||
switch (reg) {
|
||||
default:
|
||||
assert(!"never get here");
|
||||
goto done;
|
||||
case 1: // par (physical address)
|
||||
case 2:
|
||||
case 3:
|
||||
case 4:
|
||||
case 5:
|
||||
case 6:
|
||||
result = ctx->par[reg - 1];
|
||||
goto done;
|
||||
case 7: // curr (current page register)
|
||||
result = ctx->curr;
|
||||
goto done;
|
||||
case 8: // mar (multicast address)
|
||||
case 9:
|
||||
case 10:
|
||||
case 11:
|
||||
case 12:
|
||||
case 13:
|
||||
case 14:
|
||||
case 15:
|
||||
result = ctx->mar[reg - 8];
|
||||
goto done;
|
||||
}
|
||||
} else
|
||||
assert(!"read: Somebody accessed page 2 or 3!");
|
||||
|
||||
assert(!"never get here");
|
||||
goto done;
|
||||
}
|
||||
case 0xf: { // rom
|
||||
// Byte lanes = 0101 (respond to shorts)
|
||||
// respond to (addr & 3 == 0) and (addr & 3 == 2)
|
||||
// xxxx00 xxxx10
|
||||
if ((rawaddr & 1) == 0)
|
||||
result = ctx->rom[(rawaddr >> 1) % 4096];
|
||||
|
||||
slog("ethernet: reading from rom addr=%x ", rawaddr);
|
||||
|
||||
goto done;
|
||||
}
|
||||
default: // Not sure what happens when you access a different addr
|
||||
assert(!"read: unknown ethernet register");
|
||||
}
|
||||
|
||||
done:
|
||||
|
||||
slog("result = 0x%x\n", result);
|
||||
// slog("ethernet: reading 0x%x sz=%u from addr 0x%x\n", result, size, rawaddr);
|
||||
|
||||
return result;
|
||||
}
|
||||
|
||||
|
||||
void nubus_ethernet_write_func(const uint32_t rawaddr,
|
||||
const uint32_t size,
|
||||
const uint32_t data,
|
||||
const uint8_t slotnum)
|
||||
{
|
||||
shoebill_card_ethernet_t *ctx = (shoebill_card_ethernet_t*)shoe.slots[slotnum].ctx;
|
||||
uint32_t i;
|
||||
// slog("ethernet: writing 0x%x sz=%u to addr 0x%x\n", data, size, rawaddr);
|
||||
|
||||
switch ((rawaddr >> 16) & 0xf) {
|
||||
case 0xd: { // ram
|
||||
const uint16_t addr = rawaddr & 0xfff;
|
||||
uint8_t *ram = ctx->ram;
|
||||
|
||||
|
||||
if (size == 1)
|
||||
ram[addr] = data;
|
||||
else if (size == 2) {
|
||||
ram[addr] = data >> 8;
|
||||
ram[(addr+1) & 0xfff] = data & 0xff;
|
||||
}
|
||||
else
|
||||
assert(!"write: bogus size");
|
||||
|
||||
slog("ethernet: writing 0x%x sz=%u to ram addr 0x%x\n", data, size, addr);
|
||||
|
||||
goto done;
|
||||
}
|
||||
case 0xe: { // registers
|
||||
// For some reason, the register address bits are all inverted
|
||||
const uint8_t reg = 15 ^ ((rawaddr >> 2) & 15);
|
||||
assert(size == 1);
|
||||
|
||||
if (reg == 0) { // command register (exists in all pages)
|
||||
ctx->cr = data;
|
||||
goto done;
|
||||
} else if (ETHPAGE() == 0) { // page 0
|
||||
|
||||
{
|
||||
const char *name = "???";
|
||||
if (ETHPAGE() == 0) name = eth_w0_reg_names[reg];
|
||||
else if (ETHPAGE() == 1) name = eth_1_reg_names[reg];
|
||||
slog("ethernet: writing 0x%02x to register %u (%s) (rawaddr=0x%x) pc=0x%x\n", data, reg, name, rawaddr, shoe.pc);
|
||||
}
|
||||
|
||||
switch (reg) {
|
||||
default:
|
||||
assert(!"never get here");
|
||||
goto done;
|
||||
|
||||
case 1: // pstart (page start)
|
||||
ctx->pstart = data;
|
||||
goto done;
|
||||
|
||||
case 2: // pstop (page stop)
|
||||
ctx->pstop = data;
|
||||
goto done;
|
||||
|
||||
case 3: // bnry (boundary pointer)
|
||||
ctx->bnry = data;
|
||||
goto done;
|
||||
|
||||
case 4: // tpsr (transmit page start address)
|
||||
ctx->tpsr = data;
|
||||
goto done;
|
||||
|
||||
case 5: // tbcr0 (transmit byte count 0)
|
||||
ctx->tbcr = (ctx->tbcr & 0xff00) | data;
|
||||
goto done;
|
||||
|
||||
case 6: // tbcr1 (transmit byte count 1)
|
||||
ctx->tbcr = (ctx->tbcr & 0x00ff) | (data<<8);
|
||||
goto done;
|
||||
|
||||
case 7: // isr (interrupt status)
|
||||
ctx->isr = data;
|
||||
goto done;
|
||||
|
||||
case 8: // rsar0 (remote start address 0)
|
||||
goto done;
|
||||
|
||||
case 9: // rsar1 (remote start address 1)
|
||||
goto done;
|
||||
|
||||
case 10: // rbcr0 (remote byte count 0)
|
||||
goto done;
|
||||
|
||||
case 11: // rbcr1 (remote byte count 1)
|
||||
goto done;
|
||||
|
||||
case 12: // rcr (receive configuration)
|
||||
ctx->rcr = data;
|
||||
goto done;
|
||||
|
||||
case 13: // tcr (transmit configuration)
|
||||
ctx->tcr = data;
|
||||
goto done;
|
||||
|
||||
case 14: // dcr (data configuration)
|
||||
ctx->dcr = data;
|
||||
goto done;
|
||||
|
||||
case 15: // imr (interrupt mask)
|
||||
goto done;
|
||||
}
|
||||
} else if (ETHPAGE() == 1) { // page 1
|
||||
switch (reg) {
|
||||
default:
|
||||
assert(!"never get here");
|
||||
goto done;
|
||||
case 1: // par (physical address)
|
||||
case 2:
|
||||
case 3:
|
||||
case 4:
|
||||
case 5:
|
||||
case 6:
|
||||
ctx->par[reg - 1] = data;
|
||||
goto done;
|
||||
case 7: // curr (current page register)
|
||||
ctx->curr = data;
|
||||
goto done;
|
||||
case 8: // mar (multicast address)
|
||||
case 9:
|
||||
case 10:
|
||||
case 11:
|
||||
case 12:
|
||||
case 13:
|
||||
case 14:
|
||||
case 15:
|
||||
ctx->mar[reg - 8] = data;
|
||||
goto done;
|
||||
}
|
||||
} else
|
||||
assert(!"write: Somebody accessed page 2 or 3!");
|
||||
|
||||
assert(!"never get here");
|
||||
goto done;
|
||||
}
|
||||
default:
|
||||
assert(!"write: unknown ethernet register");
|
||||
}
|
||||
|
||||
done:
|
||||
|
||||
return;
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
Binary file not shown.
|
@ -0,0 +1,514 @@
|
|||
uint8_t _ethernet_rom[4096] = {
|
||||
0x77, 0x6f, 0x6f, 0x66, 0x00, 0x00, 0x00, 0x00,
|
||||
0x77, 0x6f, 0x6f, 0x66, 0x00, 0x00, 0x00, 0x00,
|
||||
0x01, 0x00, 0x00, 0x0c, 0x80, 0x00, 0x00, 0x64,
|
||||
0xff, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x14,
|
||||
0x02, 0x00, 0x00, 0x18, 0x20, 0x00, 0x00, 0x08,
|
||||
0x24, 0x00, 0x00, 0x28, 0xff, 0x00, 0x00, 0x00,
|
||||
0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x53, 0x68, 0x6f, 0x65, 0x62, 0x69, 0x6c, 0x6c,
|
||||
0x20, 0x50, 0x68, 0x6f, 0x6e, 0x79, 0x20, 0x45,
|
||||
0x74, 0x68, 0x65, 0x72, 0x6e, 0x65, 0x74, 0x00,
|
||||
0x01, 0x00, 0x00, 0x0c, 0x03, 0x00, 0x00, 0x14,
|
||||
0x04, 0x00, 0x00, 0x18, 0x53, 0x68, 0x6f, 0x65,
|
||||
0x62, 0x69, 0x6c, 0x6c, 0x00, 0x00, 0x00, 0x00,
|
||||
0x52, 0x65, 0x76, 0x2d, 0x31, 0x00, 0x00, 0x00,
|
||||
0x42, 0x6f, 0x72, 0x74, 0x00, 0x00, 0x00, 0x00,
|
||||
0x01, 0x00, 0x00, 0x14, 0x02, 0x00, 0x00, 0x18,
|
||||
0x0a, 0x00, 0x00, 0x30, 0x80, 0xff, 0xff, 0x7c,
|
||||
0xff, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x01,
|
||||
0x00, 0x00, 0x00, 0x01, 0x4e, 0x65, 0x74, 0x77,
|
||||
0x6f, 0x72, 0x6b, 0x5f, 0x45, 0x74, 0x68, 0x65,
|
||||
0x72, 0x6e, 0x65, 0x74, 0x5f, 0x53, 0x68, 0x6f,
|
||||
0x65, 0x62, 0x69, 0x6c, 0x6c, 0x00, 0x00, 0x00,
|
||||
0x00, 0x0d, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xf0, 0x24,
|
||||
0x00, 0x00, 0x0f, 0xf8, 0x00, 0x00, 0x00, 0x00,
|
||||
0x01, 0x01, 0x5a, 0x93, 0x2b, 0xc7, 0x00, 0xa5
|
||||
};
|
|
@ -0,0 +1 @@
|
|||
# File: shoebill_ether.make
# Target: shoebill_ether
# Sources: shoebill_ether_rom.a
OBJECTS = shoebill_ether_rom.a.o
shoebill_ether ÄÄ shoebill_ether.make {OBJECTS}
Link ¶
{OBJECTS} ¶
-o shoebill_ether
shoebill_ether_rom.a.o Ä shoebill_ether.make shoebill_ether_rom.a
Asm shoebill_ether_rom.a
|
|
@ -0,0 +1 @@
|
|||
MACHINE MC68020
STRING C
PRINT OFF ; What does this do?
INCLUDE 'SysErr.a'
INCLUDE 'SysEqu.a'
INCLUDE 'ROMEqu.a'
INCLUDE 'SlotEqu.a'
INCLUDE 'TimeEqu.a'
INCLUDE 'Traps.a'
INCLUDE 'VideoEqu.a'
INCLUDE 'QuickEqu.a'
PRINT ON
VideoDeclROM MAIN
WITH VDPageInfo,SlotIntQElement
; EtherAddr is placed here, before sResourceDir and out of the range of the CRC
; check, because I guess it was too difficult to recompute the CRC when they were
; burning EPROMs back in 1986.
; So there's some ugly offset-accounting to make the rom seem (4096-8) bytes long,
; but still access this MAC address.
myEtherAddr
dc.l 'woof'
dc.l 'woof'
FormatBlockSize EQU 20
ROMSize EQU 4096
MyBoardID EQU $0008 ; Apple EtherTalk board ID
; ---- sResource directory ----
CategoryBoard EQU 1
CategoryEther EQU 128
sResourceDir OSLstEntry CategoryBoard, sResourceBoard
OSLstEntry CategoryEther, sResourceEther
DatLstEntry endOfList,0
; ---- Board sResource ----
sResourceBoard
OSLstEntry sRsrcType, boardType
OSLstEntry sRsrcName, boardName
DatLstEntry boardID, MyBoardID
OSLstEntry vendorInfo, myVendorInfo
; No primary or secondary init needed (phew)
DatLstEntry endOfList, 0
boardType
DC.W CatBoard ; category
DC.W TypBoard ; type
DC.W 0 ; driver sw ?
DC.W 0 ; driver hw ?
STRING C
boardName DC.L 'Shoebill Phony Ethernet'
myVendorInfo OSLstEntry VendorId, myVendorID
OSLstEntry RevLevel, myRevLevel
OSLstEntry PartNum, myPartNum
myVendorID DC.L 'Shoebill'
myRevLevel DC.L 'Rev-1'
myPartNum DC.L 'Bort'
; ---- Ethernet sResource ----
sResourceEther
OSLstEntry sRsrcType, myEtherType
OSLstEntry sRsrcName, myEtherName
OSLstEntry MinorBaseOS, myMinorBaseOS
dc.w $80ff ; 80 -> MAC address, $FFFFxx relative address of the MAC address
dc.w -*+2
DatLstEntry endOfList, 0
myEtherType
dc.w CatNetwork
dc.w TypEtherNet
dc.w 0 ; drvrSw, doesn't matter
dc.w 1 ; drvrHw, this is DrHw3Com on Apple EtherTalk
myEtherName
dc.l 'Network_Ethernet_Shoebill'
myMinorBaseOS DC.L $D0000
STRING C
; ---- Format block ----
; Pad to align this structure with the end of the rom
ORG ROMSize-FormatBlockSize
; Offset to sResource directory
;OSLstEntry 0,sResourceDir
DC.L (sResourceDir-*)**$00FFFFFF
DC.L ROMSize-8
DC.L 0 ; CRC goes here
DC.B 1 ; Rom revision level
DC.B AppleFormat
DC.L TestPattern
DC.B 0 ; Reserved
DC.B $A5 ; Byte lanes 1010 0101 (LSB from CPU's perspective)
ENDP
END
|
|
@ -133,6 +133,9 @@ uint32_t shoebill_install_video_card(shoebill_config_t *config, uint8_t slotnum,
|
|||
|
||||
uint32_t shoebill_install_tfb_card(shoebill_config_t *config, uint8_t slotnum);
|
||||
|
||||
/* Call this after shoebill_initialize() to add an ethernet card */
|
||||
uint32_t shoebill_install_ethernet_card(shoebill_config_t *config, uint8_t slotnum, uint8_t ethernet_addr[6]);
|
||||
|
||||
/* Get a video frame from a particular video card */
|
||||
shoebill_video_frame_info_t shoebill_get_video_frame(uint8_t slotnum, _Bool just_params);
|
||||
|
||||
|
@ -593,14 +596,37 @@ typedef struct {
|
|||
} shoebill_card_tfb_t;
|
||||
|
||||
typedef struct {
|
||||
// Doesn't exist yet
|
||||
uint8_t rom[4096];
|
||||
uint8_t ram[4096];
|
||||
uint8_t ethernet_addr[6];
|
||||
|
||||
uint8_t cr; // command register, all pages, read/write
|
||||
|
||||
// Page 0 registers
|
||||
uint8_t isr; // interrupt status register, read/write
|
||||
uint8_t dcr; // data configuration register (write)
|
||||
uint8_t tcr; // transmit configuration register (write)
|
||||
uint8_t rcr; // receive configuration register (write)
|
||||
uint8_t pstart; // receive buffer start pointer (write)
|
||||
uint8_t pstop; // receive buffer boundary (write)
|
||||
uint8_t bnry; // a different kind of receive buffer boundary (read/write)
|
||||
|
||||
uint8_t tpsr; // transmit page start pointer (write)
|
||||
uint16_t tbcr; // transmit buffer count register (write)
|
||||
|
||||
|
||||
// Page 1 registers (read/write)
|
||||
uint8_t mar[8]; // multicast address
|
||||
uint8_t par[6]; // physical address
|
||||
uint8_t curr; // current page
|
||||
|
||||
} shoebill_card_ethernet_t;
|
||||
|
||||
typedef enum {
|
||||
card_none = 0, // Empty slot
|
||||
card_toby_frame_buffer, // Original Macintosh II video card
|
||||
card_shoebill_video, // Fancy 21st-century Shoebill video card
|
||||
card_shoebill_ethernet // FIXME: doesn't exist yet
|
||||
card_shoebill_ethernet // "Register-compatible" Apple EtherTalk card
|
||||
} card_names_t;
|
||||
|
||||
typedef struct {
|
||||
|
@ -1024,6 +1050,11 @@ void nubus_video_write_func(const uint32_t rawaddr, const uint32_t size,
|
|||
shoebill_video_frame_info_t nubus_video_get_frame(shoebill_card_video_t *ctx,
|
||||
_Bool just_params);
|
||||
|
||||
// Apple EtherTalk
|
||||
void nubus_ethernet_init(void *_ctx, uint8_t slotnum, uint8_t ethernet_addr[6]);
|
||||
uint32_t nubus_ethernet_read_func(uint32_t, uint32_t, uint8_t);
|
||||
void nubus_ethernet_write_func(uint32_t, uint32_t, uint32_t, uint8_t);
|
||||
|
||||
// Sound (Apple Sound Chip)
|
||||
void sound_dma_write_raw(uint16_t addr, uint8_t sz, uint32_t data);
|
||||
uint32_t sound_dma_read_raw(uint16_t addr, uint8_t sz);
|
||||
|
|
|
@ -10,16 +10,16 @@ int main (int argc, char **argv)
|
|||
uint32_t i;
|
||||
|
||||
if (argc != 3) {
|
||||
printf("usage ./rom_to_c video_rom.bin video_rom.c\n");
|
||||
printf("usage ./rom_to_c video|ethernet rom.bin rom.c\n");
|
||||
return 0;
|
||||
}
|
||||
|
||||
assert(in = fopen(argv[1], "rb"));
|
||||
assert(out = fopen(argv[2], "w"));
|
||||
assert(in = fopen(argv[2], "rb"));
|
||||
assert(out = fopen(argv[3], "w"));
|
||||
|
||||
assert(fread(rom, 4096, 1, in) == 1);
|
||||
|
||||
fprintf(out, "static uint8_t _video_rom[4096] = {\n\t");
|
||||
fprintf(out, "static uint8_t _%s_rom[4096] = {\n\t", argv[1]);
|
||||
for (i=0; i<4095; i++) {
|
||||
fprintf(out, "0x%02x, ", rom[i]);
|
||||
if ((i % 8) == 7)
|
||||
|
|
|
@ -373,6 +373,9 @@ void pram_callback (void *param, const uint8_t addr, const uint8_t byte)
|
|||
|
||||
[self createScreenWindow:9 height:height width:width];
|
||||
|
||||
uint8_t ethernet_addr[6] = {0x22, 0x33, 0x55, 0x77, 0xbb, 0xdd};
|
||||
shoebill_install_ethernet_card(&config, 13, ethernet_addr);
|
||||
|
||||
shoebill_start();
|
||||
|
||||
isRunning = true;
|
||||
|
|
Loading…
Reference in New Issue