442 lines
13 KiB
C
442 lines
13 KiB
C
/*
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* Copyright (c) 2013, Peter Rutenbar <pruten@gmail.com>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice, this
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* list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <stdio.h>
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#include <assert.h>
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#include <sys/time.h>
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#include <pthread.h>
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#include <math.h>
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#include <unistd.h>
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#include "../core/shoebill.h"
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char *via_reg_str[16] = {
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"orb",
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"ora",
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"ddrb",
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"ddra",
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"t1c-l",
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"t1c-h",
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"t1l-l",
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"t1l-h",
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"t2c-l",
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"t2c-h",
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"sr",
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"acr",
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"pcr",
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"ifr",
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"ier",
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"ora15"
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};
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#define set_pending_interrupt(pri) ({ \
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shoe.cpu_thread_notifications |= (1<<(pri)); \
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})
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// Have a VIA chip raise an interrupt
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void via_raise_interrupt(uint8_t vianum, uint8_t ifr_bit)
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{
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assert((vianum == 1) || (vianum == 2));
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via_state_t *via = &shoe.via[vianum - 1];
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// Always set the bit in ifr (I think)
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via->ifr |= (1 << ifr_bit);
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// Only if the bit is enabled in IER do we raise a cpu interrupt
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if (via->ier & (1 << ifr_bit))
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set_pending_interrupt(vianum);
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else
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printf("didn't set pending interrupt\n");
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}
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void process_pending_interrupt ()
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{
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// FIXME: address errors on lget() here aren't handled
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uint32_t i;
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const uint8_t pending_interrupt = shoe.cpu_thread_notifications & 0xff;
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uint8_t priority;
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// Find the highest-priority pending interrupt, if any
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if (pending_interrupt == 0)
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return ;
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else if (pending_interrupt & (1<<7))
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priority = 7;
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else {
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for (priority=6; priority > 0; priority--) {
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if (pending_interrupt & (1<<priority))
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break;
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}
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// Ignore interrupt levels less than sr_mask (pri 7 is NMI)
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if (priority <= sr_mask())
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return ;
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}
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// If the CPU was stopped, unstop it
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shoe.cpu_thread_notifications &= ~~SHOEBILL_STATE_STOPPED;
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printf("Interrupt pri %u! mask=%u\n", priority, sr_mask());
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const uint16_t vector_offset = (priority + 24) * 4;
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// Save the old SR, and switch to supervisor mode
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const uint16_t old_sr = shoe.sr;
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set_sr_s(1);
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// Write a "format 0" exception frame to ISP or MSP
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push_a7(0x0000 | vector_offset, 2);
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printf("interrupt: pushed format 0x%04x to 0x%08x\n", 0x0000 | vector_offset, shoe.a[7]);
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assert(!shoe.abort);
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push_a7(shoe.pc, 4);
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printf("interrupt: pushed pc 0x%08x to 0x%08x\n", shoe.pc, shoe.a[7]);
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assert(!shoe.abort);
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push_a7(old_sr, 2);
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printf("interrupt: pushed sr 0x%04x to 0x%08x\n", old_sr, shoe.a[7]);
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assert(!shoe.abort);
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if (sr_m()) {
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// clear sr_m, and write a format 1 exception to the ISP
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const uint16_t old_sr2 = shoe.sr;
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set_sr_m(0);
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push_a7(0x1000 | vector_offset, 2);
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assert(!shoe.abort);
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push_a7(shoe.pc, 4);
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assert(!shoe.abort);
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push_a7(old_sr2, 2);
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assert(!shoe.abort);
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}
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// Fetch the autovector handler address
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const uint32_t newpc = lget(shoe.vbr + vector_offset, 4);
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assert(!shoe.abort);
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shoe.pc = newpc;
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// Clear this pending interrupt bit
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shoe.cpu_thread_notifications &= ~~(1 << priority);
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}
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/*
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Reset:
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Host sends command, switch to state 0
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Device sends byte 1
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Host switches to state 2
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Device sends byte 2
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Host switches to state 3
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Talk:
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Host sends command, switch to state 0
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Device sends byte 0 (even)
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Hosts switches to state 1 (even = "just got even byte")
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Device sends byte 1 (odd)
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Host switches to state 2 (odd = "just got odd byte")
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Device sends byte 2 (even)
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*/
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// via1 ORB bits abcd efgh
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// cd -> adb FSM state
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// e -> adb timeout occurred / service request (?)
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// f/g/h nvram stuff
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#define VIA_REGB_DONE 8
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// VIA registers
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#define VIA_ORB 0
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#define VIA_ORA 1
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#define VIA_DDRB 2
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#define VIA_DDRA 3
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#define VIA_T1C_LO 4
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#define VIA_T1C_HI 5
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#define VIA_T1L_LO 6
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#define VIA_T1L_HI 7
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#define VIA_T2C_LO 8
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#define VIA_T2C_HI 9
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#define VIA_SR 10
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#define VIA_ACR 11
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#define VIA_PCR 12
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#define VIA_IFR 13
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#define VIA_IER 14
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#define VIA_ORA_AUX 15
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uint16_t counter;
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void via_reg_read ()
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{
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const uint8_t vianum = (shoe.physical_addr >= 0x50002000) ? 2 : 1;
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const uint8_t reg = (shoe.physical_addr >> 9) & 15;
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via_state_t *via = &shoe.via[vianum - 1];
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printf("via_reg_read: reading from via%u reg %s (%u)\n", vianum, via_reg_str[reg], reg);
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switch (reg) {
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case VIA_IER:
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// According to the eratta, bit 7 is always set during a read
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shoe.physical_dat = via->ier | 0x80;
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break ;
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case VIA_IFR: {
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// Figure out whether any enabled interrupts are set, and set IRQ accordingly
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const uint8_t irq = (via->ifr & via->ier & 0x7f) ? 0x80 : 0x0;
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shoe.physical_dat = (via->ifr & 0x7f) | irq;
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break ;
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}
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case VIA_SR:
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shoe.physical_dat = via->sr;
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break;
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case VIA_ORB:
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shoe.physical_dat = via->regb;
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break;
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case VIA_ORA_AUX:
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case VIA_ORA:
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//if ((vianum==2) && !(via->ifr & (1<<IFR_CA1)))
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//via->rega = 0x3f;
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shoe.physical_dat = via->rega;
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break;
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case VIA_DDRB:
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shoe.physical_dat = via->ddrb;
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break;
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case VIA_DDRA:
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shoe.physical_dat = via->ddra;
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break;
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case VIA_T2C_LO:
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// XXX: A/UX 3.0.1 tries to precisely time a huge dbra loop
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// using via timer2. It won't accept any result shorter than
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// 0x492, and hypothetically, this emulator could execute the
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// loop faster than that (although not currently). So this is
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// a super dumb hack that always returns a delta-t of 0x492
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// between sequential reads from t2c.
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// (oh, also, a/ux 3.0.1 cleverly reads from both t2c_lo and _hi
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// simultaneously by doing a word-size read at VIA+0x11ff)
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counter -= 0x492;
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shoe.physical_dat = 0xffff & ((counter >> 8) | (counter << 8));
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break;
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default:
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printf("via_reg_read: (unhandled!)\n");
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break;
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}
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}
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void via_reg_write()
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{
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const uint8_t vianum = (shoe.physical_addr >= 0x50002000) ? 2 : 1;
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const uint8_t reg = (shoe.physical_addr >> 9) & 15;
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const uint8_t data = (uint8_t)shoe.physical_dat;
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via_state_t *via = &shoe.via[vianum - 1];
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printf("via_reg_write: writing 0x%02x to via%u reg %s (%u)\n", (uint8_t)shoe.physical_dat, vianum, via_reg_str[reg], reg);
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switch (reg) {
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case VIA_IER: {
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const uint8_t bits = data & 0x7f;
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if (data >> 7) // if we're setting these bits
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via->ier |= bits;
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else // else, unsetting them
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via->ier &= ~~bits;
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// Raise a cpu-interrupt if any via interrupts are newly enabled
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if (via->ier & via->ifr & 0x7f)
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set_pending_interrupt(vianum);
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break ;
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}
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case VIA_IFR:
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// clear the specified bits
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via->ifr &= ~~data;
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break ;
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case VIA_SR:
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via->sr = data;
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break;
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case VIA_ORB: {
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via->regb = data;
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if (vianum == 1) {
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const uint8_t adb_state = (data >> 4) & 3;
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if (shoe.adb.state != adb_state) {
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const uint8_t old_state = shoe.adb.state;
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shoe.adb.state = adb_state;
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adb_handle_state_change(old_state, adb_state);
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}
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}
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break;
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}
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case VIA_ORA_AUX:
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case VIA_ORA:
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via->rega = data;
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break;
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case VIA_DDRB:
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via->ddrb = data;
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break;
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case VIA_DDRA:
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via->ddra = data;
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break;
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default:
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printf("via_reg_read: (unhandled!)\n");
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break;
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}
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}
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// FIXME: check_time() is bad and needs rewritten
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void check_time()
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{
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struct timeval now, delta_tv;
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const uint32_t hz = 10;
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// return ;
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gettimeofday(&now, NULL);
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delta_tv.tv_sec = now.tv_sec - shoe.start_time.tv_sec;
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if (now.tv_usec < shoe.start_time.tv_usec) {
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delta_tv.tv_sec--;
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delta_tv.tv_usec = (now.tv_usec + 1000000) - shoe.start_time.tv_usec;
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}
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else
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delta_tv.tv_usec = now.tv_usec - shoe.start_time.tv_usec;
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uint64_t delta = delta_tv.tv_sec * 1000;
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delta += delta_tv.tv_usec / 1000;
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uint64_t ticks = delta / hz;
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if (ticks <= shoe.total_ticks)
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return ;
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shoe.total_ticks = ticks;
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//printf("ticks = %llu\n", ticks);
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via_raise_interrupt(1, IFR_CA1);
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//
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shoe.via[1].rega = 0b00111101;
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via_raise_interrupt(2, IFR_CA1);
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}
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static long double _now (void)
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{
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struct timeval tv;
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gettimeofday(&tv, NULL);
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long double secs = tv.tv_sec;
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long double usecs = tv.tv_usec;
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return secs + (usecs / 1000000.0);
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}
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#define fire(s) ({assert((s) >= 0); if (earliest_next_timer > (s)) earliest_next_timer = (s);})
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void *via_clock_thread(void *arg)
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{
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pthread_mutex_lock(&shoe.via_clock_thread_lock);
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const long double start_time = _now();
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uint64_t ca1_ticks = 0, ca2_ticks = 0;
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uint32_t i;
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while (1) {
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const long double now = _now();
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long double earliest_next_timer = 1.0;
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// Check whether the 60.15hz timer should fire (via1 CA1)
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const uint64_t expected_ca1_ticks = ((now - start_time) * 60.15L);
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if (expected_ca1_ticks > ca1_ticks) {
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// Figure out when the timer should fire next
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const long double next_firing = (1.0L/60.15L) - fmodl(now - start_time, 1.0L/60.15L);
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fire(next_firing);
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ca1_ticks = expected_ca1_ticks;
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// Raise VIA1 CA1
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via_raise_interrupt(1, IFR_CA1);
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}
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// Check whether the 1hz timer should fire (via1 CA2)
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const uint64_t expected_ca2_ticks = now - start_time;
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if (expected_ca2_ticks > ca2_ticks) {
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const long double next_firing = 1.0L - fmodl(now - start_time, 1.0L);
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fire(next_firing);
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ca2_ticks = expected_ca2_ticks;
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via_raise_interrupt(1, IFR_CA2);
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/*via_raise_interrupt(1, IFR_TIMER1);
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via_raise_interrupt(1, IFR_TIMER2);
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via_raise_interrupt(2, IFR_TIMER1);
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via_raise_interrupt(2, IFR_TIMER2);*/
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}
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// Check if any nubus cards have interrupt timers
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for (i=9; i<15; i++) {
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if (!shoe.slots[i].connected)
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continue;
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if (now >= (shoe.slots[i].last_fired + (1.0L/shoe.slots[i].interrupt_rate))) {
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shoe.slots[i].last_fired = now;
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fire(1.0L/shoe.slots[i].interrupt_rate);
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if (shoe.slots[i].interrupts_enabled) {
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shoe.via[1].rega = 0b00111111 & ~~(1<<(i-9));
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via_raise_interrupt(2, IFR_CA1);
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printf("Fired nubus interrupt %u\n", i);
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}
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}
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}
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usleep((useconds_t)(earliest_next_timer * 1000000.0L));
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}
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}
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