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Tor-Eirik Bakke Lunde 2019-08-20 20:34:13 +02:00
commit 956c3c9efa
9 changed files with 343 additions and 0 deletions
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15
.gitignore vendored Normal file
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# For PCBs designed using KiCAD: http://www.kicad-pcb.org/
# Temporary files
*.000
*.bak
*.bck
*.kicad_pcb-bak
# Netlist files (exported from Eeschema)
*.net
# Autorouter files (exported from Pcbnew)
.dsn
resources/

66
Apple II Prototype-cache.lib Normal file
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EESchema-LIBRARY Version 2.3
#encoding utf-8
#
# A2_BUS
#
DEF A2_BUS BUS 0 40 Y Y 1 F N
F0 "BUS" 900 2050 60 H V C CNN
F1 "A2_BUS" 1400 -300 60 H V C CNN
F2 "" 0 0 60 H V C CNN
F3 "" 0 0 60 H V C CNN
DRAW
S 800 -3100 1950 1900 0 1 0 N
X ~I/O_SEL 1 2200 -3000 300 L 60 60 1 1 O
X A0 2 2200 -2800 300 L 60 60 1 1 B
X A1 3 2200 -2600 300 L 60 60 1 1 B
X A2 4 2200 -2400 300 L 60 60 1 1 B
X A3 5 2200 -2200 300 L 60 60 1 1 B
X A4 6 2200 -2000 300 L 60 60 1 1 B
X A5 7 2200 -1800 300 L 60 60 1 1 B
X A6 8 2200 -1600 300 L 60 60 1 1 B
X A7 9 2200 -1400 300 L 60 60 1 1 B
X A8 10 2200 -1200 300 L 60 60 1 1 B
X ~STROBE 20 2200 800 300 L 60 60 1 1 O
X ~IRQ 30 600 1000 300 R 60 60 1 1 O
X ø0 40 600 -1000 300 R 60 60 1 1 O
X +12V 50 600 -3000 300 R 60 60 1 1 W
X A9 11 2200 -1000 300 L 60 60 1 1 B
X RDY 21 2200 1000 300 L 60 60 1 1 U
X ~RES 31 600 800 300 R 60 60 1 1 I
X ~DEVSEL 41 600 -1200 300 R 60 60 1 1 O
X A10 12 2200 -800 300 L 60 60 1 1 B
X ~DMA 22 2200 1200 300 L 60 60 1 1 U
X ~INH 32 600 600 300 R 60 60 1 1 B
X D7 42 600 -1400 300 R 60 60 1 1 B
X A11 13 2200 -600 300 L 60 60 1 1 B
X INT_OUT 23 2200 1400 300 L 60 60 1 1 O
X -12V 33 600 400 300 R 60 60 1 1 W
X D6 43 600 -1600 300 R 60 60 1 1 B
X A12 14 2200 -400 300 L 60 60 1 1 B
X DMA_OUT 24 2200 1600 300 L 60 60 1 1 O
X -5V 34 600 200 300 R 60 60 1 1 W
X D5 44 600 -1800 300 R 60 60 1 1 B
X A13 15 2200 -200 300 L 60 60 1 1 B
X +5V 25 2200 1800 300 L 60 60 1 1 w
X n.c. 35 600 0 300 R 60 60 1 1 N N
X D4 45 600 -2000 300 R 60 60 1 1 B
X A14 16 2200 0 300 L 60 60 1 1 B
X GND 26 600 1800 300 R 60 60 1 1 w
X 7M 36 600 -200 300 R 60 60 1 1 O
X D3 46 600 -2200 300 R 60 60 1 1 B
X A15 17 2200 200 300 L 60 60 1 1 O
X DMA_IN 27 600 1600 300 R 60 60 1 1 I
X Q3 37 600 -400 300 R 60 60 1 1 I
X D2 47 600 -2400 300 R 60 60 1 1 B
X R/~W 18 2200 400 300 L 60 60 1 1 O
X INT_IN 28 600 1400 300 R 60 60 1 1 I
X ø1 38 600 -600 300 R 60 60 1 1 I
X D1 48 600 -2600 300 R 60 60 1 1 B
X n.c. 19 2200 600 300 L 60 60 1 1 N N
X ~NMI 29 600 1200 300 R 60 60 1 1 O
X ~M2SEL 39 600 -800 300 R 60 60 1 1 B
X D0 49 600 -2800 300 R 60 60 1 1 B
ENDDRAW
ENDDEF
#
#End Library

1
Apple II Prototype.kicad_pcb Normal file
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(kicad_pcb (version 4) (host kicad "dummy file") )

64
Apple II Prototype.pro Normal file
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update=20/08/2019 20:30:02
version=1
last_client=kicad
[pcbnew]
version=1
LastNetListRead=
UseCmpFile=1
PadDrill=0.600000000000
PadDrillOvalY=0.600000000000
PadSizeH=1.500000000000
PadSizeV=1.500000000000
PcbTextSizeV=1.500000000000
PcbTextSizeH=1.500000000000
PcbTextThickness=0.300000000000
ModuleTextSizeV=1.000000000000
ModuleTextSizeH=1.000000000000
ModuleTextSizeThickness=0.150000000000
SolderMaskClearance=0.000000000000
SolderMaskMinWidth=0.000000000000
DrawSegmentWidth=0.200000000000
BoardOutlineThickness=0.100000000000
ModuleOutlineThickness=0.150000000000
[cvpcb]
version=1
NetIExt=net
[general]
version=1
[eeschema]
version=1
LibDir=
[eeschema/libraries]
LibName1=power
LibName2=device
LibName3=switches
LibName4=relays
LibName5=motors
LibName6=transistors
LibName7=conn
LibName8=linear
LibName9=regul
LibName10=74xx
LibName11=cmos4000
LibName12=adc-dac
LibName13=memory
LibName14=xilinx
LibName15=microcontrollers
LibName16=dsp
LibName17=microchip
LibName18=analog_switches
LibName19=motorola
LibName20=texas
LibName21=intel
LibName22=audio
LibName23=interface
LibName24=digital-audio
LibName25=philips
LibName26=display
LibName27=cypress
LibName28=siliconi
LibName29=opto
LibName30=atmel
LibName31=contrib
LibName32=valves
LibName33=Apple2_bus

60
Apple II Prototype.sch Normal file
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EESchema Schematic File Version 2
LIBS:power
LIBS:device
LIBS:switches
LIBS:relays
LIBS:motors
LIBS:transistors
LIBS:conn
LIBS:linear
LIBS:regul
LIBS:74xx
LIBS:cmos4000
LIBS:adc-dac
LIBS:memory
LIBS:xilinx
LIBS:microcontrollers
LIBS:dsp
LIBS:microchip
LIBS:analog_switches
LIBS:motorola
LIBS:texas
LIBS:intel
LIBS:audio
LIBS:interface
LIBS:digital-audio
LIBS:philips
LIBS:display
LIBS:cypress
LIBS:siliconi
LIBS:opto
LIBS:atmel
LIBS:contrib
LIBS:valves
LIBS:Apple2_bus
EELAYER 25 0
EELAYER END
$Descr A4 11693 8268
encoding utf-8
Sheet 1 1
Title ""
Date ""
Rev ""
Comp ""
Comment1 ""
Comment2 ""
Comment3 ""
Comment4 ""
$EndDescr
$Comp
L A2_BUS BUS1
U 1 1 5D5C71DD
P 1225 3475
F 0 "BUS1" H 2125 5525 60 0000 C CNN
F 1 "A2_BUS" H 2625 3175 60 0000 C CNN
F 2 "Apple2_bus:BUS_A2" H 1225 3475 60 0001 C CNN
F 3 "" H 1225 3475 60 0000 C CNN
1 1225 3475
1 0 0 -1
$EndComp
$EndSCHEMATC

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Apple2_bus.dcm Normal file
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EESchema-DOCLIB Version 2.0
#
#End Doc Library

66
Apple2_bus.lib Normal file
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EESchema-LIBRARY Version 2.3
#encoding utf-8
#
# A2_BUS
#
DEF A2_BUS BUS 0 40 Y Y 1 F N
F0 "BUS" 900 2050 60 H V C CNN
F1 "A2_BUS" 1400 -300 60 H V C CNN
F2 "" 0 0 60 H V C CNN
F3 "" 0 0 60 H V C CNN
DRAW
S 800 -3100 1950 1900 0 1 0 N
X ~I/O_SEL 1 2200 -3000 300 L 60 60 1 1 O
X A0 2 2200 -2800 300 L 60 60 1 1 B
X A1 3 2200 -2600 300 L 60 60 1 1 B
X A2 4 2200 -2400 300 L 60 60 1 1 B
X A3 5 2200 -2200 300 L 60 60 1 1 B
X A4 6 2200 -2000 300 L 60 60 1 1 B
X A5 7 2200 -1800 300 L 60 60 1 1 B
X A6 8 2200 -1600 300 L 60 60 1 1 B
X A7 9 2200 -1400 300 L 60 60 1 1 B
X A8 10 2200 -1200 300 L 60 60 1 1 B
X ~STROBE 20 2200 800 300 L 60 60 1 1 O
X ~IRQ 30 600 1000 300 R 60 60 1 1 O
X ø0 40 600 -1000 300 R 60 60 1 1 O
X +12V 50 600 -3000 300 R 60 60 1 1 W
X A9 11 2200 -1000 300 L 60 60 1 1 B
X RDY 21 2200 1000 300 L 60 60 1 1 U
X ~RES 31 600 800 300 R 60 60 1 1 I
X ~DEVSEL 41 600 -1200 300 R 60 60 1 1 O
X A10 12 2200 -800 300 L 60 60 1 1 B
X ~DMA 22 2200 1200 300 L 60 60 1 1 U
X ~INH 32 600 600 300 R 60 60 1 1 B
X D7 42 600 -1400 300 R 60 60 1 1 B
X A11 13 2200 -600 300 L 60 60 1 1 B
X INT_OUT 23 2200 1400 300 L 60 60 1 1 O
X -12V 33 600 400 300 R 60 60 1 1 W
X D6 43 600 -1600 300 R 60 60 1 1 B
X A12 14 2200 -400 300 L 60 60 1 1 B
X DMA_OUT 24 2200 1600 300 L 60 60 1 1 O
X -5V 34 600 200 300 R 60 60 1 1 W
X D5 44 600 -1800 300 R 60 60 1 1 B
X A13 15 2200 -200 300 L 60 60 1 1 B
X +5V 25 2200 1800 300 L 60 60 1 1 w
X n.c. 35 600 0 300 R 60 60 1 1 N N
X D4 45 600 -2000 300 R 60 60 1 1 B
X A14 16 2200 0 300 L 60 60 1 1 B
X GND 26 600 1800 300 R 60 60 1 1 w
X 7M 36 600 -200 300 R 60 60 1 1 O
X D3 46 600 -2200 300 R 60 60 1 1 B
X A15 17 2200 200 300 L 60 60 1 1 O
X DMA_IN 27 600 1600 300 R 60 60 1 1 I
X Q3 37 600 -400 300 R 60 60 1 1 I
X D2 47 600 -2400 300 R 60 60 1 1 B
X R/~W 18 2200 400 300 L 60 60 1 1 O
X INT_IN 28 600 1400 300 R 60 60 1 1 I
X ø1 38 600 -600 300 R 60 60 1 1 I
X D1 48 600 -2600 300 R 60 60 1 1 B
X n.c. 19 2200 600 300 L 60 60 1 1 N N
X ~NMI 29 600 1200 300 R 60 60 1 1 O
X ~M2SEL 39 600 -800 300 R 60 60 1 1 B
X D0 49 600 -2800 300 R 60 60 1 1 B
ENDDRAW
ENDDEF
#
#End Library

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Apple2_bus.pretty/BUS_A2.kicad_mod Normal file
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(module XIS:BUS_A2 (layer F.Cu) (tedit 55C9BE9D)
(descr "Connector Apple ][ Slot")
(tags "CONN BUS APPLE ][")
(fp_text reference REF** (at -22.86 -7.62) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value BUS_A2 (at 0 -7.62) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start 40.64 3.81) (end 39.37 5.08) (layer F.SilkS) (width 0.15))
(fp_line (start 39.37 5.08) (end -24.13 5.08) (layer F.SilkS) (width 0.15))
(fp_line (start -24.13 5.08) (end -25.4 3.81) (layer F.SilkS) (width 0.15))
(fp_line (start -25.4 3.81) (end -25.4 -5.08) (layer F.SilkS) (width 0.15))
(fp_line (start 40.64 -5.08) (end 40.64 3.81) (layer F.SilkS) (width 0.15))
(pad 1 connect rect (at -22.86 0 180) (size 1.778 7.62) (layers F.Cu F.Mask))
(pad 2 connect rect (at -20.32 0 180) (size 1.778 7.62) (layers F.Cu F.Mask))
(pad 3 connect rect (at -17.78 0 180) (size 1.778 7.62) (layers F.Cu F.Mask))
(pad 4 connect rect (at -15.24 0 180) (size 1.778 7.62) (layers F.Cu F.Mask))
(pad 5 connect rect (at -12.7 0 180) (size 1.778 7.62) (layers F.Cu F.Mask))
(pad 6 connect rect (at -10.16 0 180) (size 1.778 7.62) (layers F.Cu F.Mask))
(pad 7 connect rect (at -7.62 0 180) (size 1.778 7.62) (layers F.Cu F.Mask))
(pad 8 connect rect (at -5.08 0 180) (size 1.778 7.62) (layers F.Cu F.Mask))
(pad 9 connect rect (at -2.54 0 180) (size 1.778 7.62) (layers F.Cu F.Mask))
(pad 10 connect rect (at 0 0 180) (size 1.778 7.62) (layers F.Cu F.Mask))
(pad 11 connect rect (at 2.54 0 180) (size 1.778 7.62) (layers F.Cu F.Mask))
(pad 12 connect rect (at 5.08 0 180) (size 1.778 7.62) (layers F.Cu F.Mask))
(pad 13 connect rect (at 7.62 0 180) (size 1.778 7.62) (layers F.Cu F.Mask))
(pad 14 connect rect (at 10.16 0 180) (size 1.778 7.62) (layers F.Cu F.Mask))
(pad 15 connect rect (at 12.7 0 180) (size 1.778 7.62) (layers F.Cu F.Mask))
(pad 16 connect rect (at 15.24 0 180) (size 1.778 7.62) (layers F.Cu F.Mask))
(pad 17 connect rect (at 17.78 0 180) (size 1.778 7.62) (layers F.Cu F.Mask))
(pad 18 connect rect (at 20.32 0 180) (size 1.778 7.62) (layers F.Cu F.Mask))
(pad 19 connect rect (at 22.86 0 180) (size 1.778 7.62) (layers F.Cu F.Mask))
(pad 20 connect rect (at 25.4 0 180) (size 1.778 7.62) (layers F.Cu F.Mask))
(pad 21 connect rect (at 27.94 0 180) (size 1.778 7.62) (layers F.Cu F.Mask))
(pad 22 connect rect (at 30.48 0 180) (size 1.778 7.62) (layers F.Cu F.Mask))
(pad 23 connect rect (at 33.02 0 180) (size 1.778 7.62) (layers F.Cu F.Mask))
(pad 24 connect rect (at 35.56 0 180) (size 1.778 7.62) (layers F.Cu F.Mask))
(pad 25 connect rect (at 38.1 0 180) (size 1.778 7.62) (layers F.Cu F.Mask))
(pad 50 connect rect (at -22.86 0 180) (size 1.778 7.62) (layers B.Cu B.Mask))
(pad 49 connect rect (at -20.32 0 180) (size 1.778 7.62) (layers B.Cu B.Mask))
(pad 48 connect rect (at -17.78 0 180) (size 1.778 7.62) (layers B.Cu B.Mask))
(pad 47 connect rect (at -15.24 0 180) (size 1.778 7.62) (layers B.Cu B.Mask))
(pad 46 connect rect (at -12.7 0 180) (size 1.778 7.62) (layers B.Cu B.Mask))
(pad 45 connect rect (at -10.16 0 180) (size 1.778 7.62) (layers B.Cu B.Mask))
(pad 44 connect rect (at -7.62 0 180) (size 1.778 7.62) (layers B.Cu B.Mask))
(pad 43 connect rect (at -5.08 0 180) (size 1.778 7.62) (layers B.Cu B.Mask))
(pad 42 connect rect (at -2.54 0 180) (size 1.778 7.62) (layers B.Cu B.Mask))
(pad 41 connect rect (at 0 0 180) (size 1.778 7.62) (layers B.Cu B.Mask))
(pad 40 connect rect (at 2.54 0 180) (size 1.778 7.62) (layers B.Cu B.Mask))
(pad 39 connect rect (at 5.08 0 180) (size 1.778 7.62) (layers B.Cu B.Mask))
(pad 38 connect rect (at 7.62 0 180) (size 1.778 7.62) (layers B.Cu B.Mask))
(pad 37 connect rect (at 10.16 0 180) (size 1.778 7.62) (layers B.Cu B.Mask))
(pad 36 connect rect (at 12.7 0 180) (size 1.778 7.62) (layers B.Cu B.Mask))
(pad 35 connect rect (at 15.24 0 180) (size 1.778 7.62) (layers B.Cu B.Mask))
(pad 34 connect rect (at 17.78 0 180) (size 1.778 7.62) (layers B.Cu B.Mask))
(pad 33 connect rect (at 20.32 0 180) (size 1.778 7.62) (layers B.Cu B.Mask))
(pad 32 connect rect (at 22.86 0 180) (size 1.778 7.62) (layers B.Cu B.Mask))
(pad 31 connect rect (at 25.4 0 180) (size 1.778 7.62) (layers B.Cu B.Mask))
(pad 30 connect rect (at 27.94 0 180) (size 1.778 7.62) (layers B.Cu B.Mask))
(pad 29 connect rect (at 30.48 0 180) (size 1.778 7.62) (layers B.Cu B.Mask))
(pad 28 connect rect (at 33.02 0 180) (size 1.778 7.62) (layers B.Cu B.Mask))
(pad 27 connect rect (at 35.56 0 180) (size 1.778 7.62) (layers B.Cu B.Mask))
(pad 26 connect rect (at 38.1 0 180) (size 1.778 7.62) (layers B.Cu B.Mask))
)

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fp-lib-table Normal file
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(fp_lib_table
(lib (name Apple2_bus)(type KiCad)(uri $KIPRJMOD/Apple2_bus.pretty)(options "")(descr ""))
)