AppleIISd/VHDL/AppleIISd.npl
2017-08-31 01:07:34 +02:00

28 lines
611 B
Plaintext

JDF G
// Created by Project Navigator ver 1.0
PROJECT AppleIISd
DESIGN appleiisd
DEVFAM xc9500xl
DEVFAMTIME 0
DEVICE xc9572xl
DEVICETIME 1468568184
DEVPKG PC44
DEVPKGTIME 1475334247
DEVSPEED -10
DEVSPEEDTIME 1469967516
DEVTOPLEVELMODULETYPE HDL
TOPLEVELMODULETYPETIME 0
DEVSYNTHESISTOOL XST (VHDL/Verilog)
SYNTHESISTOOLTIME 0
DEVSIMULATOR Other
SIMULATORTIME 0
DEVGENERATEDSIMULATIONMODEL VHDL
GENERATEDSIMULATIONMODELTIME 0
SOURCE AppleIISd.vhd
SOURCE AddressDecoder.sch
DEPASSOC appleiisd AppleIISd.ucf
[Normal]
p_CPLDFitterminate=xstvhd, 9500xl, VHDL.t_vm6File, 1504132429, Float
[STRATEGY-LIST]
Normal=True