forked from Apple-2-HW/TommyPROM
113 lines
6.3 KiB
Markdown
113 lines
6.3 KiB
Markdown
---
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title: Hardware Design
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description: "TommyPROM Arduino 28C256 programmer hardware design"
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has_children: false
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nav_order: 3
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---
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# Hardware Design
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## Basic Hardware Version
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The hardware uses an Arduino to write data and to toggle control lines with the
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appropriate timing to access the PROM. A pair of 74LS164 serial to parallel shift
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registers latch the address lines. Use of the shift registers allows the Arduino to
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control up to 16 address lines using only 3 output ports. This design will read and
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program the 28C series chips and can read most other parallel ROM chip families.
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The basic circuit is as follows:
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* Pins D2..D9 are wired to the data lines on the target PROM.
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* Pins A0..A2 are wired to the WE, CE, and OE control lines on the target PROM.
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* Pins A3..A5 control shift registers to produce the address lines.
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* Pins D10..D12 control A16..A18 for chips larger than 64K bytes.
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Note that the existing design uses 74LS164 shift registers, but another 8-bit parallel out
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shift register, like the 74LS595, could be used instead with some pin changes.
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When using the 74LS595 instead of the 74LS164, there is an additional output latch that
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needs to be pulsed to put the contents of the shift register on the output lines. The
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code supports this by uncommenting the _#define SHIFT_REGISTER_IS_595_ line in
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Configure.h. The D13 line from the Arduino controls the RCLK latch on the '595. The table
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below shows the connections when using either the 74LS164 or the 74LS595 for the address
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shift registers. USR refers to the Upper Shift Register (A<sub>8</sub>..A<sub>15</sub>)
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and LSR refers to the Lower Shift Register (A<sub>0</sub>..A<sub>7</sub>).
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|Arduino |74LS164 |74LS595|
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|:---: |:---: |:---: |
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|A0 |ROM WE |ROM WE|
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|A1 |ROM CE |ROM CE|
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|A2 |ROM OE |ROM OE|
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|A3 |USR CLK |USR SRCLK|
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|A4 |LSR CLK |LSR SRCLK|
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|A5<sup>1</sup> |LSR+USR A |LSR+USR SER|
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|D2..D9 |ROM D<sub>0</sub>..D<sub>7</sub> |ROM D<sub>0</sub>..D<sub>7</sub> |
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|D10..D12<sup>2</sup> |ROM A<sub>16</sub>..A<sub>18</sub>|ROM A<sub>16</sub>..A<sub>18</sub>|
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|D13<sup>3</sup>|-- |LSR+USR RCLK|
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Notes:
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1. The data pin on A5 is connected to both the Upper Shift Register (USR) and the Lower Shift Register (LSR).
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2. The upper address lines are not needed for 28C64 and 28C256 chips, but are used for
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larger chips like the 27C040.
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3. The D13 pin controls the output register on the '595 shift registers. The code for
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this must be enabled in Configure.h. This pin is not connected when using the 74LS164.
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The two shift registers can produce a sixteen bit address, although the 28C256 only needs
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15 addresses. Chips larger than 64K are supported by using the shift registers for A<sub>0</sub>..A<sub>15</sub>
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and connecting Arduino pins D10..D12 to the chip's A<sub>16</sub>..A<sub>18</sub>
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**NOTE:**
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The schematic does not show the Vcc and ground pins for the 74LS164 shift registers.
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These must be connected to +5 and ground, respectively. It is also good practice to place a decoupling capacitor (0.1uF or 0.01uF is good) on the power rails near the Vcc connections.
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## Ben Eater EEPROM Programmer
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If you are here because you built the [Ben Eater EEPROM
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Programmer](https://github.com/beneater/eeprom-programmer), note that the designs are
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similar, but the TommyPROM code will not run on that hardware without some significant
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changes. If you just need to unlock the Software Data Protection (SDP) on a chip, then
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see the
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[unlock-ben-eater-hardware sketch](https://github.com/TomNisbet/TommyPROM/tree/master/unlock-ben-eater-hardware) for a solution. That sketch is purpose-built to run on the Ben Eater
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hardware directly and it will not work with the TommyPROM hardware.
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If you want the functionality of the TommyPROM software on the Ben Eater hardware, the
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easiest path is probably to modify the hardware to match the TommyPROM software rather
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than trying to change the pin assignments in software. There are a few reasons for this:
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* The Ben Eater hardware uses D13 to control the ROM's Write Enable pin and it ties the
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Chip Enable pin to always be active. The D13 pin is connected to the Arduino's built-in
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LED, which blinks at boot. This means that the chip is likely some writing random data at
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boot time. This isn't a problem for the Ben Eater sketches, because they always write
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their own data to the chip anyway. One use of TommyPROM is to just read data from a chip,
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so a random write on boot would be bad.
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* The OE pin is controlled by the Address shift registers. This doesn't work well with
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the modular architecture of TommyPROM and it definitely would not work with 74LS164s
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because it would toggle the OE pin as new addresses are shifted in.
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* The direct port write software is a bit complicated and is more difficult to change than
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just renaming a few pin #defines. This was done for performance reasons, particularly
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for the SDP timing, but it means that the code is not easy to change.
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Changing the hardware is fairly straightforward. The data lines move 3 pins from D5..D12
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down to D2..D9. Most of the ROM and shift register control lines move over to the A0..A5
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pins. The upper shift register is controlled directly from the Arduino instead of being
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connected to the overflow of the lower shift register. All of the connections are in the
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chart in the section above.
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## Intel 8755A Hardware Version
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The Intel 8755A uses a multiplexed data and address bus, plus 3 additional address lines.
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Most Arduino hardware has enough pins to support this directly, so no additional hardware
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is needed for addressing. An Arduino pin is also used to drive the ALE latch pin.
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The 8755A requires the Vdd pin to be be switched between 5V and 25V during the programming
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of each byte. A simple transistor circuit is used for this. No voltage regulator circuit
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is present here for the programming voltage. Because this is designed as a quickly
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assembled hardware design, a triple output bench supply was used to provide the 25.5V,
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5.5V and 5V outputs.
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Eagle-format schematics can be downloaded from the
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[hardware project page](https://github.com/TomNisbet/TommyPROM/tree/master/hardware).
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