diff --git a/include/optimizer.hpp b/include/optimizer.hpp
index 28d56f2..be2517e 100644
--- a/include/optimizer.hpp
+++ b/include/optimizer.hpp
@@ -177,9 +177,8 @@ bool optimize_redundant_lda(std::span<mos6502> &block, const Personality &person
   // look for a literal or virtual register load into A
   // that is redundant later
   for (auto itr = block.begin(); itr != block.end(); ++itr) {
-    if (itr->opcode == mos6502::OpCode::lda &&
-      (itr->op.value.starts_with('#')
-          || is_virtual_register_op(*itr, personality))) {
+    if (itr->opcode == mos6502::OpCode::lda
+        && (itr->op.value.starts_with('#') || is_virtual_register_op(*itr, personality))) {
       for (auto inner = std::next(itr); inner != block.end(); ++inner) {
         if (is_opcode(*inner,
               mos6502::OpCode::tay,
@@ -257,9 +256,9 @@ bool optimize(std::vector<mos6502> &instructions, [[maybe_unused]] const Persona
   // it might make sense in the future to only insert these if determined they are needed?
   for (size_t op = 10; op < instructions.size(); ++op) {
     if (instructions[op].opcode == mos6502::OpCode::lda || instructions[op].opcode == mos6502::OpCode::bcc
-        || instructions[op].opcode == mos6502::OpCode::bcs) {
-      if (instructions[op - 1].text == "; END remove if next is lda, bcc, bcs"
-          || (instructions[op - 2].text == "; END remove if next is lda, bcc, bcs"
+        || instructions[op].opcode == mos6502::OpCode::bcs || instructions[op].opcode == mos6502::OpCode::ldy) {
+      if (instructions[op - 1].text == "; END remove if next is lda, bcc, bcs, ldy"
+          || (instructions[op - 2].text == "; END remove if next is lda, bcc, bcs, ldy"
               && instructions[op - 1].type == ASMLine::Type::Directive)) {
         for (size_t inner_op = op - 1; inner_op > 1; --inner_op) {
           instructions[inner_op] =
@@ -284,9 +283,9 @@ bool optimize(std::vector<mos6502> &instructions, [[maybe_unused]] const Persona
 
   bool block_optimized = false;
   for (auto &block : get_optimizable_blocks(instructions)) {
-    block_optimized = block_optimized || optimize_redundant_lda_after_sta(block) || optimize_dead_sta(block, personality) || optimize_dead_tax(block)
-        || optimize_redundant_ldy(block) || optimize_redundant_lda(block, personality);
-
+    block_optimized = block_optimized || optimize_redundant_lda_after_sta(block)
+                      || optimize_dead_sta(block, personality) || optimize_dead_tax(block)
+                      || optimize_redundant_ldy(block) || optimize_redundant_lda(block, personality);
   }
   return block_optimized;
 }
diff --git a/src/6502-c++.cpp b/src/6502-c++.cpp
index 3f40fd7..38030c1 100644
--- a/src/6502-c++.cpp
+++ b/src/6502-c++.cpp
@@ -289,7 +289,7 @@ void fixup_16_bit_N_Z_flags(std::vector<mos6502> &instructions)
   // if low order byte is negative, just load 1, this will properly set the Z flag and leave C correct
   instructions.emplace_back(mos6502::OpCode::lda, Operand(Operand::Type::literal, "#1"));
   instructions.emplace_back(ASMLine::Type::Label, set_flag_label);
-  instructions.emplace_back(ASMLine::Type::Directive, "; END remove if next is lda, bcc, bcs");
+  instructions.emplace_back(ASMLine::Type::Directive, "; END remove if next is lda, bcc, bcs, ldy");
 }
 
 void add_16_bit(const Personality &personality, std::vector<mos6502> &instructions, int reg, const std::string_view value)
@@ -1174,21 +1174,6 @@ int main(const int argc, const char **argv)
   disabled_optimizations += " -fvect-cost-model=cheap";
   disabled_optimizations += " -fno-version-loops-for-strides";
   */
-//  disabled_optimizations += " -fgcse-after-reload";
-//  disabled_optimizations += " -fipa-cp-clone";
-//  disabled_optimizations += " -floop-interchange";
-//  disabled_optimizations += " -floop-unroll-and-jam";
-//  disabled_optimizations += " -fpeel-loops";
-//  disabled_optimizations += " -fpredictive-commoning";
-//  disabled_optimizations += " -fsplit-loops";
-//  disabled_optimizations += " -fsplit-paths";
-//  disabled_optimizations += " -ftree-loop-distribution";
-//  disabled_optimizations += " -ftree-loop-vectorize";
-//  disabled_optimizations += " -ftree-partial-pre";
-//  disabled_optimizations += " -ftree-slp-vectorize";
-//  disabled_optimizations += " -funswitch-loops";
-//  disabled_optimizations += " -fvect-cost-model=dynamic";
-//  disabled_optimizations += " -fversion-loops-for-strides";
 
   const std::string gcc_command = fmt::format(
     "avr-gcc -fverbose-asm -c -o {outfile} -S {warning_flags} -std=c++20 -mtiny-stack "