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Try to get carry/zero/N flags set properly for various branch states
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@ -23,8 +23,8 @@ bool optimize(std::vector<mos6502> &instructions)
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// remove unused flag-fix-up blocks
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// it might make sense in the future to only insert these if determined they are needed?
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for (size_t op = 10; op < instructions.size(); ++op) {
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if (instructions[op].opcode == mos6502::OpCode::lda) {
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if (instructions[op - 1].text == "; END remove if next is lda") {
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if (instructions[op].opcode == mos6502::OpCode::lda || instructions[op].opcode == mos6502::OpCode::bcc || instructions[op].opcode == mos6502::OpCode::bcs) {
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if (instructions[op - 1].text == "; END remove if next is lda, bcc, bcs") {
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for (size_t inner_op = op - 1; inner_op > 1; --inner_op) {
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instructions[inner_op] = mos6502(ASMLine::Type::Directive,
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"; removed unused flag fix-up: " + instructions[inner_op].to_string());
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@ -269,7 +269,7 @@ void fixup_16_bit_N_Z_flags(std::vector<mos6502> &instructions)
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// if low order byte is negative, shift right by one bit, then we'll get the proper Z/N flags
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instructions.emplace_back(mos6502::OpCode::lsr);
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instructions.emplace_back(ASMLine::Type::Label, set_flag_label);
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instructions.emplace_back(ASMLine::Type::Directive, "; END remove if next is lda");
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instructions.emplace_back(ASMLine::Type::Directive, "; END remove if next is lda, bcc, bcs");
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}
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void add_16_bit(const Personality &personality, std::vector<mos6502> &instructions, int reg, const std::uint16_t value)
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@ -394,7 +394,8 @@ void translate_instruction(const Personality &personality, std::vector<mos6502>
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instructions.emplace_back(mos6502::OpCode::lda, personality.get_register(o1_reg_num));
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instructions.emplace_back(mos6502::OpCode::sbc, personality.get_register(o2_reg_num));
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instructions.emplace_back(mos6502::OpCode::sta, personality.get_register(o1_reg_num));
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fixup_16_bit_N_Z_flags(instructions);
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instructions.emplace_back(mos6502::OpCode::tax);
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// fixup_16_bit_N_Z_flags(instructions);
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return;
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}
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case AVR::OpCode::sbc: {
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@ -554,7 +555,9 @@ void translate_instruction(const Personality &personality, std::vector<mos6502>
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case AVR::OpCode::cpi: {
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// note that this will leave the C flag in the 6502 borrow state, not normal carry state
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instructions.emplace_back(mos6502::OpCode::lda, personality.get_register(o1_reg_num));
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instructions.emplace_back(mos6502::OpCode::cmp, Operand(o2.type, fixup_8bit_literal(o2.value)));
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instructions.emplace_back(mos6502::OpCode::sec);
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instructions.emplace_back(mos6502::OpCode::sbc, Operand(o2.type, fixup_8bit_literal(o2.value)));
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instructions.emplace_back(mos6502::OpCode::tax);
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return;
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}
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case AVR::OpCode::brlo: {
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@ -606,7 +609,9 @@ void translate_instruction(const Personality &personality, std::vector<mos6502>
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case AVR::OpCode::cp: {
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// note that this will leave the C flag in the 6502 borrow state, not normal carry state
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instructions.emplace_back(mos6502::OpCode::lda, personality.get_register(o1_reg_num));
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instructions.emplace_back(mos6502::OpCode::cmp, personality.get_register(o2_reg_num));
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instructions.emplace_back(mos6502::OpCode::sec);
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instructions.emplace_back(mos6502::OpCode::sbc, personality.get_register(o2_reg_num));
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instructions.emplace_back(mos6502::OpCode::tax);
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return;
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}
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case AVR::OpCode::cpc: {
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@ -617,6 +622,7 @@ void translate_instruction(const Personality &personality, std::vector<mos6502>
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instructions.emplace_back(mos6502::OpCode::lda, personality.get_register(o1_reg_num));
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instructions.emplace_back(mos6502::OpCode::sbc, personality.get_register(o2_reg_num));
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fixup_16_bit_N_Z_flags(instructions);
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return;
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}
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@ -794,6 +800,7 @@ bool fix_long_branches(std::vector<mos6502> &instructions, int &branch_patch_cou
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bool fix_overwritten_flags(std::vector<mos6502> &instructions)
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{
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// return false;
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if (instructions.size() < 3) {
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return false;
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}
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