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https://github.com/lefticus/6502-cpp.git
synced 2024-12-11 20:49:17 +00:00
Better stack handling. We now require -mtiny-stack from GCC
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baf9c092ea
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@ -1 +1 @@
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avr-gcc $1 -Wall -Wextra -c -o- -S -O3 -I ~/avr-libstdcpp/include/ -std=c++20 | tee $1.asm | ./avr-to-6502 | tee $1.asm && xa -O PETSCREEN -M $1.prg
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avr-gcc $1 -Wall -Wextra -mtiny-stack -c -o- -S -O3 -I ~/avr-libstdcpp/include/ -std=c++20 | tee $1.asm | ./avr-to-6502 | tee $1.asm && xa -O PETSCREEN -M $1.prg
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@ -34,6 +34,7 @@ struct mos6502 : ASMLine
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jsr,
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lda,
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ldx,
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ldy,
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lsr,
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@ -51,11 +52,14 @@ struct mos6502 : ASMLine
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sbc,
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sec,
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sta,
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stx,
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sty,
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tax,
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tay,
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tsx,
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txa,
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txs,
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tya,
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};
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@ -82,6 +86,7 @@ struct mos6502 : ASMLine
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case OpCode::jmp:
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case OpCode::jsr:
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case OpCode::lda:
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case OpCode::ldx:
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case OpCode::ldy:
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case OpCode::lsr:
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case OpCode::ORA:
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@ -96,9 +101,12 @@ struct mos6502 : ASMLine
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case OpCode::sec:
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case OpCode::sta:
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case OpCode::sty:
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case OpCode::stx:
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case OpCode::tax:
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case OpCode::tay:
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case OpCode::tsx:
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case OpCode::txa:
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case OpCode::txs:
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case OpCode::tya:
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case OpCode::unknown:
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@ -130,6 +138,7 @@ struct mos6502 : ASMLine
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case OpCode::jmp:
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case OpCode::jsr:
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case OpCode::lda:
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case OpCode::ldx:
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case OpCode::ldy:
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case OpCode::lsr:
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case OpCode::ORA:
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@ -143,10 +152,13 @@ struct mos6502 : ASMLine
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case OpCode::sbc:
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case OpCode::sec:
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case OpCode::sta:
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case OpCode::stx:
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case OpCode::sty:
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case OpCode::tax:
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case OpCode::tay:
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case OpCode::tsx:
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case OpCode::txa:
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case OpCode::txs:
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case OpCode::tya:
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case OpCode::unknown:
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break;
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@ -176,15 +188,19 @@ struct mos6502 : ASMLine
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case OpCode::lda: return "lda";
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case OpCode::asl: return "asl";
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case OpCode::rol: return "rol";
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case OpCode::ldx: return "ldx";
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case OpCode::ldy: return "ldy";
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case OpCode::tay: return "tay";
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case OpCode::tya: return "tya";
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case OpCode::tax: return "tax";
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case OpCode::tsx: return "tsx";
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case OpCode::txa: return "txa";
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case OpCode::txs: return "txs";
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case OpCode::cpy: return "cpy";
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case OpCode::eor: return "eor";
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case OpCode::sta: return "sta";
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case OpCode::sty: return "sty";
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case OpCode::stx: return "stx";
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case OpCode::pha: return "pha";
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case OpCode::pla: return "pla";
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case OpCode::php: return "php";
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@ -103,6 +103,10 @@ bool optimize(std::vector<mos6502> &instructions)
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}
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}
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// todo: fix this ldy redundant move, right now it doesn't
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// take into account if Y has been used
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/*
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for (size_t op = 0; op < instructions.size() - 1; ++op) {
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if (instructions[op].opcode == mos6502::OpCode::ldy && instructions[op].op.type == Operand::Type::literal) {
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auto op2 = op + 1;
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@ -116,7 +120,9 @@ bool optimize(std::vector<mos6502> &instructions)
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++op2;
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}
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}
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}
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}
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*/
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for (size_t op = 0; op < instructions.size() - 1; ++op) {
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if (instructions[op].opcode == mos6502::OpCode::lda
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@ -100,9 +100,6 @@ struct C64 : Personality
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return Operand(Operand::Type::literal, "$5f");
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case 31:
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return Operand(Operand::Type::literal, "$60");
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case 32:
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// 32 is the "Stack Pointer", because I decided so, I mean, it makes sense
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return Operand(Operand::Type::literal, std::string{stack_low_address()});
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}
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throw std::runtime_error("Unhandled register number: " + std::to_string(reg_num));
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}
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@ -116,6 +116,8 @@ struct AVR : ASMLine
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mov,
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out,
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pop,
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push,
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@ -185,6 +187,7 @@ struct AVR : ASMLine
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if (o == "brsh") { return OpCode::brsh; }
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if (o == "breq") { return OpCode::breq; }
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if (o == "in") { return OpCode::in; }
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if (o == "out") { return OpCode::out; }
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}
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}
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throw std::runtime_error(fmt::format("Unknown opcode: {}", o));
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@ -249,7 +252,7 @@ void fixup_16_bit_N_Z_flags(std::vector<mos6502> &instructions)
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{
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// need to get both Z and N set appropriately
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// assuming A contains higher order byte and Y contains lower order byte
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// assuming A contains higher order byte and X contains lower order byte
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instructions.emplace_back(ASMLine::Type::Directive, "; BEGIN remove if next is lda");
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instructions.emplace_back(ASMLine::Type::Directive, "; set CPU flags assuming A holds the higher order byte already");
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std::string set_flag_label = "flags_set_after_16_bit_op_" + std::to_string(instructions.size());
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@ -269,29 +272,29 @@ void fixup_16_bit_N_Z_flags(std::vector<mos6502> &instructions)
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void add_16_bit(const Personality &personality, std::vector<mos6502> &instructions, int reg, const std::uint16_t value)
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{
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//instructions.emplace_back(mos6502::OpCode::sta, Operand(Operand::Type::literal, address_low_byte));
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instructions.emplace_back(mos6502::OpCode::clc);
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instructions.emplace_back(mos6502::OpCode::lda, personality.get_register(reg));
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instructions.emplace_back(mos6502::OpCode::adc, Operand(Operand::Type::literal, "#" + std::to_string((value & 0xFFu))));
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instructions.emplace_back(mos6502::OpCode::sta, personality.get_register(reg));
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instructions.emplace_back(mos6502::OpCode::tax);
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instructions.emplace_back(mos6502::OpCode::lda, personality.get_register(reg + 1));
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instructions.emplace_back(mos6502::OpCode::adc, Operand(Operand::Type::literal, "#" + std::to_string((value >> 8u) & 0xFFu)));
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instructions.emplace_back(mos6502::OpCode::sta, personality.get_register(reg + 1));
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instructions.emplace_back(mos6502::OpCode::tax);
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fixup_16_bit_N_Z_flags(instructions);
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}
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void subtract_16_bit(const Personality &personality, std::vector<mos6502> &instructions, int reg, const std::uint16_t value)
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{
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//instructions.emplace_back(mos6502::OpCode::sta, Operand(Operand::Type::literal, address_low_byte));
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instructions.emplace_back(mos6502::OpCode::sec);
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instructions.emplace_back(mos6502::OpCode::lda, personality.get_register(reg));
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instructions.emplace_back(mos6502::OpCode::sbc, Operand(Operand::Type::literal, "#" + std::to_string((value & 0xFFu))));
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instructions.emplace_back(mos6502::OpCode::sta, personality.get_register(reg));
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instructions.emplace_back(mos6502::OpCode::tax);
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instructions.emplace_back(mos6502::OpCode::lda, personality.get_register(reg + 1));
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instructions.emplace_back(mos6502::OpCode::sbc, Operand(Operand::Type::literal, "#" + std::to_string((value >> 8u) & 0xFFu)));
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instructions.emplace_back(mos6502::OpCode::sta, personality.get_register(reg + 1));
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instructions.emplace_back(mos6502::OpCode::tax);
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fixup_16_bit_N_Z_flags(instructions);
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}
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@ -626,16 +629,30 @@ void translate_instruction(const Personality &personality, std::vector<mos6502>
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return;
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}
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}
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case AVR::OpCode::out: {
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if (o1.value == "__SP_L__") {
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instructions.emplace_back(mos6502::OpCode::ldx, personality.get_register(o2_reg_num));
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instructions.emplace_back(mos6502::OpCode::txs);
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return;
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}
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if (o1.value == "__SP_H__") {
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// officially nothing to do - we cannot change the high byte of the SP on 6502
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return;
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}
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throw std::runtime_error("Could not translate unknown 'out' instruction");
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}
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case AVR::OpCode::in: {
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if (o2.value == "__SP_L__") {
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instructions.emplace_back(mos6502::OpCode::lda, Operand(Operand::Type::literal, std::string{ personality.stack_low_address() }));
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instructions.emplace_back(mos6502::OpCode::sta, personality.get_register(o1_reg_num));
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instructions.emplace_back(mos6502::OpCode::tsx);
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instructions.emplace_back(mos6502::OpCode::stx, personality.get_register(o1_reg_num));
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return;
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}
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if (o2.value == "__SP_H__") {
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instructions.emplace_back(mos6502::OpCode::lda, Operand(Operand::Type::literal, std::string{ personality.stack_high_address() }));
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instructions.emplace_back(mos6502::OpCode::lda, Operand(Operand::Type::literal, "$01"));
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instructions.emplace_back(mos6502::OpCode::sta, personality.get_register(o1_reg_num));
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return;
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}
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