mirror of
https://github.com/lefticus/6502-cpp.git
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Add support for D register, more opcodes
This commit is contained in:
parent
efcb6fa7ac
commit
f69150b386
51
examples/test3.cpp
Normal file
51
examples/test3.cpp
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@ -0,0 +1,51 @@
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#include <cstdint>
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enum class Colors : uint8_t
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{
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WHITE=0x01,
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BLACK=0x00
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};
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volatile uint8_t &memory_loc(const uint16_t loc)
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{
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return *reinterpret_cast<volatile uint8_t *>(loc);
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}
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void decrement_border_color()
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{
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--memory_loc(0xd020);
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}
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void increment_border_color()
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{
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++memory_loc(0xd020);
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}
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bool joystick_down()
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{
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uint8_t joystick_state = memory_loc(0xDC00);
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return (joystick_state & 0x2) == 0;
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}
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int main()
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{
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const auto background_color = [](Colors col) {
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memory_loc(0xd021) = static_cast<uint8_t>(col);
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};
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const auto border_color = [](Colors col) {
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memory_loc(0xd020) = static_cast<uint8_t>(col);
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};
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background_color(Colors::WHITE);
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bool joydown = joystick_down();
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while(true) {
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bool newjoydown = joystick_down();
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if (joydown != newjoydown) {
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increment_border_color();
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joydown = newjoydown;
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}
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}
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}
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222
src/main.cpp
222
src/main.cpp
@ -56,9 +56,11 @@ struct mos6502 : ASMLine
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{
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unknown,
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lda,
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eor,
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sta,
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pha,
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pla,
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lsr,
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AND,
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cmp,
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bne,
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@ -74,9 +76,11 @@ struct mos6502 : ASMLine
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case OpCode::bne:
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return true;
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case OpCode::lda:
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case OpCode::eor:
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case OpCode::sta:
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case OpCode::pha:
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case OpCode::pla:
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case OpCode::lsr:
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case OpCode::AND:
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case OpCode::cmp:
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case OpCode::jmp:
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@ -91,9 +95,11 @@ struct mos6502 : ASMLine
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case OpCode::cmp:
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return true;
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case OpCode::lda:
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case OpCode::eor:
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case OpCode::sta:
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case OpCode::pha:
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case OpCode::pla:
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case OpCode::lsr:
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case OpCode::AND:
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case OpCode::jmp:
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case OpCode::bne:
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@ -124,27 +130,31 @@ struct mos6502 : ASMLine
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{
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switch (o) {
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case OpCode::lda:
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return "\tlda";
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return "lda";
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case OpCode::eor:
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return "eor";
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case OpCode::sta:
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return "\tsta";
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return "sta";
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case OpCode::pha:
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return "\tpha";
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return "pha";
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case OpCode::pla:
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return "\tpla";
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return "pla";
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case OpCode::lsr:
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return "lsr";
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case OpCode::AND:
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return "\tand";
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return "and";
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case OpCode::cmp:
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return "\tcmp";
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return "cmp";
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case OpCode::bne:
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return "\tbne";
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return "bne";
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case OpCode::beq:
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return "\tbeq";
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return "beq";
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case OpCode::jmp:
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return "\tjmp";
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return "jmp";
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case OpCode::adc:
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return "\tadc";
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return "adc";
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case OpCode::sbc:
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return "\tsbc";
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return "sbc";
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case OpCode::unknown:
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return "";
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};
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@ -182,6 +192,8 @@ struct i386 : ASMLine
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andl,
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ret,
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movb,
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cmpb,
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movl,
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jmp,
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jne,
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je,
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@ -207,6 +219,8 @@ struct i386 : ASMLine
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if (o == "andl") return OpCode::andl;
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if (o == "ret") return OpCode::ret;
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if (o == "movb") return OpCode::movb;
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if (o == "cmpb") return OpCode::cmpb;
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if (o == "movl") return OpCode::movl;
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if (o == "jmp") return OpCode::jmp;
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if (o == "testb") return OpCode::testb;
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if (o == "jne") return OpCode::jne;
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@ -221,7 +235,7 @@ struct i386 : ASMLine
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static Operand parse_operand(std::string o)
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{
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if (o.empty()) {
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throw std::runtime_error("Empty operand?!");
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return Operand();
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}
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if (o[0] == '%') {
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@ -229,6 +243,10 @@ struct i386 : ASMLine
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return Operand(Operand::Type::reg, 1);
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} else if (o == "%al") {
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return Operand(Operand::Type::reg, 1);
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} else if (o == "%edx") {
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return Operand(Operand::Type::reg, 4);
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} else if (o == "%dl") {
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return Operand(Operand::Type::reg, 4);
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} else if (o == "%di") {
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return Operand(Operand::Type::reg, 6);
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} else {
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@ -239,23 +257,14 @@ struct i386 : ASMLine
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}
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}
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i386(Type t, std::string o1)
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: ASMLine(t, o1), opcode(parse_opcode(t, o1))
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i386(const int t_line_num, const std::string t_line_text, Type t, std::string opcode, std::string o1="", std::string o2="")
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: ASMLine(t, opcode), line_num(t_line_num), line_text(std::move(t_line_text)),
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opcode(parse_opcode(t, opcode)), operand1(parse_operand(std::move(o1))), operand2(parse_operand(std::move(o2)))
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{
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}
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i386(Type t, std::string opcode, std::string o1)
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: ASMLine(t, opcode), opcode(parse_opcode(t, opcode)), operand1(parse_operand(std::move(o1)))
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{
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}
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i386(Type t, std::string opcode, std::string o1, std::string o2)
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: ASMLine(t, opcode), opcode(parse_opcode(t, opcode)), operand1(parse_operand(std::move(o1))), operand2(parse_operand(std::move(o2)))
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{
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}
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int line_num;
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std::string line_text;
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OpCode opcode;
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Operand operand1;
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Operand operand2;
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@ -273,6 +282,18 @@ void translate_instruction(std::vector<mos6502> &instructions, const i386::OpCod
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instructions.emplace_back(mos6502::OpCode::pla);
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} else if (o1.type == Operand::Type::reg && o1.reg_num == 1 && o2.type == Operand::Type::literal) {
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instructions.emplace_back(mos6502::OpCode::sta, o2);
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} else if (o1.type == Operand::Type::reg && o1.reg_num == 4 && o2.type == Operand::Type::literal) {
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instructions.emplace_back(mos6502::OpCode::pha); // transfer memory through A register, pushing and popping around it
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instructions.emplace_back(mos6502::OpCode::lda, Operand(Operand::Type::literal, "$00"));
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instructions.emplace_back(mos6502::OpCode::sta, o2);
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instructions.emplace_back(mos6502::OpCode::pla); // transfer memory through A register, pushing and popping around it
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} else {
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throw std::runtime_error("Cannot translate instruction");
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}
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break;
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case i386::OpCode::movl:
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if (o1.type == Operand::Type::reg && o1.reg_num == 1 && o2.type == Operand::Type::reg && o2.reg_num == 4) {
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instructions.emplace_back(mos6502::OpCode::sta, Operand(Operand::Type::literal, "$00"));
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} else {
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throw std::runtime_error("Cannot translate instruction");
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}
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@ -280,6 +301,20 @@ void translate_instruction(std::vector<mos6502> &instructions, const i386::OpCod
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case i386::OpCode::movzbl:
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if (o1.type == Operand::Type::literal && o2.type == Operand::Type::reg && o2.reg_num == 1) {
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instructions.emplace_back(mos6502::OpCode::lda, o1);
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} else if (o1.type == Operand::Type::literal && o2.type == Operand::Type::reg && o2.reg_num == 4) {
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instructions.emplace_back(mos6502::OpCode::pha); // transfer memory through A register, pushing and popping around it
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instructions.emplace_back(mos6502::OpCode::lda, o1);
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instructions.emplace_back(mos6502::OpCode::sta, Operand(Operand::Type::literal, "$00"));
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instructions.emplace_back(mos6502::OpCode::pla);
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} else {
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throw std::runtime_error("Cannot translate instruction");
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}
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break;
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case i386::OpCode::shrb:
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if (o1.type == Operand::Type::reg && o1.reg_num == 1) {
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instructions.emplace_back(mos6502::OpCode::lsr, Operand(Operand::Type::literal, "a"));
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} else if (o1.type == Operand::Type::reg && o1.reg_num == 4) {
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instructions.emplace_back(mos6502::OpCode::lsr, Operand(Operand::Type::literal, "$00"));
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} else {
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throw std::runtime_error("Cannot translate instruction");
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}
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@ -301,9 +336,48 @@ void translate_instruction(std::vector<mos6502> &instructions, const i386::OpCod
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case i386::OpCode::jmp:
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instructions.emplace_back(mos6502::OpCode::jmp, o1);
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break;
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case i386::OpCode::xorl:
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if (o1.type == Operand::Type::literal && o2.type == Operand::Type::reg && o2.reg_num == 1) {
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instructions.emplace_back(mos6502::OpCode::eor, Operand(o1.type, "#" + o1.value));
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} else if (o1.type == Operand::Type::literal && o2.type == Operand::Type::reg && o2.reg_num == 4) {
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instructions.emplace_back(mos6502::OpCode::pha); // transfer memory through A register, pushing and popping around it
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instructions.emplace_back(mos6502::OpCode::lda, Operand(Operand::Type::literal, "$00"));
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instructions.emplace_back(mos6502::OpCode::eor, Operand(o1.type, "#" + o1.value));
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instructions.emplace_back(mos6502::OpCode::sta, Operand(Operand::Type::literal, "$00"));
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instructions.emplace_back(mos6502::OpCode::pla);
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} else {
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throw std::runtime_error("Cannot translate instruction");
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}
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break;
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case i386::OpCode::addl:
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if (o1.type == Operand::Type::literal && o2.type == Operand::Type::reg && o2.reg_num == 1) {
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instructions.emplace_back(mos6502::OpCode::adc, Operand(o1.type, "#" + o1.value));
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} else if (o1.type == Operand::Type::literal && o2.type == Operand::Type::reg && o2.reg_num == 4) {
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instructions.emplace_back(mos6502::OpCode::pha); // transfer memory through A register, pushing and popping around it
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instructions.emplace_back(mos6502::OpCode::lda, Operand(Operand::Type::literal, "$00"));
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instructions.emplace_back(mos6502::OpCode::adc, Operand(o1.type, "#" + o1.value));
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instructions.emplace_back(mos6502::OpCode::sta, Operand(Operand::Type::literal, "$00"));
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instructions.emplace_back(mos6502::OpCode::pla);
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} else {
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throw std::runtime_error("Cannot translate instruction");
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}
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break;
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case i386::OpCode::cmpb:
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if (o1.type == Operand::Type::reg && o1.reg_num == 1 && o2.type == Operand::Type::reg && o2.reg_num == 4) {
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instructions.emplace_back(mos6502::OpCode::cmp, Operand(Operand::Type::literal, "$00"));
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} else {
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throw std::runtime_error("Cannot translate instruction");
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}
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break;
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case i386::OpCode::andl:
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if (o1.type == Operand::Type::literal && o2.type == Operand::Type::reg && o2.reg_num == 1) {
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instructions.emplace_back(mos6502::OpCode::AND, Operand(o1.type, "#" + o1.value));
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} else if (o1.type == Operand::Type::literal && o2.type == Operand::Type::reg && o2.reg_num == 4) {
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instructions.emplace_back(mos6502::OpCode::pha); // transfer memory through A register, pushing and popping around it
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instructions.emplace_back(mos6502::OpCode::lda, Operand(o1.type, "#" + o1.value));
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instructions.emplace_back(mos6502::OpCode::AND, Operand(Operand::Type::literal, "$00"));
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instructions.emplace_back(mos6502::OpCode::sta, Operand(Operand::Type::literal, "$00"));
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instructions.emplace_back(mos6502::OpCode::pla); // transfer memory through A register, pushing and popping around it
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} else {
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throw std::runtime_error("Cannot translate instruction");
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}
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@ -322,18 +396,58 @@ void translate_instruction(std::vector<mos6502> &instructions, const i386::OpCod
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}
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enum class LogLevel
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{
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Warning,
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Error
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};
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void log(LogLevel ll, const i386 &i, const std::string &message)
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{
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const auto ll_to_s = [&ll](){
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switch (ll)
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{
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case LogLevel::Warning:
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return "warning";
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case LogLevel::Error:
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return "error";
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}
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}();
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std::cerr << i.line_num << ": " << ll_to_s << ": " << message << ": `" << i.line_text << "`\n";
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}
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void log(LogLevel ll, const int line_no, const std::string &line, const std::string &message)
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{
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const auto ll_to_s = [&ll](){
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switch (ll)
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{
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case LogLevel::Warning:
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return "warning";
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case LogLevel::Error:
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return "error";
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}
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}();
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std::cerr << line_no << ": " << ll_to_s << ": " << message << ": `" << line << "`\n";
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}
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void to_mos6502(const i386 &i, std::vector<mos6502> &instructions)
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{
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switch(i.type)
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{
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case ASMLine::Type::Label:
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instructions.emplace_back(i.type, i.text);
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return;
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case ASMLine::Type::Directive:
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throw std::runtime_error("Directives not understood during translation");
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case ASMLine::Type::Instruction:
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translate_instruction(instructions, i.opcode, i.operand1, i.operand2);
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return;
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try {
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switch(i.type)
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{
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case ASMLine::Type::Label:
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instructions.emplace_back(i.type, i.text);
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return;
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case ASMLine::Type::Directive:
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throw std::runtime_error("Directives not understood during translation");
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case ASMLine::Type::Instruction:
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translate_instruction(instructions, i.opcode, i.operand1, i.operand2);
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return;
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}
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} catch (const std::exception &e) {
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log(LogLevel::Error, i, e.what());
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}
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}
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@ -390,22 +504,26 @@ int main()
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std::string line;
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getline(std::cin, line);
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std::smatch match;
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if (std::regex_match(line, match, Label))
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{
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instructions.emplace_back(ASMLine::Type::Label, match[1]);
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} else if (std::regex_match(line, match, Directive)) {
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instructions.emplace_back(ASMLine::Type::Directive, match[1]);
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} else if (std::regex_match(line, match, UnaryInstruction)) {
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instructions.emplace_back(ASMLine::Type::Instruction, match[1], match[2]);
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} else if (std::regex_match(line, match, BinaryInstruction)) {
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instructions.emplace_back(ASMLine::Type::Instruction, match[1], match[2], match[3]);
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} else if (std::regex_match(line, match, Instruction)) {
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instructions.emplace_back(ASMLine::Type::Instruction, match[1]);
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} else if (line == "") {
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//std::cout << "EmptyLine\n";
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} else {
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throw std::runtime_error("Unparsed Input, Line: " + std::to_string(lineno));
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try {
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std::smatch match;
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if (std::regex_match(line, match, Label))
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{
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instructions.emplace_back(lineno, line, ASMLine::Type::Label, match[1]);
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} else if (std::regex_match(line, match, Directive)) {
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instructions.emplace_back(lineno, line, ASMLine::Type::Directive, match[1]);
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} else if (std::regex_match(line, match, UnaryInstruction)) {
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instructions.emplace_back(lineno, line, ASMLine::Type::Instruction, match[1], match[2]);
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} else if (std::regex_match(line, match, BinaryInstruction)) {
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instructions.emplace_back(lineno, line, ASMLine::Type::Instruction, match[1], match[2], match[3]);
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} else if (std::regex_match(line, match, Instruction)) {
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instructions.emplace_back(lineno, line, ASMLine::Type::Instruction, match[1]);
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} else if (line == "") {
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//std::cout << "EmptyLine\n";
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} else {
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throw std::runtime_error("Unparsed Input, Line: " + std::to_string(lineno));
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}
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} catch (const std::exception &e) {
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log(LogLevel::Error, lineno, line, e.what());
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}
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++lineno;
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