mirror of https://github.com/lefticus/6502-cpp.git
675 lines
20 KiB
C++
675 lines
20 KiB
C++
#include <iostream>
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#include <vector>
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#include <set>
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#include <string>
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#include <regex>
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#include <cassert>
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#include <map>
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#include <cctype>
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struct ASMLine
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{
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enum class Type
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{
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Label,
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Instruction,
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Directive
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};
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ASMLine(Type t, std::string te) : type(t), text(std::move(te)) {}
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Type type;
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std::string text;
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};
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struct Operand
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{
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enum class Type
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{
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empty,
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literal,
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reg /*ister*/
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};
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Type type = Type::empty;
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int reg_num = 0;
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std::string value;
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Operand() = default;
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Operand(const Type t, std::string v)
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: type(t), value(std::move(v))
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{
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assert(type == Type::literal);
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}
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Operand(const Type t, const int num)
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: type(t), reg_num(num)
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{
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assert(type == Type::reg);
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}
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};
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struct mos6502 : ASMLine
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{
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enum class OpCode
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{
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unknown,
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lda,
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ldy,
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eor,
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sta,
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sty,
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pha,
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pla,
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lsr,
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AND,
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cmp,
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bne,
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beq,
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jmp,
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adc,
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sbc,
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rts
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};
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static bool get_is_branch(const OpCode o) {
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switch (o) {
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case OpCode::beq:
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case OpCode::bne:
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return true;
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case OpCode::lda:
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case OpCode::ldy:
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case OpCode::eor:
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case OpCode::sta:
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case OpCode::sty:
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case OpCode::pha:
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case OpCode::pla:
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case OpCode::lsr:
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case OpCode::AND:
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case OpCode::cmp:
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case OpCode::jmp:
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case OpCode::adc:
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case OpCode::sbc:
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case OpCode::rts:
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case OpCode::unknown:
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break;
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}
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return false;
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}
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static bool get_is_comparison(const OpCode o) {
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switch (o) {
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case OpCode::cmp:
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return true;
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case OpCode::lda:
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case OpCode::ldy:
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case OpCode::eor:
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case OpCode::sta:
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case OpCode::sty:
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case OpCode::pha:
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case OpCode::pla:
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case OpCode::lsr:
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case OpCode::AND:
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case OpCode::jmp:
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case OpCode::bne:
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case OpCode::beq:
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case OpCode::adc:
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case OpCode::sbc:
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case OpCode::rts:
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case OpCode::unknown:
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break;
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}
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return false;
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}
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explicit mos6502(const OpCode o)
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: ASMLine(Type::Instruction, to_string(o)), opcode(o), is_branch(get_is_branch(o)), is_comparison(get_is_comparison(o))
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{
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}
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mos6502(const Type t, std::string s)
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: ASMLine(t, std::move(s))
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{
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}
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mos6502(const OpCode o, Operand t_o)
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: ASMLine(Type::Instruction, to_string(o)), opcode(o), op(std::move(t_o)), is_branch(get_is_branch(o)), is_comparison(get_is_comparison(o))
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{
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}
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static std::string to_string(const OpCode o)
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{
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switch (o) {
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case OpCode::lda:
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return "lda";
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case OpCode::ldy:
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return "ldy";
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case OpCode::eor:
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return "eor";
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case OpCode::sta:
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return "sta";
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case OpCode::sty:
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return "sty";
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case OpCode::pha:
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return "pha";
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case OpCode::pla:
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return "pla";
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case OpCode::lsr:
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return "lsr";
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case OpCode::AND:
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return "and";
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case OpCode::cmp:
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return "cmp";
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case OpCode::bne:
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return "bne";
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case OpCode::beq:
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return "beq";
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case OpCode::jmp:
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return "jmp";
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case OpCode::adc:
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return "adc";
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case OpCode::sbc:
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return "sbc";
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case OpCode::rts:
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return "rts";
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case OpCode::unknown:
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return "";
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};
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return "";
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}
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std::string to_string() const
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{
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switch (type) {
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case ASMLine::Type::Label:
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return text + ':';
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case ASMLine::Type::Directive:
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case ASMLine::Type::Instruction:
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return '\t' + text + ' ' + op.value;
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};
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throw std::runtime_error("Unable to render: " + text);
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}
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OpCode opcode = OpCode::unknown;
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Operand op;
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bool is_branch = false;
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bool is_comparison = false;
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};
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struct i386 : ASMLine
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{
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enum class OpCode
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{
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unknown,
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movzbl,
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movzwl,
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shrb,
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xorl,
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andl,
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ret,
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movb,
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cmpb,
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movl,
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jmp,
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jne,
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je,
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testb,
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addl,
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subl
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};
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static OpCode parse_opcode(Type t, const std::string &o)
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{
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switch(t)
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{
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case Type::Label:
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return OpCode::unknown;
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case Type::Directive:
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return OpCode::unknown;
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case Type::Instruction:
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{
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if (o == "movzwl") return OpCode::movzwl;
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if (o == "movzbl") return OpCode::movzbl;
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if (o == "shrb") return OpCode::shrb;
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if (o == "xorl") return OpCode::xorl;
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if (o == "andl") return OpCode::andl;
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if (o == "ret") return OpCode::ret;
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if (o == "movb") return OpCode::movb;
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if (o == "cmpb") return OpCode::cmpb;
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if (o == "movl") return OpCode::movl;
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if (o == "jmp") return OpCode::jmp;
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if (o == "testb") return OpCode::testb;
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if (o == "jne") return OpCode::jne;
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if (o == "je") return OpCode::je;
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if (o == "subl") return OpCode::subl;
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if (o == "addl") return OpCode::addl;
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}
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}
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throw std::runtime_error("Unknown opcode: " + o);
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}
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static Operand parse_operand(std::string o)
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{
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if (o.empty()) {
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return Operand();
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}
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if (o[0] == '%') {
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if (o == "%eax") {
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return Operand(Operand::Type::reg, 1);
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} else if (o == "%al") {
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return Operand(Operand::Type::reg, 1);
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} else if (o == "%edx") {
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return Operand(Operand::Type::reg, 4);
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} else if (o == "%dl") {
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return Operand(Operand::Type::reg, 4);
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} else if (o == "%di") {
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return Operand(Operand::Type::reg, 6);
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} else {
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throw std::runtime_error("Unknown register operand: '" + o + "'");
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}
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} else {
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return Operand(Operand::Type::literal, o);
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}
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}
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i386(const int t_line_num, std::string t_line_text, Type t, std::string t_opcode, std::string o1="", std::string o2="")
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: ASMLine(t, t_opcode), line_num(t_line_num), line_text(std::move(t_line_text)),
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opcode(parse_opcode(t, t_opcode)), operand1(parse_operand(std::move(o1))), operand2(parse_operand(std::move(o2)))
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{
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}
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int line_num;
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std::string line_text;
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OpCode opcode;
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Operand operand1;
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Operand operand2;
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};
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void translate_instruction(std::vector<mos6502> &instructions, const i386::OpCode op, const Operand &o1, const Operand &o2)
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{
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switch(op)
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{
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case i386::OpCode::ret:
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instructions.emplace_back(mos6502::OpCode::rts);
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break;
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case i386::OpCode::movb:
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if (o1.type == Operand::Type::literal && o2.type == Operand::Type::literal) {
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instructions.emplace_back(mos6502::OpCode::ldy, Operand(o1.type, "#" + o1.value));
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instructions.emplace_back(mos6502::OpCode::sty, o2);
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} else if (o1.type == Operand::Type::reg && o1.reg_num == 1 && o2.type == Operand::Type::literal) {
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instructions.emplace_back(mos6502::OpCode::sta, o2);
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} else if (o1.type == Operand::Type::reg && o1.reg_num == 4 && o2.type == Operand::Type::literal) {
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instructions.emplace_back(mos6502::OpCode::ldy, Operand(Operand::Type::literal, "$00"));
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instructions.emplace_back(mos6502::OpCode::sty, o2);
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} else {
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throw std::runtime_error("Cannot translate instruction");
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}
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break;
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case i386::OpCode::movl:
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if (o1.type == Operand::Type::reg && o1.reg_num == 1 && o2.type == Operand::Type::reg && o2.reg_num == 4) {
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instructions.emplace_back(mos6502::OpCode::sta, Operand(Operand::Type::literal, "$00"));
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} else {
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throw std::runtime_error("Cannot translate instruction");
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}
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break;
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case i386::OpCode::movzbl:
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if (o1.type == Operand::Type::literal && o2.type == Operand::Type::reg && o2.reg_num == 1) {
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instructions.emplace_back(mos6502::OpCode::lda, o1);
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} else if (o1.type == Operand::Type::literal && o2.type == Operand::Type::reg && o2.reg_num == 4) {
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instructions.emplace_back(mos6502::OpCode::ldy, o1);
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instructions.emplace_back(mos6502::OpCode::sty, Operand(Operand::Type::literal, "$00"));
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} else {
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throw std::runtime_error("Cannot translate instruction");
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}
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break;
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case i386::OpCode::shrb:
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if (o1.type == Operand::Type::reg && o1.reg_num == 1) {
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instructions.emplace_back(mos6502::OpCode::lsr, Operand(Operand::Type::literal, "a"));
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} else if (o1.type == Operand::Type::reg && o1.reg_num == 4) {
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instructions.emplace_back(mos6502::OpCode::lsr, Operand(Operand::Type::literal, "$00"));
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} else {
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throw std::runtime_error("Cannot translate instruction");
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}
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break;
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case i386::OpCode::testb:
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if (o1.type == Operand::Type::literal && o2.type == Operand::Type::reg && o2.reg_num == 1) {
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instructions.emplace_back(mos6502::OpCode::AND, Operand(o1.type, "#" + o1.value));
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instructions.emplace_back(mos6502::OpCode::cmp, Operand(Operand::Type::literal, "#$0"));
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} else {
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throw std::runtime_error("Cannot translate instruction");
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}
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break;
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case i386::OpCode::jne:
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instructions.emplace_back(mos6502::OpCode::bne, o1);
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break;
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case i386::OpCode::je:
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instructions.emplace_back(mos6502::OpCode::beq, o1);
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break;
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case i386::OpCode::jmp:
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instructions.emplace_back(mos6502::OpCode::jmp, o1);
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break;
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case i386::OpCode::xorl:
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if (o1.type == Operand::Type::literal && o2.type == Operand::Type::reg && o2.reg_num == 1) {
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instructions.emplace_back(mos6502::OpCode::eor, Operand(o1.type, "#" + o1.value));
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} else if (o1.type == Operand::Type::reg && o2.reg_num == 1 && o2.type == Operand::Type::reg && o2.reg_num == 1) {
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// cheater shortcut on x86 to 0 out a register
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instructions.emplace_back(mos6502::OpCode::lda, Operand(Operand::Type::literal, "$00"));
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} else if (o1.type == Operand::Type::literal && o2.type == Operand::Type::reg && o2.reg_num == 4) {
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instructions.emplace_back(mos6502::OpCode::pha); // transfer memory through A register, pushing and popping around it
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instructions.emplace_back(mos6502::OpCode::lda, Operand(Operand::Type::literal, "$00"));
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instructions.emplace_back(mos6502::OpCode::eor, Operand(o1.type, "#" + o1.value));
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instructions.emplace_back(mos6502::OpCode::sta, Operand(Operand::Type::literal, "$00"));
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instructions.emplace_back(mos6502::OpCode::pla);
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} else {
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throw std::runtime_error("Cannot translate instruction");
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}
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break;
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case i386::OpCode::addl:
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if (o1.type == Operand::Type::literal && o2.type == Operand::Type::reg && o2.reg_num == 1) {
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instructions.emplace_back(mos6502::OpCode::adc, Operand(o1.type, "#" + o1.value));
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} else if (o1.type == Operand::Type::literal && o2.type == Operand::Type::reg && o2.reg_num == 4) {
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instructions.emplace_back(mos6502::OpCode::pha); // transfer memory through A register, pushing and popping around it
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instructions.emplace_back(mos6502::OpCode::lda, Operand(Operand::Type::literal, "$00"));
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instructions.emplace_back(mos6502::OpCode::adc, Operand(o1.type, "#" + o1.value));
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instructions.emplace_back(mos6502::OpCode::sta, Operand(Operand::Type::literal, "$00"));
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instructions.emplace_back(mos6502::OpCode::pla);
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} else {
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throw std::runtime_error("Cannot translate instruction");
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}
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break;
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case i386::OpCode::cmpb:
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if (o1.type == Operand::Type::reg && o1.reg_num == 1 && o2.type == Operand::Type::reg && o2.reg_num == 4) {
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instructions.emplace_back(mos6502::OpCode::cmp, Operand(Operand::Type::literal, "$00"));
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} else {
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throw std::runtime_error("Cannot translate instruction");
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}
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break;
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case i386::OpCode::andl:
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if (o1.type == Operand::Type::literal && o2.type == Operand::Type::reg && o2.reg_num == 1) {
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instructions.emplace_back(mos6502::OpCode::AND, Operand(o1.type, "#" + o1.value));
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} else if (o1.type == Operand::Type::literal && o2.type == Operand::Type::reg && o2.reg_num == 4) {
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instructions.emplace_back(mos6502::OpCode::pha); // transfer memory through A register, pushing and popping around it
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instructions.emplace_back(mos6502::OpCode::lda, Operand(o1.type, "#" + o1.value));
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instructions.emplace_back(mos6502::OpCode::AND, Operand(Operand::Type::literal, "$00"));
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instructions.emplace_back(mos6502::OpCode::sta, Operand(Operand::Type::literal, "$00"));
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instructions.emplace_back(mos6502::OpCode::pla); // transfer memory through A register, pushing and popping around it
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} else {
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throw std::runtime_error("Cannot translate instruction");
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}
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break;
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case i386::OpCode::subl:
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if (o1.type == Operand::Type::literal && o2.type == Operand::Type::reg && o2.reg_num == 1) {
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instructions.emplace_back(mos6502::OpCode::sbc, Operand(o1.type, "#" + o1.value));
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} else {
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throw std::runtime_error("Cannot translate instruction");
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}
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break;
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default:
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throw std::runtime_error("Cannot translate instruction");
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};
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}
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enum class LogLevel
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{
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Warning,
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Error
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};
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std::string to_string(const LogLevel ll)
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{
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switch (ll)
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{
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case LogLevel::Warning:
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return "warning";
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case LogLevel::Error:
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return "error";
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}
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return "unknown";
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}
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void log(LogLevel ll, const i386 &i, const std::string &message)
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{
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std::cerr << i.line_num << ": " << to_string(ll) << ": " << message << ": `" << i.line_text << "`\n";
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}
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void log(LogLevel ll, const int line_no, const std::string &line, const std::string &message)
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{
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std::cerr << line_no << ": " << to_string(ll) << ": " << message << ": `" << line << "`\n";
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}
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void to_mos6502(const i386 &i, std::vector<mos6502> &instructions)
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{
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try {
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switch(i.type)
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{
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case ASMLine::Type::Label:
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instructions.emplace_back(i.type, i.text);
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return;
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case ASMLine::Type::Directive:
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throw std::runtime_error("Directives not understood during translation");
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case ASMLine::Type::Instruction:
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translate_instruction(instructions, i.opcode, i.operand1, i.operand2);
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return;
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}
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} catch (const std::exception &e) {
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log(LogLevel::Error, i, e.what());
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}
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}
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bool optimize(std::vector<mos6502> &instructions)
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{
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if (instructions.size() < 2) {
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return false;
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}
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for (size_t op = 0; op < instructions.size() - 1; ++op)
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{
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if (instructions[op].opcode == mos6502::OpCode::pla
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&& instructions[op+1].opcode == mos6502::OpCode::pha)
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{
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instructions.erase(std::next(std::begin(instructions), op), std::next(std::begin(instructions), op+2));
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return true;
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}
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}
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return false;
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}
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bool fix_overwritten_flags(std::vector<mos6502> &instructions)
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|
{
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if (instructions.size() < 3) {
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return false;
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}
|
|
|
|
for (size_t op = 0; op < instructions.size() - 2; ++op)
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{
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if (instructions[op].is_comparison
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&& !instructions[op + 1].is_comparison
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&& !instructions[op + 1].is_branch
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&& instructions[op + 2].is_branch) {
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const auto opcode_to_duplicate = op + 1;
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const auto new_pos_1 = op + 3;
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const auto new_pos_2 = [&instructions, branch = instructions[op + 2].op.value](){
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for (size_t cur_op = 0; cur_op < instructions.size(); ++cur_op) {
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if (instructions[cur_op].type == ASMLine::Type::Label
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&& instructions[cur_op].text == branch) {
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return cur_op + 1;
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}
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}
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throw std::runtime_error("Unable to find matching branch!");
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}();
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|
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instructions.insert(std::next(std::begin(instructions), std::max(new_pos_1, new_pos_2)), instructions[opcode_to_duplicate]);
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instructions.insert(std::next(std::begin(instructions), std::min(new_pos_1, new_pos_2)), instructions[opcode_to_duplicate]);
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instructions.erase(std::next(std::begin(instructions), opcode_to_duplicate));
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|
|
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return true;
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|
}
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|
}
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|
|
|
return false;
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|
}
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|
|
|
|
|
int main()
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|
{
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|
std::regex Label(R"(^(\S+):)");
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|
std::regex Directive(R"(^\t(\..+))");
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|
std::regex UnaryInstruction(R"(^\t(\S+)\s+(\S+))");
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|
std::regex BinaryInstruction(R"(^\t(\S+)\s+(\S+),\s+(\S+))");
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|
std::regex Instruction(R"(^\t(\S+))");
|
|
|
|
int lineno = 0;
|
|
|
|
std::vector<i386> instructions;
|
|
|
|
while (std::cin.good())
|
|
{
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|
std::string line;
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|
getline(std::cin, line);
|
|
|
|
try {
|
|
std::smatch match;
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|
if (std::regex_match(line, match, Label))
|
|
{
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|
instructions.emplace_back(lineno, line, ASMLine::Type::Label, match[1]);
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|
} else if (std::regex_match(line, match, Directive)) {
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|
instructions.emplace_back(lineno, line, ASMLine::Type::Directive, match[1]);
|
|
} else if (std::regex_match(line, match, UnaryInstruction)) {
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|
instructions.emplace_back(lineno, line, ASMLine::Type::Instruction, match[1], match[2]);
|
|
} else if (std::regex_match(line, match, BinaryInstruction)) {
|
|
instructions.emplace_back(lineno, line, ASMLine::Type::Instruction, match[1], match[2], match[3]);
|
|
} else if (std::regex_match(line, match, Instruction)) {
|
|
instructions.emplace_back(lineno, line, ASMLine::Type::Instruction, match[1]);
|
|
} else if (line == "") {
|
|
//std::cout << "EmptyLine\n";
|
|
} else {
|
|
throw std::runtime_error("Unparsed Input, Line: " + std::to_string(lineno));
|
|
}
|
|
} catch (const std::exception &e) {
|
|
log(LogLevel::Error, lineno, line, e.what());
|
|
}
|
|
|
|
++lineno;
|
|
}
|
|
|
|
std::set<std::string> labels;
|
|
|
|
for (const auto i : instructions)
|
|
{
|
|
if (i.type == ASMLine::Type::Label) {
|
|
labels.insert(i.text);
|
|
}
|
|
}
|
|
|
|
std::set<std::string> used_labels{"main"};
|
|
|
|
for (const auto i : instructions)
|
|
{
|
|
if (i.type == ASMLine::Type::Instruction)
|
|
{
|
|
if (labels.count(i.operand1.value) != 0) {
|
|
used_labels.insert(i.operand1.value);
|
|
}
|
|
if (labels.count(i.operand2.value) != 0) {
|
|
used_labels.insert(i.operand2.value);
|
|
}
|
|
}
|
|
}
|
|
|
|
// remove all labels and directives that we don't need
|
|
instructions.erase(
|
|
std::remove_if(std::begin(instructions), std::end(instructions),
|
|
[&used_labels](const auto &i){
|
|
if (i.type == ASMLine::Type::Directive) return true;
|
|
if (i.type == ASMLine::Type::Label) {
|
|
if (used_labels.count(i.text) == 0) {
|
|
// remove all unused labels that aren't 'main'
|
|
return true;
|
|
}
|
|
}
|
|
return false;
|
|
}
|
|
),
|
|
std::end(instructions)
|
|
);
|
|
|
|
|
|
// remove everything up to the first label
|
|
// this will probably leave some dead code around at some point
|
|
// but it's a start
|
|
instructions.erase(
|
|
std::begin(instructions),
|
|
std::find_if(std::begin(instructions),
|
|
std::end(instructions),
|
|
[](const auto &i){ return i.type == ASMLine::Type::Label; }
|
|
)
|
|
);
|
|
|
|
const auto new_labels =
|
|
[&used_labels](){
|
|
std::map<std::string, std::string> result;
|
|
for (const auto &l : used_labels) {
|
|
auto newl = l;
|
|
std::transform(newl.begin(), newl.end(), newl.begin(), [](const auto c) { return std::tolower(c); });
|
|
newl.erase(std::remove_if(newl.begin(), newl.end(), [](const auto c){ return !std::isalnum(c); }), std::end(newl));
|
|
std::cout << "Old label: '" << l << "' new label: '" << newl << "'\n";
|
|
result.emplace(std::make_pair(l, newl));
|
|
}
|
|
return result;
|
|
}();
|
|
|
|
for (auto &i : instructions)
|
|
{
|
|
if (i.type == ASMLine::Type::Label)
|
|
{
|
|
std::cout << "Updating label " << i.text << '\n';;
|
|
i.text = new_labels.at(i.text);
|
|
}
|
|
|
|
const auto itr1 = new_labels.find(i.operand1.value);
|
|
if (itr1 != new_labels.end()) {
|
|
i.operand1.value = itr1->second;
|
|
}
|
|
|
|
const auto itr2 = new_labels.find(i.operand2.value);
|
|
if (itr2 != new_labels.end()) {
|
|
i.operand1.value = itr2->second;
|
|
}
|
|
}
|
|
|
|
std::vector<mos6502> new_instructions;
|
|
|
|
for (const auto &i : instructions)
|
|
{
|
|
to_mos6502(i, new_instructions);
|
|
}
|
|
|
|
while (fix_overwritten_flags(new_instructions))
|
|
{
|
|
// do it however many times it takes
|
|
}
|
|
|
|
while (optimize(new_instructions))
|
|
{
|
|
// do it however many times it takes
|
|
}
|
|
|
|
|
|
for (const auto i : new_instructions)
|
|
{
|
|
std::cout << i.to_string() << '\n';
|
|
}
|
|
|
|
}
|