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specify that resources are byte length
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@ -9,7 +9,7 @@ trait Load[A]:
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Asm1Instructions(List(instruction))
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Asm1Instructions(List(instruction))
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// from register
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// from register
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def from[B <: Address: ReadAddress]: Asm2Instructions[A, B] =
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def from[B <: Address: ReadByteAddress]: Asm2Instructions[A, B] =
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Asm2Instructions(List(instruction))
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Asm2Instructions(List(instruction))
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object Load:
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object Load:
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@ -9,12 +9,21 @@ class ZeroPageAddress(val n: Int, val alias: String) extends Address
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class AbsoluteAddress(val n: Int, val alias: String) extends Address
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class AbsoluteAddress(val n: Int, val alias: String) extends Address
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sealed trait ReadAddress[A] extends Address
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sealed trait ReadByteAddress[A] extends Address
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sealed trait WriteAddress[A] extends Address
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sealed trait WriteByteAddress[A] extends Address
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trait Volatile[A] extends ReadAddress[A]
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/**
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* To be extended by the address companion object, to signify that this is a volatile resource of length byte
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*/
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trait VolatileByte[A] extends ReadByteAddress[A]
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trait ReadWriteAddress[A] extends ReadAddress[A] with WriteAddress[A]
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/**
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* To be extended by the address companion object, to signify that this is a read/write resource of length byte
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*/
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trait ReadWriteByteAddress[A] extends ReadByteAddress[A] with WriteByteAddress[A]
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trait WriteOnlyAddress[A] extends WriteAddress[A]
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/**
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* To be extended by the address companion object, to signify that this is a write-only resource of length byte
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*/
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trait WriteOnlyByteAddress[A] extends WriteByteAddress[A]
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@ -1,14 +1,14 @@
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package com.htmlism.scratchpad
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package com.htmlism.scratchpad
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package object syntax:
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package object syntax:
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implicit class WriteRegisterOps[Addr](reg: WriteAddress[Addr]):
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implicit class WriteRegisterOps[Addr](reg: WriteByteAddress[Addr]):
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def writeConst[A: Loadable](x: A): syntax.PartiallyAppliedWrite[A, Addr] =
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def writeConst[A: Loadable](x: A): syntax.PartiallyAppliedWrite[A, Addr] =
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new syntax.PartiallyAppliedWrite(reg, x)
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new syntax.PartiallyAppliedWrite(reg, x)
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def writeFrom[R: Store]: Asm2[R, Addr] =
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def writeFrom[R: Store]: Asm2[R, Addr] =
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StoreTo[R, Addr]()
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StoreTo[R, Addr]()
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class PartiallyAppliedWrite[Addr: Loadable, A](reg: WriteAddress[A], x: Addr):
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class PartiallyAppliedWrite[Addr: Loadable, A](reg: WriteByteAddress[A], x: Addr):
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def apply[R: Load: Store: Register]: String =
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def apply[R: Load: Store: Register]: String =
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val literal =
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val literal =
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summon[Loadable[Addr]].show(x)
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summon[Loadable[Addr]].show(x)
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@ -5,7 +5,7 @@ import org.scalatest.matchers.should._
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import com.htmlism.scratchpad.syntax._
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import com.htmlism.scratchpad.syntax._
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object ExampleRegister extends ZeroPageAddress(0x01, "example") with WriteOnlyAddress[ExampleRegister]
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object ExampleRegister extends ZeroPageAddress(0x01, "example") with WriteOnlyByteAddress[ExampleRegister]
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class ExampleRegister
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class ExampleRegister
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