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start asm2 conversion

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This commit is contained in:
Mark Canlas 2022-10-04 14:55:25 -04:00
parent 80bdbddc24
commit 9e81295fe1
2 changed files with 16 additions and 6 deletions
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12
scratchpad/src/main/scala/com/htmlism/scratchpad/syntax/package.scala
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@ -2,9 +2,19 @@ package com.htmlism.scratchpad
package object syntax: package object syntax:
implicit class WriteRegisterOps[Addr](reg: WriteAddress[Addr]): implicit class WriteRegisterOps[Addr](reg: WriteAddress[Addr]):
def write[A: Loadable](x: A): syntax.PartiallyAppliedWrite[A, Addr] = def writeConst[A: Loadable](x: A): syntax.PartiallyAppliedWrite[A, Addr] =
new syntax.PartiallyAppliedWrite(reg, x) new syntax.PartiallyAppliedWrite(reg, x)
def writeFrom[R: Store]: Asm2[R, Addr] =
val storeInstruction =
Store[R].to
val storeStr =
s"$storeInstruction ${reg.n.toString}"
// TODO encoding now already makes the structures lose semantic meaning
Asm2(List(s"$storeInstruction ${reg.n.toString}"))
class PartiallyAppliedWrite[Addr: Loadable, A](reg: WriteAddress[A], x: Addr): class PartiallyAppliedWrite[Addr: Loadable, A](reg: WriteAddress[A], x: Addr):
def apply[R: Load: Store: Register]: String = def apply[R: Load: Store: Register]: String =
val literal = val literal =

10
scratchpad/src/test/scala/com/htmlism/scratchpad/FeatureSpec.scala
View File

@ -12,23 +12,23 @@ class ExampleRegister
class FeatureSpec extends AnyFunSuite with Matchers: class FeatureSpec extends AnyFunSuite with Matchers:
test("zero page address as write only supports writing") { test("zero page address as write only supports writing") {
ExampleRegister ExampleRegister
.write(2)[A] shouldBe "LDA 2 STA 1 ; example = 2, via A" .writeConst(2)[A] shouldBe "LDA 2 STA 1 ; example = 2, via A"
} }
test("zero page address as read/write supports writing") { test("zero page address as read/write supports writing") {
ExampleRegister ExampleRegister
.write(2)[A] shouldBe "LDA 2 STA 1 ; example = 2, via A" .writeConst(2)[A] shouldBe "LDA 2 STA 1 ; example = 2, via A"
} }
test("writing to an address can use A, X, and Y registers for bouncing") { test("writing to an address can use A, X, and Y registers for bouncing") {
ExampleRegister ExampleRegister
.write(2)[A] shouldBe "LDA 2 STA 1 ; example = 2, via A" .writeConst(2)[A] shouldBe "LDA 2 STA 1 ; example = 2, via A"
ExampleRegister ExampleRegister
.write(2)[X] shouldBe "LDX 2 STX 1 ; example = 2, via X" .writeConst(2)[X] shouldBe "LDX 2 STX 1 ; example = 2, via X"
ExampleRegister ExampleRegister
.write(2)[Y] shouldBe "LDY 2 STY 1 ; example = 2, via Y" .writeConst(2)[Y] shouldBe "LDY 2 STY 1 ; example = 2, via Y"
} }
ignore("the write payload is a typesafe enum") {} ignore("the write payload is a typesafe enum") {}