6502/6502-opcodes
1
0
Fork 0
mirror of https://github.com/mcanlas/6502-opcodes.git synced 2025-01-21 17:32:13 +00:00
Code Issues Projects Releases Wiki Activity

do it

Browse Source
This commit is contained in:
Mark Canlas 2020-08-13 00:42:21 -04:00
parent 7216023708
commit f221eacd42
1 changed files with 14 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

14
src/main/scala/com/htmlism/mos6502/dsl/DslDemo.scala
View File

@ -35,6 +35,13 @@ object DslDemo extends App {
A.add(0xc4)
}
// first color example
withAssemblyContext { implicit ctx =>
cpu.A = Color.White : Color
cpu.A = Color.Green : Color
cpu.A = Color.Orange : Color
}
def withAssemblyContext(f: AssemblyContext => Unit): Unit = {
val ctx: AssemblyContext =
new AssemblyContext
@ -92,6 +99,13 @@ class CPU {
ctx.pushAsm(f"LDA #$$$n%h")
}
def A_=[A : EnumAsByte](x: A)(implicit ctx: AssemblyContext): Unit = {
val n = implicitly[EnumAsByte[A]].toByte(x)
ctx.describe(s"set a to value $n")
ctx.pushAsm(f"LDA #$$$n%h")
}
def A_=(reg: registers.DestinationA)(implicit ctx: AssemblyContext): Unit =
ctx.describe(s"set a to register $reg")