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3 Commits

Author SHA1 Message Date
Mark Canlas 96c544e4d5 move assert to return 2024-04-11 09:52:20 -04:00
Mark Canlas 42a3df32a4 assert individualy 2024-04-11 09:52:20 -04:00
Mark Canlas f6fb9546c7 mark unit explicitly 2024-04-11 09:52:20 -04:00
6 changed files with 10 additions and 13 deletions

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@ -27,5 +27,4 @@ lazy val demo =
.withResolver("rufio")
lazy val playground =
module("playground")
.withCats
module("playground").withCats

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@ -18,13 +18,15 @@ class FeatureSpec extends AnyFunSuite with Matchers:
ExampleRegister
.writeConst(2)[Reg.A] shouldBe "LDA 2 STA 1 ; example = 2, via A"
test("writing to an address can use A, X, and Y registers for bouncing"):
test("writing to an address can use A registers for bouncing"):
ExampleRegister
.writeConst(2)[Reg.A] shouldBe "LDA 2 STA 1 ; example = 2, via A"
test("writing to an address can use X registers for bouncing"):
ExampleRegister
.writeConst(2)[Reg.X] shouldBe "LDX 2 STX 1 ; example = 2, via X"
test("writing to an address can use Y registers for bouncing"):
ExampleRegister
.writeConst(2)[Reg.Y] shouldBe "LDY 2 STY 1 ; example = 2, via Y"

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@ -14,7 +14,7 @@ trait AsmDocSyntax:
ctx
.push(asmCtx.toFragment)
def group[A](s: String)(f: DefinitionGroupContext => A)(using ctx: AsmDocumentContext): Unit =
def group(s: String)(f: DefinitionGroupContext => Unit)(using ctx: AsmDocumentContext): Unit =
val g: DefinitionGroupContext =
new DefinitionGroupContext

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@ -11,11 +11,6 @@ trait DefinitionGroupSyntax:
definition
def constant(name: String, x: Int)(using ctx: DefinitionGroupContext): Definition[Int] =
val definition =
Definition(name, x)
def constant(name: String, x: Int)(using ctx: DefinitionGroupContext): Unit =
ctx
.push(Definition(name, x))
definition

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@ -10,7 +10,8 @@ class DslSpec extends AnyFlatSpec with should.Matchers:
val doc =
asmDoc { implicit ctx =>
group("constants test") { implicit g =>
(constant("margin", 16), constant("secret", 42))
constant("margin", 16)
constant("secret", 42)
}
}

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@ -20,6 +20,8 @@ class Easy6502Spec extends AnyFlatSpec with should.Matchers:
scr.write(2, Color.Orange)
}
doc.printOut()
doc.triplets shouldEqual List(
("LDA", "#white".some, "write White to screen (0)".some),
("STA", "$0200".some, "".some),
@ -29,8 +31,6 @@ class Easy6502Spec extends AnyFlatSpec with should.Matchers:
("STA", "$0202".some, "".some)
)
doc.printOut()
"define style dsl" should "compile" in:
val doc =
asmDoc { implicit ctx =>