added Ibuffs $xx00 fix
added a fix when the input buffer starts at the beginning of a page added a pre-patched versiion
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@ -17,6 +17,10 @@ is very limited. In a 2MHz system more than 100 interrupts per second or
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interrupts requiring less than 10ms service time should be handled in machine
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language. The numbers are worse if the interrupt handler gets more complex.
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Of course, a hybrid solution is always possible. You could service the interrupt
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in machine language and flag an interrupt to basic only after a buffer is
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filled/emptied or a count is reached.
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2. String handling when the string is in the input buffer.
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@ -128,3 +132,46 @@ LAB_HEXS
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JSR LAB_A2HX ; convert A to ASCII hex byte and output
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; *** disable decimal mode patch - comment next line ***
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; CLD ; back to binary
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5. Ibuffs located at $xx00
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If the input buffer is located at the beginning of a page then any direct
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statement (RUN, LIST, ...) is read from Ibuffs-$100 resulting in unexpected
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behavior of EhBASIC.
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A patch is available from Daryl Rictor. I took the freedom to add conditional
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assembly.
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LAB_142A
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INY ; increment pointer
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INY ; increment pointer (makes it next line pointer high byte)
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STA Ibuffs,Y ; save [EOL] (marks [EOT] in immediate mode)
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INY ; adjust for line copy
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INY ; adjust for line copy
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INY ; adjust for line copy
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; *** begin patch for when Ibuffs is $xx00 - Daryl Rictor ***
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; *** insert
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.IF Ibuffs&$FF==0
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LDA Bpntrl ; test for $00
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BNE LAB_142P ; not $00
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DEC Bpntrh ; allow for increment when $xx00
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LAB_142P
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.ENDIF
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; *** end patch for when Ibuffs is $xx00 - Daryl Rictor ***
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; end of patch
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DEC Bpntrl ; allow for increment
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RTS
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The conditional in the patch abover requires Ibuffs to be known at path 1 during
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assembly. The standard definition of Ibuffs does not satisfy this requirement.
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We need to replace it like below:
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; Ibuffs can now be anywhere in RAM, ensure that the max length is < $80,
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; the input buffer must not cross a page boundary and must not overlap with
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; program RAM pages!
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;Ibuffs = IRQ_vec+$14
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Ibuffs = VEC_SV+$16
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; start of input buffer after IRQ/NMI code
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Ibuffe = Ibuffs+$47; end of input buffer
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File diff suppressed because it is too large
Load Diff
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@ -0,0 +1,133 @@
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; minimal monitor for EhBASIC and 6502 simulator V1.05
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; tabs converted to space, tabwidth=6
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; To run EhBASIC on the simulator load and assemble [F7] this file, start the simulator
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; running [F6] then start the code with the RESET [CTRL][SHIFT]R. Just selecting RUN
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; will do nothing, you'll still have to do a reset to run the code.
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.include "basic.asm"
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; put the IRQ and MNI code in RAM so that it can be changed
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IRQ_vec = VEC_SV+2 ; IRQ code vector
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NMI_vec = IRQ_vec+$0A ; NMI code vector
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; setup for the 6502 simulator environment
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IO_AREA = $F000 ; set I/O area for this monitor
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ACIAsimwr = IO_AREA+$01 ; simulated ACIA write port
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ACIAsimrd = IO_AREA+$04 ; simulated ACIA read port
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; now the code. all this does is set up the vectors and interrupt code
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; and wait for the user to select [C]old or [W]arm start. nothing else
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; fits in less than 128 bytes
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*= $FF80 ; pretend this is in a 1/8K ROM
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; reset vector points here
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RES_vec
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CLD ; clear decimal mode
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LDX #$FF ; empty stack
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TXS ; set the stack
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; set up vectors and interrupt code, copy them to page 2
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LDY #END_CODE-LAB_vec ; set index/count
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LAB_stlp
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LDA LAB_vec-1,Y ; get byte from interrupt code
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STA VEC_IN-1,Y ; save to RAM
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DEY ; decrement index/count
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BNE LAB_stlp ; loop if more to do
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; now do the signon message, Y = $00 here
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LAB_signon
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LDA LAB_mess,Y ; get byte from sign on message
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BEQ LAB_nokey ; exit loop if done
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JSR V_OUTP ; output character
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INY ; increment index
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BNE LAB_signon ; loop, branch always
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LAB_nokey
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JSR V_INPT ; call scan input device
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BCC LAB_nokey ; loop if no key
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AND #$DF ; mask xx0x xxxx, ensure upper case
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CMP #'W' ; compare with [W]arm start
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BEQ LAB_dowarm ; branch if [W]arm start
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CMP #'C' ; compare with [C]old start
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BNE RES_vec ; loop if not [C]old start
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JMP LAB_COLD ; do EhBASIC cold start
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LAB_dowarm
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JMP LAB_WARM ; do EhBASIC warm start
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; byte out to simulated ACIA
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ACIAout
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STA ACIAsimwr ; save byte to simulated ACIA
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RTS
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; byte in from simulated ACIA
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ACIAin
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LDA ACIAsimrd ; get byte from simulated ACIA
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BEQ LAB_nobyw ; branch if no byte waiting
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SEC ; flag byte received
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RTS
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LAB_nobyw
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CLC ; flag no byte received
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no_load ; empty load vector for EhBASIC
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no_save ; empty save vector for EhBASIC
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RTS
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; vector tables
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LAB_vec
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.word ACIAin ; byte in from simulated ACIA
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.word ACIAout ; byte out to simulated ACIA
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.word no_load ; null load vector for EhBASIC
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.word no_save ; null save vector for EhBASIC
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; EhBASIC IRQ support
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IRQ_CODE
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PHA ; save A
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LDA IrqBase ; get the IRQ flag byte
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LSR ; shift the set b7 to b6, and on down ...
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ORA IrqBase ; OR the original back in
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STA IrqBase ; save the new IRQ flag byte
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PLA ; restore A
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RTI
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; EhBASIC NMI support
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NMI_CODE
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PHA ; save A
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LDA NmiBase ; get the NMI flag byte
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LSR ; shift the set b7 to b6, and on down ...
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ORA NmiBase ; OR the original back in
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STA NmiBase ; save the new NMI flag byte
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PLA ; restore A
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RTI
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END_CODE
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LAB_mess
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.byte $0D,$0A,"6502 EhBASIC [C]old/[W]arm ?",$00
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; sign on string
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; system vectors
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*= $FFFA
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.word NMI_vec ; NMI vector
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.word RES_vec ; RESET vector
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.word IRQ_vec ; IRQ vector
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