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6502bench/SourceGen/SGTestData/Expected/1002-embedded-instructions_cc65.S

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ArmAsm
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.setcpu "65816"
; .segment "SEG000"
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.org $1000
.a8
.i8
clc
xce
sep #$30
jsr L1014
jsr L101C
jsr L102A
jsr L102F
jsr L1059
rts
L1014: lda #$00
.byte $2c
@L1017: lda #$01
beq @L1017
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rts
L101C: sep #$30
lda $00
beq @L1025
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lda #$00
brk
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@L1025: sta $012345
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rts
L102A: .byte $20
@L102B: rts
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.byte $ea
bra @L102B
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L102F: .byte $2c
@L1030: .byte $2c
@L1031: .byte $2c
@L1032: .byte $2c
@L1033: .byte $2c
@L1034: .byte $2c
@L1035: .byte $2c
@L1036: .byte $2c
@L1037: .byte $2c
@L1038: nop
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nop
asl A
bcc L102F
asl A
bcc @L1030
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asl A
bcc @L1031
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asl A
bcc @L1032
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asl A
bcc @L1033
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asl A
bcc @L1034
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asl A
bcc @L1035
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asl A
bcc @L1036
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asl A
bcc @L1037
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asl A
bcc @L1038
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rts
L1059: .byte $2c
@L105A: nop
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.byte $ad
@L105C: lda $00
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asl A
bcc @L105A
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asl A
bcc @L105C
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.byte $af