2018-09-27 22:13:25 +00:00
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2020-01-27 22:01:43 +00:00
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<title>6502bench Tools</title>
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2018-09-27 22:13:25 +00:00
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2018-10-09 16:44:27 +00:00
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<div id="content">
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2018-09-30 22:12:28 +00:00
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<h1>6502bench SourceGen</h1>
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2018-09-27 22:13:25 +00:00
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2018-09-30 22:12:28 +00:00
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<p>6502bench is a code development "workbench" for the 65xx family
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of processors, including the 6502, 65C02, and 65802/65816. It currently
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features one tool, the SourceGen disassembler.</p>
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2018-09-30 22:16:37 +00:00
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<p>Quick links:</p>
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<ul>
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<li>Watch a (somewhat dated) 9-minute video of
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<a href="https://youtu.be/dalISyBPQq8">basic product features</a></li>
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<li>See an 8-minute
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<a href="https://youtu.be/lSvEr5nCHbY">demonstration of visualizers</a>
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in a disassembly of the Apple II game <i>Space Eggs</i></li>
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<li>Download source & binaries for the latest version
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<a href="https://github.com/fadden/6502bench/releases/">from the Releases page</a></li>
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<li>Check out the
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<a href="https://github.com/fadden/6502bench/">GitHub project</a></li>
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<li>See some completed
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<a href="https://6502disassembly.com/">disassembly projects</a></li>
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</ul>
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<hr/>
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<p><strong>SourceGen</strong> is an industrial-strength disassembler for 6502,
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65C02, and 65816 programs. It runs on Windows 7 or later. Key features include:</p>
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<ul>
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<li>Fully interactive point-and-click GUI. Define labels, set addresses,
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add comments, and see the results immediately. Add multi-line comments
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and have them word-wrapped automatically. Create inline visualizations of
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embedded graphics and animated sequences.</li>
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<li>The disassembly engine traces code execution, automatically finding all
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instructions reachable from a given starting point. Changes to the
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processor status flags are tracked, allowing identification of branches
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that are always/never taken, accurate cycle count listings, and correct
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analysis of 65816 code with variable-width registers.</li>
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<li>Easy generation of assembly source code in popular formats (currently
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64tass, ACME, cc65, and Merlin 32). Cross-assemblers can be invoked from the GUI to
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verify correctness.</li>
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<li>Symbols and constants are provided for ROM and operating system entry
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points on several popular systems.</li>
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<li>Project files are designed for sharing and collaboration.</li>
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</ul>
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<p>
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<a href="images/screenshot-mainwin.png"><img border="2" src="images/screenshot-mainwin-small.png" alt="Main Window Screenshot" width="320" height="180"/></a>
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<a href="images/screenshot-asmwin.png"><img border="2" src="images/screenshot-asmwin-small.png" alt="Gen/Asm Dialog Screenshot" width="320" height="180"/></a>
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</p>
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<p>Additional features:</p>
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<ul>
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<li>Analyzer:
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<ul>
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<li>Support for 6502, 65C02, and 65816, including undocumented
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opcodes.</li>
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<li>Hinting mechanism allows manual identification of code, data, and
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inline data.</li>
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<li>Editable labels are generated for every branch destination and data
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target.</li>
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<li>Automatic detection and classification of character strings and runs
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of identical bytes.</li>
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<li>Symbol files for ROM entry points, operating system constants, and
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other platform-specific data are stored in plain text files loaded at runtime.</li>
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<li>Extension scripts can be defined that automatically reformat code and
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identify inline data that follows a JSR, JSL, or BRK.</li>
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</ul></li>
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<li>User interface:
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<ul>
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<li>"Infinite" undo/redo of all operations.</li>
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<li>Cross-reference tables are generated for every branch and data target
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address, as well as for external platform symbols.</li>
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<li>Instruction operand formats (hex, decimal, binary, character, symbol) can
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be set for individual instructions. References to nearby symbols are
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offset, allowing simple expressions like "addr + 1".</li>
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<li>Data areas can be formatted in various formats, including individual
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bytes, 16-bit and 24-bit words, addresses, or strings.
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Multiple character encodings are supported, including ASCII, high ASCII,
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C64 PETSCII, and C64 screen codes.</li>
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<li>Zero-page variables can be given different labels at different points
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in the program.</li>
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<li>Multi-line comments can be "boxed" for an authentic retro feel.</li>
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<li>Notes can be added that aren't included in generated output. These
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also function as color-coded bookmarks. Very useful for marking up a
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work in progress. Similarly, symbols can be marked as uncertain by
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adding a '?' that is automatically stripped away during code generation.</li>
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<li>Instruction summaries, including CPU cycles and flags modified, are
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shown along with a description of the opcode's function.</li>
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<li>Various aspects of the code display can be reconfigured, including
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upper/lower case, pseudo-opcode naming, and expression formats. These
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choices are not part of the project definition, so everyone can view a
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project according to their own personal preferences.</li>
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</ul></li>
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<li>Code generation:
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<ul>
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<li>Labels can be global or local. Use non-unique labels like "@Loop"
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for clarity. Labels will be promoted from local to global or renamed to
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be unique as required by each assembler.</li>
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<li>Symbols may be exported from one project and imported into another
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to facilitate multi-binary disassembly.</li>
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<li>Listings can be generated in HTML form for publication on the web. Many
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aspects of the output format can be configured.</li>
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</ul></li>
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<li>Miscellaneous:
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<ul>
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<li>All data files are stored in text formats (primarily JSON).</li>
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<li>The project file includes nothing from the data file but a CRC. This
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may allow the project to be shared without violating copyrights (subject
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to local laws).</li>
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<li>Handy tools: file slicer, file concatenator, CPU instruction reference
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chart, ASCII chart, file hex dump.</li>
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</ul></li>
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</ul>
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2019-09-27 21:08:59 +00:00
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<p>SourceGen is written in C# .NET, using the (free to download) Visual
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Studio Community 2017 IDE as the primary development environment.
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The user interface uses the WPF API.
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The full source code for the project is available on GitHub, licensed under Apache 2.0.</p>
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</div>
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2018-10-09 16:44:27 +00:00
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<div id="footer">
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<hr/>
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<p>Copyright 2020 faddenSoft</p>
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