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6502bench/SourceGen/SGTestData/Expected/2014-label-dp_cc65.S

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Work around cc65 single-pass behavior The cc65 assembler runs in a single pass, which means forward address references default to 16 bits. For zero-page references we have to add an explicit width disambiguator. (This is an unusual situation that only occurs if you have a zero-page .ORG in the file after code that references it.) With this change, 2014-label-dp passes, and no other regression tests were affected. (issue #40)
2018-11-02 22:32:54 +00:00
;6502bench SourceGen v1.1.0-dev1
.setcpu "65816"
Attempt to generate segment names for cc65 This worked, sort of. The problem is that SourceGen will revert to hex output in certain situations, such as a broken symbolic reference. There happens to be one in the ZIPPY example, and it's on a relative branch. The goal with the segment stuff is to allow cc65 to treat the source as relocatable code. In that context, a relative branch to an absolute address doesn't make any sense, so the assembler reports a range error. We don't currently have a mechanism that guarantees no references are broken (and no affordance for finding them), so we can't make this mode the default yet. Instead, we continue to use the generic config, but generate the correct set of lines as comments. (issue #39)
2018-11-18 22:36:03 +00:00
; .segment "SEG000"
Work around cc65 single-pass behavior The cc65 assembler runs in a single pass, which means forward address references default to 16 bits. For zero-page references we have to add an explicit width disambiguator. (This is an unusual situation that only occurs if you have a zero-page .ORG in the file after code that references it.) With this change, 2014-label-dp passes, and no other regression tests were affected. (issue #40)
2018-11-02 22:32:54 +00:00
.org $1000
.a8
.i8
sec
xce
jsr L101F
jsr L10AB
jsr L10F2
jsr L1106
jsr L1109
jsr L112C
jsr L11F9
jsr L11FC
nop
nop
nop
Treat BRK as a 1-byte instruction The 65816 definition makes it a two-byte instruction, like COP. On the 6502 it acted like a two-byte instruction, but in practice very few assemblers treat it that way. Very few humans, for that matter. So it's now treated as a single byte instruction, with the following byte encoded as a data value.
2019-08-03 00:21:50 +00:00
brk
.byte $80
Work around cc65 single-pass behavior The cc65 assembler runs in a single pass, which means forward address references default to 16 bits. For zero-page references we have to add an explicit width disambiguator. (This is an unusual situation that only occurs if you have a zero-page .ORG in the file after code that references it.) With this change, 2014-label-dp passes, and no other regression tests were affected. (issue #40)
2018-11-02 22:32:54 +00:00
L101F: ora (L0080,x)
cop $80
ora $80,S
tsb z:L0080
ora z:L0080
asl z:L0080
ora [L0080]
php
ora #$80
asl A
phd
tsb a:L0086
ora a:L0086
asl a:L0086
ora f:L0089
bpl L1041
L1041: ora (L0080),y
ora (L0080)
ora ($80,S),y
trb z:L0080
ora z:L0080,x
asl z:L0080,x
ora [L0080],y
clc
ora L0086,y
inc A
tcs
trb a:L0086
ora a:L0086,x
asl a:L0086,x
ora f:L0089,x
jsr L0086
and (L0080,x)
jsl L0089
and $80,S
bit z:L0080
and z:L0080
rol z:L0080
and [L0080]
plp
and #$80
rol A
pld
bit a:L0086
and a:L0086
rol a:L0086
and f:L0089
bmi L1089
L1089: and (L0080),y
and (L0080)
and ($80,S),y
bit z:L0080,x
and z:L0080,x
rol z:L0080,x
and [L0080],y
sec
and L0086,y
dec A
tsc
bit a:L0086,x
and a:L0086,x
rol a:L0086,x
and f:L0089,x
rti
L10AB: eor (L0080,x)
Update for cc65 v2.18 WDM <arg> now works. MVN/MVP are still broken. Correct code is generated for whichever version of the assembler is configured. Regression tests updated for new version. Also, fixed a UI bug where manual edits to the assembler path were being ignored.
2019-08-04 20:38:25 +00:00
wdm $80
Work around cc65 single-pass behavior The cc65 assembler runs in a single pass, which means forward address references default to 16 bits. For zero-page references we have to add an explicit width disambiguator. (This is an unusual situation that only occurs if you have a zero-page .ORG in the file after code that references it.) With this change, 2014-label-dp passes, and no other regression tests were affected. (issue #40)
2018-11-02 22:32:54 +00:00
eor $80,S
Reverse position on '#' in block move operands During a discussion with the cc65 developers, I became convinced that generating "MVN $01,$02" is wrong, and "MVN #$01,#$02" is correct. 64tass, cc65, and Merlin 32 all accept this syntax; only ACME does not. Operands without a leading '#' should be treated as 24-bit values, and have the bank byte extracted. This change updates the on-screen display and assembled output to include the '#'. The ACME generator uses a Quirk to suppress the hash mark. (It doesn't currently accept values larger than 8 bits, so there's no ambiguity.)
2019-08-08 20:02:01 +00:00
mvp #$84,#$83
Work around cc65 single-pass behavior The cc65 assembler runs in a single pass, which means forward address references default to 16 bits. For zero-page references we have to add an explicit width disambiguator. (This is an unusual situation that only occurs if you have a zero-page .ORG in the file after code that references it.) With this change, 2014-label-dp passes, and no other regression tests were affected. (issue #40)
2018-11-02 22:32:54 +00:00
eor z:L0080
lsr z:L0080
eor [L0080]
pha
eor #$80
lsr A
phk
jmp L10C2
L10C2: eor a:L0086
lsr a:L0086
eor f:L0089
bvc L10CE
L10CE: eor (L0080),y
eor (L0080)
eor ($80,S),y
Reverse position on '#' in block move operands During a discussion with the cc65 developers, I became convinced that generating "MVN $01,$02" is wrong, and "MVN #$01,#$02" is correct. 64tass, cc65, and Merlin 32 all accept this syntax; only ACME does not. Operands without a leading '#' should be treated as 24-bit values, and have the bank byte extracted. This change updates the on-screen display and assembled output to include the '#'. The ACME generator uses a Quirk to suppress the hash mark. (It doesn't currently accept values larger than 8 bits, so there's no ambiguity.)
2019-08-08 20:02:01 +00:00
mvn #$84,#$83
Work around cc65 single-pass behavior The cc65 assembler runs in a single pass, which means forward address references default to 16 bits. For zero-page references we have to add an explicit width disambiguator. (This is an unusual situation that only occurs if you have a zero-page .ORG in the file after code that references it.) With this change, 2014-label-dp passes, and no other regression tests were affected. (issue #40)
2018-11-02 22:32:54 +00:00
eor z:L0080,x
lsr z:L0080,x
eor [L0080],y
cli
eor L0086,y
phy
tcd
jml L10E7
L10E7: eor a:L0086,x
lsr a:L0086,x
eor f:L0089,x
rts
L10F2: adc (L0080,x)
per $0ff6
adc $80,S
stz z:L0080
adc z:L0080
ror z:L0080
adc [L0080]
pla
adc #$80
ror A
rtl
L1106: jmp (L0086)
L1109: adc a:L0086
ror a:L0086
adc f:L0089
bvs L1115
L1115: adc (L0080),y
adc (L0080)
adc ($80,S),y
stz z:L0080,x
adc z:L0080,x
ror z:L0080,x
adc [L0080],y
sei
adc L0086,y
ply
tdc
jmp (L0086,x)
L112C: adc a:L0086,x
ror a:L0086,x
adc f:L0089,x
bra L1138
L1138: sta (L0080,x)
brl L113D
L113D: sta $80,S
sty z:L0080
sta z:L0080
stx z:L0080
sta [L0080]
dey
bit #$80
txa
phb
sty a:L0086
sta a:L0086
stx a:L0086
sta f:L0089
bcc L115B
L115B: sta (L0080),y
sta (L0080)
sta ($80,S),y
sty z:L0080,x
sta z:L0080,x
stx z:L0080,y
sta [L0080],y
tya
sta L0086,y
txs
txy
stz a:L0086
sta a:L0086,x
stz a:L0086,x
sta f:L0089,x
ldy #$80
lda (L0080,x)
ldx #$80
lda $80,S
ldy z:L0080
lda z:L0080
ldx z:L0080
lda [L0080]
tay
lda #$80
tax
plb
ldy a:L0086
lda a:L0086
ldx a:L0086
lda f:L0089
bcs L11A0
L11A0: lda (L0080),y
lda (L0080)
lda ($80,S),y
ldy z:L0080,x
lda z:L0080,x
ldx z:L0080,y
lda [L0080],y
clv
lda L0086,y
tsx
tyx
ldy a:L0086,x
lda a:L0086,x
ldx a:L0086,y
lda f:L0089,x
cpy #$80
cmp (L0080,x)
rep #$00
cmp $80,S
cpy z:L0080
cmp z:L0080
dec z:L0080
cmp [L0080]
iny
cmp #$80
dex
wai
cpy a:L0086
cmp a:L0086
dec a:L0086
cmp f:L0089
bne L11E5
L11E5: cmp (L0080),y
cmp (L0080)
cmp ($80,S),y
pei (L0080)
cmp z:L0080,x
dec z:L0080,x
cmp [L0080],y
cld
cmp L0086,y
phx
stp
L11F9: jml [L0086]
L11FC: cmp a:L0086,x
dec a:L0086,x
cmp f:L0089,x
cpx #$80
sbc (L0080,x)
sep #$00
sbc $80,S
cpx z:L0080
sbc z:L0080
inc z:L0080
sbc [L0080]
inx
sbc #$80
nop
xba
cpx a:L0086
sbc a:L0086
inc a:L0086
sbc f:L0089
beq L122A
L122A: sbc (L0080),y
sbc (L0080)
sbc ($80,S),y
pea L0086
sbc z:L0080,x
inc z:L0080,x
sbc [L0080],y
sed
sbc L0086,y
plx
xce
jsr (L0086,x)
sbc a:L0086,x
inc a:L0086,x
sbc f:L0089,x
Attempt to generate segment names for cc65 This worked, sort of. The problem is that SourceGen will revert to hex output in certain situations, such as a broken symbolic reference. There happens to be one in the ZIPPY example, and it's on a relative branch. The goal with the segment stuff is to allow cc65 to treat the source as relocatable code. In that context, a relative branch to an absolute address doesn't make any sense, so the assembler reports a range error. We don't currently have a mechanism that guarantees no references are broken (and no affordance for finding them), so we can't make this mode the default yet. Instead, we continue to use the generic config, but generate the correct set of lines as comments. (issue #39)
2018-11-18 22:36:03 +00:00
; .segment "SEG001"
Work around cc65 single-pass behavior The cc65 assembler runs in a single pass, which means forward address references default to 16 bits. For zero-page references we have to add an explicit width disambiguator. (This is an unusual situation that only occurs if you have a zero-page .ORG in the file after code that references it.) With this change, 2014-label-dp passes, and no other regression tests were affected. (issue #40)
2018-11-02 22:32:54 +00:00
.org $0080
L0080: bit z:L0082
Expand set of things that work with double-click on opcode If you double-click on the opcode of "JSR label", the code view selection jumps to the label. This now works for partial operands, e.g. "LDA #<label". Some changes to the find-label-offset code affected the cc65 "is it a forward reference to a direct-page label" logic. The regression test now correctly identifies an instruction that refers to itself as not being a forward reference.
2018-11-03 22:03:25 +00:00
L0082: bit L0082
Work around cc65 single-pass behavior The cc65 assembler runs in a single pass, which means forward address references default to 16 bits. For zero-page references we have to add an explicit width disambiguator. (This is an unusual situation that only occurs if you have a zero-page .ORG in the file after code that references it.) With this change, 2014-label-dp passes, and no other regression tests were affected. (issue #40)
2018-11-02 22:32:54 +00:00
bit L0082
L0086: bit a:L0086
L0089: lda f:L0089
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