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6502bench/SourceGen/RuntimeData/Apple/E0Cxxx-IO.sym65

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Add Cxxx I/O locations in bank $e0 for Apple IIgs On an Apple IIgs, the memory-mapped I/O locations are actually in bank $e0, shadow-copied to bank $00. This adds a copy of the relevant definitions from Cxxx-IO.sym65, with the addresses in bank $e0 and "_GS" appended to the labels. This is now included by default for the Apple IIgs system defintions. (I thought about just adding them to Cxxx-IO.sym65, but then they pollute the namespace for 8-bit systems. Stripping them out at run time got a little complicated because the platform symbols are only loaded once, and we'd have to reload them every time the CPU definition changed. Further, there are a few aliases provided as constants, and constants are allowed to be 32 bits on all systems, so those can't be stripped. Rather than defining a new definition I figured it was just easier to have a second file. Maintenance shouldn't be too taxing, as definitions for 40-year-old machines don't change all that often.) (I also thought about trying to make the address mirroring stuff work for me here, but that would result in accesses being made to the canonical address with an offset of +$e00000, which looks awful.)
2020-07-11 20:57:18 +00:00
; Copyright 2020 faddenSoft. All Rights Reserved.
; See the LICENSE.txt file for distribution terms (Apache 2.0).
;
; Sources:
; NiftyList, by Dave Lyons
; Various Apple II reference materials found online
*SYNOPSIS Symbols for E0/Cxxx I/O locations
;
; This is just the list from Cxxx-IO.sym65, with the addresses in bank $e0
; and "_GS" appended to the symbol names.
;
KBD_GS < $E0C000 ;R last key pressed + 128
CLR80COL_GS > $E0C000 ;W use $C002-C005 for aux mem (80STOREOFF)
SET80COL_GS @ $E0C001 ;W use PAGE2 for aux mem (80STOREON)
RDMAINRAM_GS @ $E0C002 ;W if 80STORE off: read main mem $0200-BFFF
RDCARDRAM_GS @ $E0C003 ;W if 80STORE off: read aux mem $0200-BFFF
WRMAINRAM_GS @ $E0C004 ;W if 80STORE off: write main mem $0200-BFFF
WRCARDRAM_GS @ $E0C005 ;W if 80STORE off: write aux mem $0200-BFFF
SETSLOTCXROM_GS @ $E0C006 ;W use peripheral ROM ($C100-CFFF)
SETINTCXROM_GS @ $E0C007 ;W use internal ROM ($C100-CFFF)
SETSTDZP_GS @ $E0C008 ;W use main stack and zero page
SETALTZP_GS @ $E0C009 ;W use aux stack and zero page
SETINTC3ROM_GS @ $E0C00A ;W use internal slot 3 ROM
SETSLOTC3ROM_GS @ $E0C00B ;W use external slot 3 ROM
CLR80VID_GS @ $E0C00C ;W disable 80-column display mode
SET80VID_GS @ $E0C00D ;W enable 80-column display mode
CLRALTCHAR_GS @ $E0C00E ;W use primary char set
SETALTCHAR_GS @ $E0C00F ;W use alternate char set
KBDSTRB_GS @ $E0C010 ;RW keyboard strobe
RDLCBNK2_GS @ $E0C011 ;R bit 7: reading from LC bank 2 ($Dx)?
RDLCRAM_GS @ $E0C012 ;R bit 7: reading from LC RAM?
RDRAMRD_GS @ $E0C013 ;R bit 7: reading from aux/alt 48K?
RDRAMWRT_GS @ $E0C014 ;R bit 7: writing to aux/alt 48K?
RDCXROM_GS @ $E0C015 ;R bit 7: using internal slot ROM?
RDALTZP_GS @ $E0C016 ;R bit 7: using alt zero page, stack, & LC?
RDC3ROM_GS @ $E0C017 ;R bit 7: using external (slot 3) ROM?
RD80COL_GS @ $E0C018 ;R bit 7: 80STORE is on?
RDVBLBAR_GS @ $E0C019 ;R bit 7: not VBL (VBL signal is low)?
RDTEXT_GS @ $E0C01A ;R bit 7: using text mode?
RDMIX_GS @ $E0C01B ;R bit 7: using mixed mode?
RDPAGE2_GS @ $E0C01C ;R bit 7: using page 2?
RDHIRES_GS @ $E0C01D ;R bit 7: using hi-res graphics?
ALTCHARSET_GS @ $E0C01E ;R bit 7: using alt char set?
RD80VID_GS @ $E0C01F ;R bit 7: using 80 columns?
TAPEOUT_GS @ $E0C020 ;RW toggle caseette tape output
MONOCOLOR_GS @ $E0C021 ;W color/mono
TBCOLOR_GS @ $E0C022 ;RW screen color (low is BG, high is FG)
VGCINT_GS @ $E0C023 ;R VGC interrupts
MOUSEDATA_GS @ $E0C024 ;R mouse data: high bit is button
KEYMODREG_GS @ $E0C025 ;R modifier key state
DATAREG_GS @ $E0C026 ;RW ADB command/data
KMSTATUS_GS @ $E0C027 ;RW ADB status
ROMBANK_GS @ $E0C028 ;RW ROM bank select (IIc Plus)
NEWVIDEO_GS @ $E0C029 ;RW video select (SHR)
LANGSEL_GS @ $E0C02B ;RW ROM bank select
CHARROM_GS @ $E0C02C ;R addr for character ROM test
SLTROMSEL_GS @ $E0C02D ;RW slot vs. ROM selection
VERTCNT_GS @ $E0C02E ;R read video counter bits (V5-VB)
HORIZCNT_GS @ $E0C02F ;R read video counter bits (VA-H0)
SPKR_GS @ $E0C030 ;RW toggle speaker
DISKREG_GS @ $E0C031 ;RW disk interface
SCANINT_GS @ $E0C032 ;W VGC interrupt clear
CLOCKDATA_GS @ $E0C033 ;RW battery RAM interface
CLOCKCTL_GS @ $E0C034 ;RW bits 0-3 = border color
SHADOW_GS @ $E0C035 ;RW inhibit shadowing
CYAREG_GS @ $E0C036 ;RW Configure Your Apple
DMAREG_GS @ $E0C037 ;RW
SCCBREG_GS @ $E0C038 ;RW SCC command channel B
SCCAREG_GS @ $E0C039 ;RW SCC command channel A
SCCBDATA_GS @ $E0C03A ;RW SCC data channel B
SCCADATA_GS @ $E0C03B ;RW SCC data channel A
SOUNDCTL_GS @ $E0C03C ;RW sound settings (0-3=volume)
SOUNDDATA_GS @ $E0C03D ;RW sound data
SOUNDADRL_GS @ $E0C03E ;RW low pointer
SOUNDADRH_GS @ $E0C03F ;RW high pointer
STROBE_GS @ $E0C040 ;R game I/O strobe
INTEN_GS @ $E0C041 ;RW read VBL interrupt
MMDELTAX_GS @ $E0C044 ;R mouse delta movement X
MMDELTAY_GS @ $E0C045 ;R mouse delta movement Y
DIAGTYPE_GS @ $E0C046 ;W self-test diagnostics
CLRVBLINT_GS @ $E0C047 ;W clear VBL interrupt
CLRXYINT_GS @ $E0C048 ;W clear XY interrupt
EMUBYTE_GS @ $E0C04F ;RW used by emulators to identify themselves
TXTCLR_GS @ $E0C050 ;RW display graphics
TXTSET_GS @ $E0C051 ;RW display text
MIXCLR_GS @ $E0C052 ;RW display full screen
MIXSET_GS @ $E0C053 ;RW display split screen
TXTPAGE1_GS @ $E0C054 ;RW display page 1
TXTPAGE2_GS @ $E0C055 ;RW display page 2 (or read/write aux mem)
LORES_GS @ $E0C056 ;RW display lo-res graphics
HIRES_GS @ $E0C057 ;RW display hi-res graphics
SETAN0_GS @ $E0C058 ;RW annunciator 0 off
CLRAN0_GS @ $E0C059 ;RW annunciator 0 on
SETAN1_GS @ $E0C05A ;RW annunciator 1 off
CLRAN1_GS @ $E0C05B ;RW annunciator 1 on
SETAN2_GS @ $E0C05C ;RW annunciator 2 off
CLRAN2_GS @ $E0C05D ;RW annunciator 2 on
SETAN3_GS @ $E0C05E ;RW annunciator 3 off
SETDHIRES_GS = $E0C05E ;W if IOUDIS set, turn on double hi-res
CLRAN3_GS @ $E0C05F ;RW annunciator 3 on
CLRDHIRES_GS = $E0C05F ;W if IOUDIS set, turn off double hi-res
TAPEIN_GS @ $E0C060 ;R read cassette input
BUTN3_GS = $E0C060 ;R switch input 3
BUTN0_GS @ $E0C061 ;R switch input 0 / open-apple
BUTN1_GS @ $E0C062 ;R switch input 1 / closed-apple
BUTN2_GS @ $E0C063 ;R switch input 2 / shift key
PADDL0_GS @ $E0C064 ;R analog input 0
PADDL1_GS @ $E0C065 ;R analog input 1
PADDL2_GS @ $E0C066 ;R analog input 2
PADDL3_GS @ $E0C067 ;R analog input 3
STATEREG_GS @ $E0C068 ;RW address state
TESTREG_GS @ $E0C06D ;test mode
CLTRM_GS @ $E0C06E ;clear test mode
ENTM_GS @ $E0C06F ;enable test mode
PTRIG_GS @ $E0C070 ;RW analog input reset
RDIOUDIS_GS < $E0C07E ;R status of IOU disabling
SETIOUDIS_GS > $E0C07E ;W disable IOU
RDDHIRES_GS < $E0C07F ;R status of double hi-res
CLRIOUDIS_GS > $E0C07F ;W enable IOU
ROMIN_GS @ $E0C081 ;RWx2 read ROM, write RAM bank 2
ROMIN_RO_GS @ $E0C082 ;RW read ROM, no write
LCBANK2_GS @ $E0C083 ;RWx2 read/write RAM bank 2
LCBANK1_GS @ $E0C08B ;RWx2 read/write RAM bank 1
CLRROM_GS @ $E0CFFF ;disable slot C8 ROM
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