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Update Apple II definitions

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Picked some names to fill the gaps in the language card I/O
location list.

Tweaked the hi-res sprite sheet slightly.
This commit is contained in:
Andy McFadden 2020-08-21 20:01:41 -07:00
parent 2dfdb3234b
commit 30cb96f737
3 changed files with 9 additions and 5 deletions
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8
SourceGen/RuntimeData/Apple/Cxxx-IO.sym65
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@ -124,14 +124,14 @@ SETIOUDIS > $C07E ;W disable IOU
RDDHIRES < $C07F ;R status of double hi-res RDDHIRES < $C07F ;R status of double hi-res
CLRIOUDIS > $C07F ;W enable IOU CLRIOUDIS > $C07F ;W enable IOU
; $C080 ;RW read RAM bank 2, write off LCBANK2_RW @ $C080 ;RW read RAM bank 2, write off
ROMIN @ $C081 ;RWx2 read ROM, write RAM bank 2 ROMIN @ $C081 ;RWx2 read ROM, write RAM bank 2
ROMIN_RO @ $C082 ;RW read ROM, no write ROMIN_RO @ $C082 ;RW read ROM, no write
LCBANK2 @ $C083 ;RWx2 read/write RAM bank 2 LCBANK2 @ $C083 ;RWx2 read/write RAM bank 2
; C084-C087 repeats ; C084-C087 repeats
; $C088 ;RW read RAM bank 1, write off LCBANK1_RW @ $C088 ;RW read RAM bank 1, write off
; $C089 ;RW read ROM, write RAM bank 1 ROMIN1 @ $C089 ;RW read ROM, write RAM bank 1
; $C08A ;RW read ROM, no write ROMIN1_RO @ $C08A ;RW read ROM, no write
LCBANK1 @ $C08B ;RWx2 read/write RAM bank 1 LCBANK1 @ $C08B ;RWx2 read/write RAM bank 1
; C08C-C08F repeats ; C08C-C08F repeats

4
SourceGen/RuntimeData/Apple/E0Cxxx-IO.sym65
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@ -124,9 +124,13 @@ SETIOUDIS_GS > $E0C07E ;W disable IOU
RDDHIRES_GS < $E0C07F ;R status of double hi-res RDDHIRES_GS < $E0C07F ;R status of double hi-res
CLRIOUDIS_GS > $E0C07F ;W enable IOU CLRIOUDIS_GS > $E0C07F ;W enable IOU
LCBANK2_RW_GS @ $E0C080 ;RW read RAM bank 2, write off
ROMIN_GS @ $E0C081 ;RWx2 read ROM, write RAM bank 2 ROMIN_GS @ $E0C081 ;RWx2 read ROM, write RAM bank 2
ROMIN_RO_GS @ $E0C082 ;RW read ROM, no write ROMIN_RO_GS @ $E0C082 ;RW read ROM, no write
LCBANK2_GS @ $E0C083 ;RWx2 read/write RAM bank 2 LCBANK2_GS @ $E0C083 ;RWx2 read/write RAM bank 2
LCBANK1_RW_GS @ $E0C088 ;RW read RAM bank 1, write off
ROMIN1_GS @ $E0C089 ;RWx2 read ROM, write RAM bank 1
ROMIN1_RO_GS @ $E0C08A ;RW read ROM, no write
LCBANK1_GS @ $E0C08B ;RWx2 read/write RAM bank 1 LCBANK1_GS @ $E0C08B ;RWx2 read/write RAM bank 1
CLRROM_GS @ $E0CFFF ;disable slot C8 ROM CLRROM_GS @ $E0CFFF ;disable slot C8 ROM

2
SourceGen/RuntimeData/Apple/VisHiRes.cs
View File

@ -295,7 +295,7 @@ namespace RuntimeData.Apple {
int hcells; int hcells;
if (count > 128) { if (count > 128) {
hcells = 32; hcells = 32;
} else if (count >= 64) { } else if (count > 64) {
hcells = 16; hcells = 16;
} else if (count >= 32) { } else if (count >= 32) {
hcells = 8; hcells = 8;