diff --git a/SourceGen/SGTestData/20050-branches-and-banks b/SourceGen/SGTestData/20050-branches-and-banks new file mode 100644 index 0000000..728a010 Binary files /dev/null and b/SourceGen/SGTestData/20050-branches-and-banks differ diff --git a/SourceGen/SGTestData/20050-branches-and-banks.dis65 b/SourceGen/SGTestData/20050-branches-and-banks.dis65 new file mode 100644 index 0000000..ff1ee5e --- /dev/null +++ b/SourceGen/SGTestData/20050-branches-and-banks.dis65 @@ -0,0 +1,76 @@ +### 6502bench SourceGen dis65 v1.0 ### +{ +"_ContentVersion":3, +"FileDataLength":39, +"FileDataCrc32":-941143431, +"ProjectProps":{ +"CpuName":"6502", +"IncludeUndocumentedInstr":false, +"TwoByteBrk":false, +"EntryFlags":32702671, +"AutoLabelStyle":"Simple", +"AnalysisParams":{ +"AnalyzeUncategorizedData":true, +"DefaultTextScanMode":"LowHighAscii", +"MinCharsForString":4, +"SeekNearbyTargets":true, +"SmartPlpHandling":true}, + +"PlatformSymbolFileIdentifiers":["PROJ:20050-branches-and-banks.sym65"], +"ExtensionScriptFileIdentifiers":[], +"ProjectSyms":{ +}}, + +"AddressMap":[{ +"Offset":0, +"Addr":4096}, + +{ +"Offset":3, +"Addr":0}, + +{ +"Offset":26, +"Addr":128}, + +{ +"Offset":32, +"Addr":65472}], +"TypeHints":[{ +"Low":0, +"High":0, +"Hint":"Code"}], +"StatusFlagOverrides":{ +}, + +"Comments":{ +}, + +"LongComments":{ +}, + +"Notes":{ +}, + +"UserLabels":{ +"18":{ +"Label":"lodat", +"Value":15, +"Source":"User", +"Type":"GlobalAddr", +"LabelAnno":"None"}}, + +"OperandFormats":{ +"12":{ +"Length":2, +"Format":"NumericLE", +"SubFormat":"Hex", +"SymbolRef":null}}, + +"LvTables":{ +}, + +"Visualizations":[], +"VisualizationAnimations":[], +"VisualizationSets":{ +}} diff --git a/SourceGen/SGTestData/20052-branches-and-banks b/SourceGen/SGTestData/20052-branches-and-banks index 7950dc9..d668310 100644 Binary files a/SourceGen/SGTestData/20052-branches-and-banks and b/SourceGen/SGTestData/20052-branches-and-banks differ diff --git a/SourceGen/SGTestData/20052-branches-and-banks.dis65 b/SourceGen/SGTestData/20052-branches-and-banks.dis65 index 32b857e..5dc5d70 100644 --- a/SourceGen/SGTestData/20052-branches-and-banks.dis65 +++ b/SourceGen/SGTestData/20052-branches-and-banks.dis65 @@ -1,59 +1,135 @@ ### 6502bench SourceGen dis65 v1.0 ### { -"_ContentVersion":2,"FileDataLength":119,"FileDataCrc32":-1095650494,"ProjectProps":{ -"CpuName":"65816","IncludeUndocumentedInstr":false,"TwoByteBrk":false,"EntryFlags":33489103,"AutoLabelStyle":"Simple","AnalysisParams":{ -"AnalyzeUncategorizedData":true,"DefaultTextScanMode":"LowHighAscii","MinCharsForString":4,"SeekNearbyTargets":true,"SmartPlpHandling":true}, -"PlatformSymbolFileIdentifiers":["PROJ:20050-branches-and-banks.sym65"],"ExtensionScriptFileIdentifiers":[],"ProjectSyms":{ +"_ContentVersion":3, +"FileDataLength":83, +"FileDataCrc32":1678697595, +"ProjectProps":{ +"CpuName":"65816", +"IncludeUndocumentedInstr":false, +"TwoByteBrk":false, +"EntryFlags":32702671, +"AutoLabelStyle":"Simple", +"AnalysisParams":{ +"AnalyzeUncategorizedData":true, +"DefaultTextScanMode":"LowHighAscii", +"MinCharsForString":4, +"SeekNearbyTargets":true, +"SmartPlpHandling":true}, + +"PlatformSymbolFileIdentifiers":["PROJ:20050-branches-and-banks.sym65"], +"ExtensionScriptFileIdentifiers":[], +"ProjectSyms":{ }}, + "AddressMap":[{ -"Offset":0,"Addr":4096}, +"Offset":0, +"Addr":4096}, + { -"Offset":7,"Addr":0}, +"Offset":11, +"Addr":4456448}, + { -"Offset":34,"Addr":128}, +"Offset":39, +"Addr":4521920}, + { -"Offset":41,"Addr":65472}, -{ -"Offset":47,"Addr":4456448}, -{ -"Offset":75,"Addr":4521920}, -{ -"Offset":90,"Addr":8192}],"TypeHints":[{ -"Low":0,"High":0,"Hint":"Code"}],"StatusFlagOverrides":{ +"Offset":54, +"Addr":8192}], +"TypeHints":[{ +"Low":0, +"High":0, +"Hint":"Code"}], +"StatusFlagOverrides":{ }, + "Comments":{ }, + "LongComments":{ }, + "Notes":{ }, + "UserLabels":{ -"26":{ -"Label":"lodat","Value":19,"Source":"User","Type":"LocalOrGlobalAddr"}, -"79":{ -"Label":"high44","Value":4521924,"Source":"User","Type":"LocalOrGlobalAddr"}, -"70":{ -"Label":"dat44","Value":4456471,"Source":"User","Type":"LocalOrGlobalAddr"}, -"108":{ -"Label":"j2","Value":8210,"Source":"User","Type":"LocalOrGlobalAddr"}}, -"OperandFormats":{ -"16":{ -"Length":2,"Format":"NumericLE","SubFormat":"Hex","SymbolRef":null}, -"70":{ -"Length":2,"Format":"NumericLE","SubFormat":"Address","SymbolRef":null}, +"8":{ +"Label":"lodat", +"Value":4104, +"Source":"User", +"Type":"GlobalAddr", +"LabelAnno":"None"}, + +"34":{ +"Label":"dat44", +"Value":4456471, +"Source":"User", +"Type":"GlobalAddr", +"LabelAnno":"None"}, + +"43":{ +"Label":"high44", +"Value":4521924, +"Source":"User", +"Type":"GlobalAddr", +"LabelAnno":"None"}, + "72":{ -"Length":3,"Format":"NumericLE","SubFormat":"Address","SymbolRef":null}, -"93":{ -"Length":3,"Format":"NumericLE","SubFormat":"Symbol","SymbolRef":{ -"Label":"dat44","Part":"Low"}}, -"96":{ -"Length":3,"Format":"NumericLE","SubFormat":"Symbol","SymbolRef":{ -"Label":"dat44","Part":"Bank"}}, -"108":{ -"Length":3,"Format":"NumericLE","SubFormat":"Symbol","SymbolRef":{ -"Label":"j2","Part":"Low"}}, -"111":{ -"Length":3,"Format":"NumericLE","SubFormat":"Symbol","SymbolRef":{ -"Label":"j2","Part":"Low"}}}, +"Label":"j2", +"Value":8210, +"Source":"User", +"Type":"GlobalAddr", +"LabelAnno":"None"}}, + +"OperandFormats":{ +"34":{ +"Length":2, +"Format":"NumericLE", +"SubFormat":"Address", +"SymbolRef":null}, + +"36":{ +"Length":3, +"Format":"NumericLE", +"SubFormat":"Address", +"SymbolRef":null}, + +"57":{ +"Length":3, +"Format":"NumericLE", +"SubFormat":"Symbol", +"SymbolRef":{ +"Label":"dat44", +"Part":"Low"}}, + +"60":{ +"Length":3, +"Format":"NumericLE", +"SubFormat":"Symbol", +"SymbolRef":{ +"Label":"dat44", +"Part":"Bank"}}, + +"72":{ +"Length":3, +"Format":"NumericLE", +"SubFormat":"Symbol", +"SymbolRef":{ +"Label":"j2", +"Part":"Low"}}, + +"75":{ +"Length":3, +"Format":"NumericLE", +"SubFormat":"Symbol", +"SymbolRef":{ +"Label":"j2", +"Part":"Low"}}}, + "LvTables":{ +}, + +"Visualizations":[], +"VisualizationAnimations":[], +"VisualizationSets":{ }} diff --git a/SourceGen/SGTestData/Expected/20050-branches-and-banks_64tass.S b/SourceGen/SGTestData/Expected/20050-branches-and-banks_64tass.S new file mode 100644 index 0000000..7f086f4 --- /dev/null +++ b/SourceGen/SGTestData/Expected/20050-branches-and-banks_64tass.S @@ -0,0 +1,35 @@ + .cpu "6502" +* = $1000 + jmp L0000 + + .logical $0000 +L0000 bit @wL0000 +L0003 lda L0000 + lda L0003 + bne LFFC3 + bmi $ffc3 + bvs L0012 + bvc L0080 + +lodat .byte $00 + .byte $01 + .byte $02 + +L0012 lda lodat+1 + clc + bcc LFFC0 + + .here + .logical $0080 +L0080 bit @wL0080 + jmp LFFC6 + + .here + .logical $ffc0 +LFFC0 bit LFFC0 +LFFC3 clc + bcc L0003 + +LFFC6 rts + + .here diff --git a/SourceGen/SGTestData/Expected/20050-branches-and-banks_Merlin32.S b/SourceGen/SGTestData/Expected/20050-branches-and-banks_Merlin32.S new file mode 100644 index 0000000..82910a8 --- /dev/null +++ b/SourceGen/SGTestData/Expected/20050-branches-and-banks_Merlin32.S @@ -0,0 +1,31 @@ + org $1000 + jmp L0000 + + org $0000 +L0000 bit: L0000 +L0003 lda L0000 + lda L0003 + dfb $d0,$ba + dfb $30,$b8 + bvs L0012 + bvc L0080 + +lodat dfb $00 + dfb $01 + dfb $02 + +L0012 lda lodat+1 + clc + dfb $90,$a9 + + org $0080 +L0080 bit: L0080 + jmp LFFC6 + + org $ffc0 +LFFC0 bit LFFC0 +LFFC3 clc + dfb $90,$3d + +LFFC6 rts + diff --git a/SourceGen/SGTestData/Expected/20050-branches-and-banks_acme.S b/SourceGen/SGTestData/Expected/20050-branches-and-banks_acme.S new file mode 100644 index 0000000..884c806 --- /dev/null +++ b/SourceGen/SGTestData/Expected/20050-branches-and-banks_acme.S @@ -0,0 +1,37 @@ + !cpu 6502 +* = $0000 + !pseudopc $1000 { + jmp L0000 + + } ;!pseudopc + !pseudopc $0000 { +L0000 bit+2 L0000 +L0003 lda+1 L0000 + lda+1 L0003 + bne LFFC3 + bmi $ffc3 + bvs L0012 + bvc L0080 + +lodat !byte $00 + !byte $01 + !byte $02 + +L0012 lda+1 lodat+1 + clc + bcc LFFC0 + + } ;!pseudopc + !pseudopc $0080 { +L0080 bit+2 L0080 + jmp LFFC6 + + } ;!pseudopc + !pseudopc $ffc0 { +LFFC0 bit LFFC0 +LFFC3 clc + bcc L0003 + +LFFC6 rts + + } ;!pseudopc diff --git a/SourceGen/SGTestData/Expected/20050-branches-and-banks_cc65.S b/SourceGen/SGTestData/Expected/20050-branches-and-banks_cc65.S new file mode 100644 index 0000000..e8aca36 --- /dev/null +++ b/SourceGen/SGTestData/Expected/20050-branches-and-banks_cc65.S @@ -0,0 +1,36 @@ + .setcpu "6502" +; .segment "SEG000" + .org $1000 + jmp L0000 + +; .segment "SEG001" + .org $0000 +L0000: bit a:L0000 +L0003: lda L0000 + lda L0003 + .byte $d0,$ba + .byte $30,$b8 + bvs L0012 + bvc L0080 + +lodat: .byte $00 + .byte $01 + .byte $02 + +L0012: lda lodat+1 + clc + .byte $90,$a9 + +; .segment "SEG002" + .org $0080 +L0080: bit a:L0080 + jmp LFFC6 + +; .segment "SEG003" + .org $ffc0 +LFFC0: bit LFFC0 +LFFC3: clc + .byte $90,$3d + +LFFC6: rts + diff --git a/SourceGen/SGTestData/Expected/20050-branches-and-banks_cc65.cfg b/SourceGen/SGTestData/Expected/20050-branches-and-banks_cc65.cfg new file mode 100644 index 0000000..1c1e1ba --- /dev/null +++ b/SourceGen/SGTestData/Expected/20050-branches-and-banks_cc65.cfg @@ -0,0 +1,17 @@ +# 6502bench SourceGen generated linker script for 20050-branches-and-banks +MEMORY { + MAIN: file=%O, start=%S, size=65536; +# MEM000: file=%O, start=$1000, size=3; +# MEM001: file=%O, start=$0000, size=23; +# MEM002: file=%O, start=$0080, size=6; +# MEM003: file=%O, start=$ffc0, size=7; +} +SEGMENTS { + CODE: load=MAIN, type=rw; +# SEG000: load=MEM000, type=rw; +# SEG001: load=MEM001, type=rw; +# SEG002: load=MEM002, type=rw; +# SEG003: load=MEM003, type=rw; +} +FEATURES {} +SYMBOLS {} diff --git a/SourceGen/SGTestData/Expected/20052-branches-and-banks_64tass.S b/SourceGen/SGTestData/Expected/20052-branches-and-banks_64tass.S index 1917264..b02ba1a 100644 --- a/SourceGen/SGTestData/Expected/20052-branches-and-banks_64tass.S +++ b/SourceGen/SGTestData/Expected/20052-branches-and-banks_64tass.S @@ -1,4 +1,5 @@ .cpu "65816" +zero = $00 longsym = $123456 * = $1000 @@ -7,70 +8,46 @@ longsym = $123456 clc xce sep #$30 - jmp L0000 + jml L440000 - .logical $0000 -L0000 bit @wL0000 -_L0003 lda L0000 - lda _L0003 - bne _LFFC3 - bmi $ffc3 - per _LFFC3 - bvs _L0016 - brl _L0080 - -_lodat .byte $00 +lodat .byte $00 .byte $01 .byte $02 -_L0016 lda _lodat+1 - brl _LFFC0 - - .here - .logical $0080 -_L0080 bit @w_L0080 - jml _L440000 - - .here - .logical $ffc0 -_LFFC0 bit _LFFC0 -_LFFC3 brl _L0003 - - .here .logical $440000 -_L440000 cmp _L440000 -_L440004 lda _L440000 - lda @w0+(_L440000 & $ffff) - lda L0000 - bmi _L440004 - per _high44 - bne _high44 - brl _L44FFC0 +L440000 cmp L440000 +L440004 lda L440000 + lda @w0+(L440000 & $ffff) + lda zero + bmi L440004 + per high44 + bne high44 + brl L44FFC0 -_dat44 .word 0+(_dat44 & $ffff) - .long _dat44 +dat44 .word 0+(dat44 & $ffff) + .long dat44 .here .logical $44ffc0 -_L44FFC0 cmp _L44FFC0 -_high44 beq _L44FFCB - bmi _L440004 - brl _L440004 +L44FFC0 cmp L44FFC0 +high44 beq _L44FFCB + bmi L440004 + brl L440004 _L44FFCB jml _L2000 .here .logical $2000 _L2000 bit _L2000 - pea 0+(_dat44 & $ffff) - pea 0+(_dat44 >> 16) + pea 0+(dat44 & $ffff) + pea 0+(dat44 >> 16) bne _L200E - jml [_lodat] + jml [lodat] _L200E nop - jsr _j2 -_j2 jsr _j2+3 - jsr _j2-3 + jsr j2 +j2 jsr j2+3 + jsr j2-3 jsl longsym rts diff --git a/SourceGen/SGTestData/Expected/20052-branches-and-banks_Merlin32.S b/SourceGen/SGTestData/Expected/20052-branches-and-banks_Merlin32.S index 537b033..2ada6dc 100644 --- a/SourceGen/SGTestData/Expected/20052-branches-and-banks_Merlin32.S +++ b/SourceGen/SGTestData/Expected/20052-branches-and-banks_Merlin32.S @@ -1,52 +1,32 @@ +zero equ $00 longsym equ $123456 org $1000 clc xce sep #$30 - jmp L0000 + jml L440000 - org $0000 -L0000 bit: L0000 -:L0003 lda L0000 - lda :L0003 - dfb $d0,$ba - dfb $30,$b8 - dfb $62,$b5,$ff - bvs :L0016 - brl :L0080 - -:lodat dfb $00 +lodat dfb $00 dfb $01 dfb $02 -:L0016 lda :lodat+1 - dfb $82,$a5,$ff - - org $0080 -:L0080 bit: :L0080 - jml :L440000 - - org $ffc0 -:LFFC0 bit :LFFC0 -:LFFC3 dfb $82,$3d,$00 - org $440000 -:L440000 cmpl :L440000 -:L440004 ldal :L440000 - lda: :L440000 - lda L0000 - bmi :L440004 +L440000 cmpl L440000 +L440004 ldal L440000 + lda: L440000 + lda zero + bmi L440004 dfb $62,$b2,$ff dfb $d0,$b0 dfb $82,$a9,$ff -:dat44 dw :dat44 - adr :dat44 +dat44 dw dat44 + adr dat44 org $44ffc0 -:L44FFC0 cmpl :L44FFC0 -:high44 beq :L44FFCB +L44FFC0 cmpl L44FFC0 +high44 beq :L44FFCB dfb $30,$3c dfb $82,$39,$00 @@ -54,15 +34,15 @@ L0000 bit: L0000 org $2000 :L2000 bit :L2000 - pea :dat44 - pea ^:dat44 + pea dat44 + pea ^dat44 bne :L200E - jml [:lodat] + jml [lodat] :L200E nop - jsr :j2 -:j2 jsr :j2+3 - jsr :j2-3 + jsr j2 +j2 jsr j2+3 + jsr j2-3 jsl longsym rts diff --git a/SourceGen/SGTestData/Expected/20052-branches-and-banks_acme.S b/SourceGen/SGTestData/Expected/20052-branches-and-banks_acme.S index e175d1e..bf7210c 100644 --- a/SourceGen/SGTestData/Expected/20052-branches-and-banks_acme.S +++ b/SourceGen/SGTestData/Expected/20052-branches-and-banks_acme.S @@ -1,8 +1,7 @@ ;ACME can't handle 65816 code that lives outside bank zero * = $0000 !pseudopc $1000 { - !hex 18fbe2304c00002c0000a500a503d0ba30b862b5ff7006826d00000102a51482 - !hex a5ff2c80005c0000442cc0ff823d00cf000044af000044ad0000a50030f562b2 - !hex ffd0b082a9ff1700170044cfc0ff44f005303c8239005c0020002c0020f41700 - !hex f44400d003dc1300ea201220201520200f202256341260 + !hex 18fbe2305c000044000102cf000044af000044ad0000a50030f562b2ffd0b082 + !hex a9ff1700170044cfc0ff44f005303c8239005c0020002c0020f41700f44400d0 + !hex 03dc0810ea201220201520200f202256341260 } ;!pseudopc diff --git a/SourceGen/SGTestData/Expected/20052-branches-and-banks_cc65.S b/SourceGen/SGTestData/Expected/20052-branches-and-banks_cc65.S index f8bde46..2e54e76 100644 --- a/SourceGen/SGTestData/Expected/20052-branches-and-banks_cc65.S +++ b/SourceGen/SGTestData/Expected/20052-branches-and-banks_cc65.S @@ -1,4 +1,5 @@ .setcpu "65816" +zero = $00 longsym = $123456 ; .segment "SEG000" @@ -8,71 +9,47 @@ longsym = $123456 clc xce sep #$30 - jmp L0000 + jml L440000 -; .segment "SEG001" - .org $0000 -L0000: bit a:L0000 -@L0003: lda L0000 - lda @L0003 - .byte $d0,$ba - .byte $30,$b8 - .byte $62,$b5,$ff - bvs @L0016 - brl @L0080 - -@lodat: .byte $00 +lodat: .byte $00 .byte $01 .byte $02 -@L0016: lda @lodat+1 - .byte $82,$a5,$ff - -; .segment "SEG002" - .org $0080 -@L0080: bit a:@L0080 - jml @L440000 - -; .segment "SEG003" - .org $ffc0 -@LFFC0: bit @LFFC0 -@LFFC3: .byte $82,$3d,$00 - -; .segment "SEG004" +; .segment "SEG001" .org $440000 -@L440000: cmp @L440000 -@L440004: lda @L440000 - lda a:@L440000 & $ffff - lda L0000 - bmi @L440004 +L440000: cmp L440000 +L440004: lda L440000 + lda a:L440000 & $ffff + lda zero + bmi L440004 .byte $62,$b2,$ff .byte $d0,$b0 .byte $82,$a9,$ff -@dat44: .word @dat44 & $ffff - .faraddr @dat44 +dat44: .word dat44 & $ffff + .faraddr dat44 -; .segment "SEG005" +; .segment "SEG002" .org $44ffc0 -@L44FFC0: cmp @L44FFC0 -@high44: beq @L44FFCB +L44FFC0: cmp L44FFC0 +high44: beq @L44FFCB .byte $30,$3c .byte $82,$39,$00 @L44FFCB: jml @L2000 -; .segment "SEG006" +; .segment "SEG003" .org $2000 @L2000: bit @L2000 - pea @dat44 & $ffff - pea @dat44 >> 16 + pea dat44 & $ffff + pea dat44 >> 16 bne @L200E - jml [@lodat] + jml [lodat] @L200E: nop - jsr @j2 -@j2: jsr @j2+3 - jsr @j2-3 + jsr j2 +j2: jsr j2+3 + jsr j2-3 jsl longsym rts diff --git a/SourceGen/SGTestData/Expected/20052-branches-and-banks_cc65.cfg b/SourceGen/SGTestData/Expected/20052-branches-and-banks_cc65.cfg index ef3f98f..e3ec4e4 100644 --- a/SourceGen/SGTestData/Expected/20052-branches-and-banks_cc65.cfg +++ b/SourceGen/SGTestData/Expected/20052-branches-and-banks_cc65.cfg @@ -1,13 +1,10 @@ # 6502bench SourceGen generated linker script for 20052-branches-and-banks MEMORY { MAIN: file=%O, start=%S, size=65536; -# MEM000: file=%O, start=$1000, size=7; -# MEM001: file=%O, start=$0000, size=27; -# MEM002: file=%O, start=$0080, size=7; -# MEM003: file=%O, start=$ffc0, size=6; -# MEM004: file=%O, start=$440000, size=28; -# MEM005: file=%O, start=$44ffc0, size=15; -# MEM006: file=%O, start=$2000, size=29; +# MEM000: file=%O, start=$1000, size=11; +# MEM001: file=%O, start=$440000, size=28; +# MEM002: file=%O, start=$44ffc0, size=15; +# MEM003: file=%O, start=$2000, size=29; } SEGMENTS { CODE: load=MAIN, type=rw; @@ -15,9 +12,6 @@ SEGMENTS { # SEG001: load=MEM001, type=rw; # SEG002: load=MEM002, type=rw; # SEG003: load=MEM003, type=rw; -# SEG004: load=MEM004, type=rw; -# SEG005: load=MEM005, type=rw; -# SEG006: load=MEM006, type=rw; } FEATURES {} SYMBOLS {} diff --git a/SourceGen/SGTestData/Source/20050-branches-and-banks.S b/SourceGen/SGTestData/Source/20050-branches-and-banks.S new file mode 100644 index 0000000..2ca2fe5 --- /dev/null +++ b/SourceGen/SGTestData/Source/20050-branches-and-banks.S @@ -0,0 +1,41 @@ +; Copyright 2018 faddenSoft. All Rights Reserved. +; See the LICENSE.txt file for distribution terms (Apache 2.0). +; +; Assembler: cc65 +; +; Both cc65 (2.17) and Merlin32 (1.0) have problems computing branches that +; wrap around a bank (e.g. from $0010 to $ffd0). cc65 is slightly less +; egregious in that a workaround is possible: if you specify a label that +; is in range, and then an offset, it will generate code. +; +; 6502 version + + .setcpu "6502" + + .org $1000 + jmp zero + + .org $0000 +zero: bit a:zero +low: lda zero + lda low + bne low-$40 ;reference symbol + bmi low-$40 ;EDIT: format as hex + bvs more + bvc more1 +lodat: .byte $00,$01,$02 ;EDIT: set label +more: lda more-2 + clc + bcc zero-$40 ;branch to high + + .org $0080 +more1: bit a:more1 + jmp end + + .org $ffc0 +high: + bit high + clc + bcc high+$43 ;branch to low + +end: rts diff --git a/SourceGen/SGTestData/Source/20050-branches-and-banks.cfg b/SourceGen/SGTestData/Source/20050-branches-and-banks.cfg new file mode 100644 index 0000000..8db331e --- /dev/null +++ b/SourceGen/SGTestData/Source/20050-branches-and-banks.cfg @@ -0,0 +1,8 @@ +MEMORY { + MAIN: file=%O, start=%S, size=65536; +} +SEGMENTS { + CODE: load=MAIN, type=rw; +} +FEATURES {} +SYMBOLS {} diff --git a/SourceGen/SGTestData/Source/20052-branches-and-banks.S b/SourceGen/SGTestData/Source/20052-branches-and-banks.S index a67d610..3fdfae4 100644 --- a/SourceGen/SGTestData/Source/20052-branches-and-banks.S +++ b/SourceGen/SGTestData/Source/20052-branches-and-banks.S @@ -3,45 +3,18 @@ ; ; Assembler: cc65 ; -; Both cc65 (2.17) and Merlin32 (1.0) have problems computing branches that -; wrap around a bank (e.g. from $0010 to $ffd0). cc65 is slightly less -; egregious in that a workaround is possible: if you specify a label that -; is in range, and then an offset, it will generate code. +; For the 65816 we want to exercise some additional things. .setcpu "65816" symlong = $123456 - .org $1000 clc xce sep #$30 - .a8 - .i8 - jmp zero - - .org $0000 -zero: bit a:zero -low: lda zero - lda low - bne low-$40 ;reference symbol - bmi low-$40 ;EDIT: format as hex - per low-$40 - bvs more - brl more1 -lodat: .byte $00,$01,$02 ;EDIT: set label -more: lda more-2 - brl zero-$40 ;branch to high - - .org $0080 -more1: bit a:more1 jml bank44 - - .org $ffc0 -high: - bit high - brl high+$43 ;branch to low +lodat: .byte $00,$01,$02 ;EDIT: set label .org $440000 bank44: cmp f:bank44