mirror of
https://github.com/fadden/6502bench.git
synced 2025-01-07 06:30:52 +00:00
Implement IsRelative for cc65/merlin32
Added support for "relative" address regions to the Merlin 32 and cc65 code generators. These generate "flat" address directives, and so were a little more complicated. Suppressed generation of relative operands for non-addressable regions. Also, tweaked the 20250-nested-regions test to include a negative relative region offset.
This commit is contained in:
parent
f56e4f2bec
commit
387b50d827
@ -183,7 +183,7 @@ namespace CommonUtil {
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public int ActualLength { get; private set; }
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public int ActualLength { get; private set; }
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/// <summary>
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/// <summary>
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/// Address associated with pre-label.
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/// Address associated with pre-label and relative addressing.
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/// </summary>
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/// </summary>
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public int PreLabelAddress { get; private set; }
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public int PreLabelAddress { get; private set; }
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@ -207,6 +207,19 @@ namespace CommonUtil {
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}
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}
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}
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}
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/// <summary>
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/// Is this region validly marked "is relative"?
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/// </summary>
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/// <remarks>
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/// The relative address is determined by subtracting the Address from the
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/// PreLabelAddress, so neither may be NON_ADDR.
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/// </remarks>
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public bool HasValidIsRelative {
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get {
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return IsRelative && PreLabelAddress != NON_ADDR && Address != NON_ADDR;
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}
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}
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/// <summary>
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/// <summary>
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/// Full constructor.
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/// Full constructor.
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@ -600,7 +600,7 @@ namespace SourceGen.AsmGen {
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}
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}
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AddressMap.AddressRegion region = change.Region;
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AddressMap.AddressRegion region = change.Region;
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string addrStr;
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string addrStr;
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if (region.IsRelative && region.PreLabelAddress != Address.NON_ADDR) {
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if (region.HasValidIsRelative) {
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int diff = nextAddress - region.PreLabelAddress;
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int diff = nextAddress - region.PreLabelAddress;
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string pfxStr;
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string pfxStr;
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if (diff >= 0) {
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if (diff >= 0) {
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@ -96,6 +96,18 @@ namespace SourceGen.AsmGen {
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/// </summary>
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/// </summary>
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private int mNextAddress = -1;
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private int mNextAddress = -1;
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/// <summary>
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/// True if we've seen an "is relative" flag in a block of address region start directives.
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/// </summary>
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/// <remarks>
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/// The trick with IsRelative is that, if there are multiple arstarts at the same
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/// offset, we need to output some or all of them, starting from the one just before
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/// the first IsRelative start. We probably want to disable the use of Flush and
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/// just generate them as they appear, using the next Flush as the signal to return
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/// to standard behavior.
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/// </remarks>
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bool mIsInRelative = false;
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/// <summary>
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/// <summary>
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/// Holds detected version of configured assembler.
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/// Holds detected version of configured assembler.
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/// </summary>
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/// </summary>
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@ -540,34 +552,73 @@ namespace SourceGen.AsmGen {
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// IGenerator
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// IGenerator
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public void OutputArDirective(CommonUtil.AddressMap.AddressChange change) {
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public void OutputArDirective(CommonUtil.AddressMap.AddressChange change) {
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if (change.IsStart && change.Region.HasValidPreLabel) {
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// Need to output the previous ORG, if any, then a label on a line by itself.
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if (mNextAddress >= 0) {
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OutputLine(string.Empty,
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SourceFormatter.FormatPseudoOp(sDataOpNames.ArStartDirective),
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SourceFormatter.FormatHexValue(mNextAddress, 4),
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string.Empty);
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}
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string labelStr = mLocalizer.ConvLabel(change.Region.PreLabel);
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OutputLine(labelStr, string.Empty, string.Empty, string.Empty);
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}
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int nextAddress = change.Address;
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int nextAddress = change.Address;
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if (nextAddress == Address.NON_ADDR) {
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if (nextAddress == Address.NON_ADDR) {
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// Start non-addressable regions at zero to ensure they don't overflow bank.
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// Start non-addressable regions at zero to ensure they don't overflow bank.
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nextAddress = 0;
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nextAddress = 0;
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}
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}
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if (change.IsStart) {
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AddressMap.AddressRegion region = change.Region;
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if (region.HasValidPreLabel || region.HasValidIsRelative) {
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// Need to output the previous ORG, if one is pending.
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if (mNextAddress >= 0) {
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OutputLine(string.Empty,
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SourceFormatter.FormatPseudoOp(sDataOpNames.ArStartDirective),
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SourceFormatter.FormatHexValue(mNextAddress, 4),
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string.Empty);
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}
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}
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if (region.HasValidPreLabel) {
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string labelStr = mLocalizer.ConvLabel(change.Region.PreLabel);
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OutputLine(labelStr, string.Empty, string.Empty, string.Empty);
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}
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if (region.HasValidIsRelative) {
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// Found a valid IsRelative. Switch to "relative mode" if not there already.
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mIsInRelative = true;
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}
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if (mIsInRelative) {
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// Once we see a region with IsRelative set, we output regions as we
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// find them until the next Flush.
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string addrStr;
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if (region.HasValidIsRelative) {
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int diff = nextAddress - region.PreLabelAddress;
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string pfxStr;
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if (diff >= 0) {
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pfxStr = "*+";
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} else {
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pfxStr = "*-";
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diff = -diff;
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}
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addrStr = pfxStr + SourceFormatter.FormatHexValue(diff, 4);
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} else {
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addrStr = SourceFormatter.FormatHexValue(nextAddress, 4);
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}
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OutputLine(string.Empty,
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SourceFormatter.FormatPseudoOp(sDataOpNames.ArStartDirective),
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addrStr, string.Empty);
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mNextAddress = -1;
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return;
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}
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}
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mNextAddress = nextAddress;
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mNextAddress = nextAddress;
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}
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}
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// IGenerator
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// IGenerator
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public void FlushArDirectives() {
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public void FlushArDirectives() {
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// TODO(someday): handle IsRelative
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// Output pending directives. There will always be something to do here unless
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OutputLine(string.Empty,
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// we were in "relative" mode.
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SourceFormatter.FormatPseudoOp(sDataOpNames.ArStartDirective),
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Debug.Assert(mNextAddress >= 0 || mIsInRelative);
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SourceFormatter.FormatHexValue(mNextAddress, 4),
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if (mNextAddress >= 0) {
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string.Empty);
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OutputLine(string.Empty,
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SourceFormatter.FormatPseudoOp(sDataOpNames.ArStartDirective),
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SourceFormatter.FormatHexValue(mNextAddress, 4),
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string.Empty);
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}
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mNextAddress = -1;
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mNextAddress = -1;
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mIsInRelative = false;
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}
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}
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// IGenerator
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// IGenerator
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@ -91,6 +91,18 @@ namespace SourceGen.AsmGen {
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/// </summary>
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/// </summary>
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private int mNextAddress = -1;
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private int mNextAddress = -1;
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/// <summary>
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/// True if we've seen an "is relative" flag in a block of address region start directives.
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/// </summary>
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/// <remarks>
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/// The trick with IsRelative is that, if there are multiple arstarts at the same
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/// offset, we need to output some or all of them, starting from the one just before
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/// the first IsRelative start. We probably want to disable the use of Flush and
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/// just generate them as they appear, using the next Flush as the signal to return
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/// to standard behavior.
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/// </remarks>
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bool mIsInRelative = false;
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/// <summary>
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/// <summary>
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/// Holds detected version of configured assembler.
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/// Holds detected version of configured assembler.
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/// </summary>
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/// </summary>
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@ -491,35 +503,75 @@ namespace SourceGen.AsmGen {
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// IGenerator
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// IGenerator
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public void OutputArDirective(CommonUtil.AddressMap.AddressChange change) {
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public void OutputArDirective(CommonUtil.AddressMap.AddressChange change) {
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if (change.IsStart && change.Region.HasValidPreLabel) {
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// Need to output the previous ORG, if any, then a label on a line by itself.
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if (mNextAddress >= 0) {
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OutputLine(string.Empty,
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SourceFormatter.FormatPseudoOp(sDataOpNames.ArStartDirective),
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SourceFormatter.FormatHexValue(mNextAddress, 4),
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string.Empty);
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}
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string labelStr = mLocalizer.ConvLabel(change.Region.PreLabel);
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OutputLine(labelStr, string.Empty, string.Empty, string.Empty);
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}
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int nextAddress = change.Address;
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int nextAddress = change.Address;
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if (nextAddress == Address.NON_ADDR) {
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if (nextAddress == Address.NON_ADDR) {
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// Start non-addressable regions at zero to ensure they don't overflow bank.
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// Start non-addressable regions at zero to ensure they don't overflow bank.
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nextAddress = 0;
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nextAddress = 0;
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}
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}
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if (change.IsStart) {
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AddressMap.AddressRegion region = change.Region;
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if (region.HasValidPreLabel || region.HasValidIsRelative) {
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// Need to output the previous ORG, if one is pending.
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if (mNextAddress >= 0) {
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OutputLine(string.Empty,
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SourceFormatter.FormatPseudoOp(sDataOpNames.ArStartDirective),
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SourceFormatter.FormatHexValue(mNextAddress, 4),
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string.Empty);
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}
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}
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if (region.HasValidPreLabel) {
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string labelStr = mLocalizer.ConvLabel(change.Region.PreLabel);
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OutputLine(labelStr, string.Empty, string.Empty, string.Empty);
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}
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if (region.HasValidIsRelative) {
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// Found a valid IsRelative. Switch to "relative mode" if not there already.
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mIsInRelative = true;
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}
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if (mIsInRelative) {
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// Once we see a region with IsRelative set, we output regions as we
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// find them until the next Flush.
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string addrStr;
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if (region.HasValidIsRelative) {
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Debug.Assert(nextAddress != Address.NON_ADDR &&
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region.PreLabelAddress != Address.NON_ADDR);
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int diff = nextAddress - region.PreLabelAddress;
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string pfxStr;
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if (diff >= 0) {
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pfxStr = "*+";
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} else {
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pfxStr = "*-";
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diff = -diff;
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}
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addrStr = pfxStr + SourceFormatter.FormatHexValue(diff, 4);
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} else {
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addrStr = SourceFormatter.FormatHexValue(nextAddress, 4);
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}
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OutputLine(string.Empty,
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SourceFormatter.FormatPseudoOp(sDataOpNames.ArStartDirective),
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addrStr, string.Empty);
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mNextAddress = -1;
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return;
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}
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}
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mNextAddress = nextAddress;
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mNextAddress = nextAddress;
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}
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}
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// IGenerator
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// IGenerator
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public void FlushArDirectives() {
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public void FlushArDirectives() {
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// TODO(someday): handle IsRelative
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// Output pending directives. There will always be something to do here unless
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Debug.Assert(mNextAddress >= 0);
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// we were in "relative" mode.
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OutputLine(string.Empty,
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Debug.Assert(mNextAddress >= 0 || mIsInRelative);
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SourceFormatter.FormatPseudoOp(sDataOpNames.ArStartDirective),
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if (mNextAddress >= 0) {
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SourceFormatter.FormatHexValue(mNextAddress, 4),
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OutputLine(string.Empty,
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string.Empty);
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SourceFormatter.FormatPseudoOp(sDataOpNames.ArStartDirective),
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SourceFormatter.FormatHexValue(mNextAddress, 4),
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string.Empty);
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}
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mNextAddress = -1;
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mNextAddress = -1;
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mIsInRelative = false;
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}
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}
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// IGenerator
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// IGenerator
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@ -709,7 +709,7 @@ namespace SourceGen.AsmGen {
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AddressMap.AddressRegion region = change.Region;
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AddressMap.AddressRegion region = change.Region;
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string addrStr;
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string addrStr;
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if (region.IsRelative && region.PreLabelAddress != Address.NON_ADDR) {
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if (region.HasValidIsRelative) {
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int diff = nextAddress - region.PreLabelAddress;
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int diff = nextAddress - region.PreLabelAddress;
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string pfxStr;
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string pfxStr;
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if (diff >= 0) {
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if (diff >= 0) {
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@ -90,6 +90,7 @@ namespace SourceGen.AsmGen {
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}
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}
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}
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}
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// Reached end of start directives. Write the last one.
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if (arDirectPending) {
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if (arDirectPending) {
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gen.FlushArDirectives();
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gen.FlushArDirectives();
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arDirectPending = false;
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arDirectPending = false;
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@ -1095,8 +1095,7 @@ namespace SourceGen {
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string addrStr;
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string addrStr;
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if (region.Address == Address.NON_ADDR) {
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if (region.Address == Address.NON_ADDR) {
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addrStr = Address.NON_ADDR_STR;
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addrStr = Address.NON_ADDR_STR;
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} else if (change.Region.IsRelative &&
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} else if (change.Region.HasValidIsRelative) {
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change.Region.PreLabelAddress != Address.NON_ADDR) {
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int diff = region.Address - change.Region.PreLabelAddress;
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int diff = region.Address - change.Region.PreLabelAddress;
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string pfxStr;
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string pfxStr;
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if (diff >= 0) {
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if (diff >= 0) {
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Binary file not shown.
@ -2,7 +2,7 @@
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{
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{
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"_ContentVersion":5,
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"_ContentVersion":5,
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"FileDataLength":156,
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"FileDataLength":156,
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"FileDataCrc32":1681364707,
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"FileDataCrc32":367497130,
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"ProjectProps":{
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"ProjectProps":{
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"CpuName":"6502",
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"CpuName":"6502",
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"IncludeUndocumentedInstr":false,
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"IncludeUndocumentedInstr":false,
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@ -74,17 +74,17 @@
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{
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{
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"Offset":132,
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"Offset":132,
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"Addr":53248,
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"Addr":57344,
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"Length":24,
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"Length":24,
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"PreLabel":"",
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"PreLabel":"",
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"IsRelative":true},
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"IsRelative":true},
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{
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{
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"Offset":139,
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"Offset":139,
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"Addr":57344,
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"Addr":53248,
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"Length":17,
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"Length":17,
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"PreLabel":"",
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"PreLabel":"",
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"IsRelative":false},
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"IsRelative":true},
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|
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{
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{
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"Offset":145,
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"Offset":145,
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@ -7,7 +7,7 @@
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.logical *+$1000
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.logical *+$1000
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L3000 bit L3000
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L3000 bit L3000
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_L3003 lda _L3003
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_L3003 lda _L3003
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and _LD003
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and _LE003
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jmp _L200C
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jmp _L200C
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.here
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.here
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@ -22,7 +22,7 @@ _L1012 bit _L1012
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.null "Null-term PETSCII string"
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.null "Null-term PETSCII string"
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.byte $80
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.byte $80
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.word _L3003
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.word _L3003
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.word _LD003
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.word _LE003
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.byte $80
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.byte $80
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.here
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.here
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|
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@ -72,22 +72,22 @@ _L5017 rts
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_L4040 bit _L4040
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_L4040 bit _L4040
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bit _L5017
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bit _L5017
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nop
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nop
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jmp _LD000
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.here
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.logical *+$bf7e
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_LD000 bit _L200C
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_LD003 nop
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jmp _LE000
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jmp _LE000
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.logical $e000
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.here
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_LE000 bit _LE000
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.logical *+$cf7e
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_LE000 bit _L200C
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_LE003 nop
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jmp _LD000
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.logical *-$1007
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_LD000 bit _LD000
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jmp _LF000
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jmp _LF000
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.logical $f000
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.logical $f000
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_LF000 bit _LF000
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_LF000 bit _LF000
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lda _L3003
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lda _L3003
|
||||||
and _LD003
|
and _LE003
|
||||||
nop
|
nop
|
||||||
rts
|
rts
|
||||||
|
|
||||||
|
@ -7,7 +7,7 @@
|
|||||||
!pseudopc *+$1000 {
|
!pseudopc *+$1000 {
|
||||||
L3000 bit L3000
|
L3000 bit L3000
|
||||||
@L3003 lda @L3003
|
@L3003 lda @L3003
|
||||||
and @LD003
|
and @LE003
|
||||||
jmp @L200C
|
jmp @L200C
|
||||||
|
|
||||||
}
|
}
|
||||||
@ -22,7 +22,7 @@ L3000 bit L3000
|
|||||||
!pet "Null-term PETSCII string",$00
|
!pet "Null-term PETSCII string",$00
|
||||||
!byte $80
|
!byte $80
|
||||||
!word @L3003
|
!word @L3003
|
||||||
!word @LD003
|
!word @LE003
|
||||||
!byte $80
|
!byte $80
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -72,22 +72,22 @@ L3000 bit L3000
|
|||||||
@L4040 bit @L4040
|
@L4040 bit @L4040
|
||||||
bit @L5017
|
bit @L5017
|
||||||
nop
|
nop
|
||||||
jmp @LD000
|
|
||||||
|
|
||||||
}
|
|
||||||
!pseudopc *+$bf7e {
|
|
||||||
@LD000 bit @L200C
|
|
||||||
@LD003 nop
|
|
||||||
jmp @LE000
|
jmp @LE000
|
||||||
|
|
||||||
!pseudopc $e000 {
|
}
|
||||||
@LE000 bit @LE000
|
!pseudopc *+$cf7e {
|
||||||
|
@LE000 bit @L200C
|
||||||
|
@LE003 nop
|
||||||
|
jmp @LD000
|
||||||
|
|
||||||
|
!pseudopc *-$1007 {
|
||||||
|
@LD000 bit @LD000
|
||||||
jmp @LF000
|
jmp @LF000
|
||||||
|
|
||||||
!pseudopc $f000 {
|
!pseudopc $f000 {
|
||||||
@LF000 bit @LF000
|
@LF000 bit @LF000
|
||||||
lda @L3003
|
lda @L3003
|
||||||
and @LD003
|
and @LE003
|
||||||
nop
|
nop
|
||||||
rts
|
rts
|
||||||
|
|
||||||
|
@ -2,10 +2,12 @@
|
|||||||
.org $0000
|
.org $0000
|
||||||
.word $3000 ;load address
|
.word $3000 ;load address
|
||||||
|
|
||||||
.org $3000
|
.org $1000
|
||||||
|
.org *+$1000
|
||||||
|
.org *+$1000
|
||||||
L3000: bit L3000
|
L3000: bit L3000
|
||||||
@L3003: lda @L3003
|
@L3003: lda @L3003
|
||||||
and @LD003
|
and @LE003
|
||||||
jmp @L200C
|
jmp @L200C
|
||||||
|
|
||||||
.org $200c
|
.org $200c
|
||||||
@ -21,7 +23,7 @@ L3000: bit L3000
|
|||||||
.byte $c9,$20,$53,$54,$52,$49,$4e,$47,$00
|
.byte $c9,$20,$53,$54,$52,$49,$4e,$47,$00
|
||||||
.byte $80
|
.byte $80
|
||||||
.word @L3003
|
.word @L3003
|
||||||
.word @LD003
|
.word @LE003
|
||||||
.byte $80
|
.byte $80
|
||||||
|
|
||||||
.org $4000
|
.org $4000
|
||||||
@ -70,21 +72,22 @@ L3000: bit L3000
|
|||||||
@L4040: bit @L4040
|
@L4040: bit @L4040
|
||||||
bit @L5017
|
bit @L5017
|
||||||
nop
|
nop
|
||||||
jmp @LD000
|
|
||||||
|
|
||||||
.org $d000
|
|
||||||
@LD000: bit @L200C
|
|
||||||
@LD003: nop
|
|
||||||
jmp @LE000
|
jmp @LE000
|
||||||
|
|
||||||
.org $e000
|
.org $1082
|
||||||
@LE000: bit @LE000
|
.org *+$cf7e
|
||||||
|
@LE000: bit @L200C
|
||||||
|
@LE003: nop
|
||||||
|
jmp @LD000
|
||||||
|
|
||||||
|
.org *-$1007
|
||||||
|
@LD000: bit @LD000
|
||||||
jmp @LF000
|
jmp @LF000
|
||||||
|
|
||||||
.org $f000
|
.org $f000
|
||||||
@LF000: bit @LF000
|
@LF000: bit @LF000
|
||||||
lda @L3003
|
lda @L3003
|
||||||
and @LD003
|
and @LE003
|
||||||
nop
|
nop
|
||||||
rts
|
rts
|
||||||
|
|
||||||
|
@ -1,10 +1,12 @@
|
|||||||
org $0000
|
org $0000
|
||||||
dw $3000 ;load address
|
dw $3000 ;load address
|
||||||
|
|
||||||
org $3000
|
org $1000
|
||||||
|
org *+$1000
|
||||||
|
org *+$1000
|
||||||
L3000 bit L3000
|
L3000 bit L3000
|
||||||
:L3003 lda :L3003
|
:L3003 lda :L3003
|
||||||
and :LD003
|
and :LE003
|
||||||
jmp :L200C
|
jmp :L200C
|
||||||
|
|
||||||
org $200c
|
org $200c
|
||||||
@ -19,7 +21,7 @@ L3000 bit L3000
|
|||||||
hex ce554c4c2d5445524d20d0c5d4d3c3c9c920535452494e4700
|
hex ce554c4c2d5445524d20d0c5d4d3c3c9c920535452494e4700
|
||||||
dfb $80
|
dfb $80
|
||||||
dw :L3003
|
dw :L3003
|
||||||
dw :LD003
|
dw :LE003
|
||||||
dfb $80
|
dfb $80
|
||||||
|
|
||||||
org $4000
|
org $4000
|
||||||
@ -68,21 +70,22 @@ L3000 bit L3000
|
|||||||
:L4040 bit :L4040
|
:L4040 bit :L4040
|
||||||
bit :L5017
|
bit :L5017
|
||||||
nop
|
nop
|
||||||
jmp :LD000
|
|
||||||
|
|
||||||
org $d000
|
|
||||||
:LD000 bit :L200C
|
|
||||||
:LD003 nop
|
|
||||||
jmp :LE000
|
jmp :LE000
|
||||||
|
|
||||||
org $e000
|
org $1082
|
||||||
:LE000 bit :LE000
|
org *+$cf7e
|
||||||
|
:LE000 bit :L200C
|
||||||
|
:LE003 nop
|
||||||
|
jmp :LD000
|
||||||
|
|
||||||
|
org *-$1007
|
||||||
|
:LD000 bit :LD000
|
||||||
jmp :LF000
|
jmp :LF000
|
||||||
|
|
||||||
org $f000
|
org $f000
|
||||||
:LF000 bit :LF000
|
:LF000 bit :LF000
|
||||||
lda :L3003
|
lda :L3003
|
||||||
and :LD003
|
and :LE003
|
||||||
nop
|
nop
|
||||||
rts
|
rts
|
||||||
|
|
||||||
|
@ -18,7 +18,7 @@ _L11018 lda _L11018
|
|||||||
jmp _L11026
|
jmp _L11026
|
||||||
|
|
||||||
_L1101F .byte $80
|
_L1101F .byte $80
|
||||||
.logical *-$011020
|
.logical $0000
|
||||||
.byte $ea
|
.byte $ea
|
||||||
.byte $60
|
.byte $60
|
||||||
.dword _L31004
|
.dword _L31004
|
||||||
|
@ -1,5 +1,7 @@
|
|||||||
.setcpu "65816"
|
.setcpu "65816"
|
||||||
.org $031000
|
.org $011000
|
||||||
|
.org *+$010000
|
||||||
|
.org *+$010000
|
||||||
.a8
|
.a8
|
||||||
.i8
|
.i8
|
||||||
L31000: lda L31000
|
L31000: lda L31000
|
||||||
|
@ -1,4 +1,6 @@
|
|||||||
org $031000
|
org $011000
|
||||||
|
org *+$010000
|
||||||
|
org *+$010000
|
||||||
L31000 ldal L31000
|
L31000 ldal L31000
|
||||||
:L31004 ldal :L31004
|
:L31004 ldal :L31004
|
||||||
andl :L1101F
|
andl :L1101F
|
||||||
|
@ -107,17 +107,17 @@ a4040 bit a4040
|
|||||||
.here ;$4000
|
.here ;$4000
|
||||||
|
|
||||||
|
|
||||||
|
; EDIT: create region starting at $e000, ending at REGION2_END; relative
|
||||||
|
.logical $e000
|
||||||
|
tailend
|
||||||
|
partek bit part2k
|
||||||
|
late nop
|
||||||
|
jmp partdk
|
||||||
|
|
||||||
; EDIT: create region starting at $d000, ending at REGION2_END; relative
|
; EDIT: create region starting at $d000, ending at REGION2_END; relative
|
||||||
.logical $d000
|
.logical $d000
|
||||||
tailend
|
|
||||||
partdk bit part2k
|
|
||||||
late nop
|
|
||||||
jmp partek
|
|
||||||
|
|
||||||
; EDIT: create
|
partdk bit partdk
|
||||||
.logical $e000
|
|
||||||
|
|
||||||
partek bit partek
|
|
||||||
jmp partfk
|
jmp partfk
|
||||||
|
|
||||||
; EDIT: create, make it floating
|
; EDIT: create, make it floating
|
||||||
|
Loading…
Reference in New Issue
Block a user