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Add 2014-label-dp
This is primarily to exercise a Merlin 32 failure (issue #37). However, it also exercises a problem with cc65 (issue #40). Currently, only 64tass can assemble this project.
This commit is contained in:
Andy McFadden
parent
3cb1596d90
commit
50e8be186a
BIN
SourceGen/SGTestData/2014-label-dp
Normal file
BIN
SourceGen/SGTestData/2014-label-dp
Normal file
Binary file not shown.
26
SourceGen/SGTestData/2014-label-dp.dis65
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26
SourceGen/SGTestData/2014-label-dp.dis65
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@ -0,0 +1,26 @@
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### 6502bench SourceGen dis65 v1.0 ###
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{
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"_ContentVersion":1,"FileDataLength":601,"FileDataCrc32":63527368,"ProjectProps":{
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"CpuName":"65816","IncludeUndocumentedInstr":false,"EntryFlags":32702671,"AnalysisParams":{
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"AnalyzeUncategorizedData":true,"MinCharsForString":4,"SeekNearbyTargets":true},
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"PlatformSymbolFileIdentifiers":[],"ExtensionScriptFileIdentifiers":[],"ProjectSyms":{
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}},
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"AddressMap":[{
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"Offset":0,"Addr":4096},
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{
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"Offset":588,"Addr":128}],"TypeHints":[{
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"Low":0,"High":0,"Hint":"Code"},
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{
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"Low":588,"High":588,"Hint":"Code"}],"StatusFlagOverrides":{
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},
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"Comments":{
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},
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"LongComments":{
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"-2147483647":{
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"Text":"6502bench SourceGen v1.1.0-dev1","BoxMode":false,"MaxWidth":80,"BackgroundColor":0}},
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"Notes":{
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},
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"UserLabels":{
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},
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"OperandFormats":{
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}}
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293
SourceGen/SGTestData/Expected/2014-label-dp_64tass.S
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293
SourceGen/SGTestData/Expected/2014-label-dp_64tass.S
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@ -0,0 +1,293 @@
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;6502bench SourceGen v1.1.0-dev1
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.cpu "65816"
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* = $1000
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.as
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.xs
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sec
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xce
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jsr L101F
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jsr L10AB
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jsr L10F2
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jsr L1106
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jsr L1109
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jsr L112C
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jsr L11F9
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jsr L11FC
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nop
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nop
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nop
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.byte $00,$80
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L101F ora (L0080,x)
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.byte $02,$80
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ora $80,s
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tsb L0080
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ora L0080
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asl L0080
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ora [L0080]
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php
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ora #$80
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asl a
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phd
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tsb @wL0086
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ora @wL0086
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asl @wL0086
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ora @lL0089
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bpl L1041
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L1041 ora (L0080),y
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ora (L0080)
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ora ($80,s),y
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trb L0080
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ora L0080,x
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asl L0080,x
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ora [L0080],y
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clc
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ora L0086,y
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inc a
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tcs
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trb @wL0086
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ora @wL0086,x
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asl @wL0086,x
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ora @lL0089,x
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jsr L0086
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and (L0080,x)
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jsl L0089
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and $80,s
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bit L0080
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and L0080
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rol L0080
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and [L0080]
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plp
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and #$80
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rol a
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pld
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bit @wL0086
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and @wL0086
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rol @wL0086
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and @lL0089
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bmi L1089
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L1089 and (L0080),y
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and (L0080)
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and ($80,s),y
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bit L0080,x
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and L0080,x
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rol L0080,x
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and [L0080],y
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sec
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and L0086,y
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dec a
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tsc
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bit @wL0086,x
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and @wL0086,x
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rol @wL0086,x
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and @lL0089,x
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rti
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L10AB eor (L0080,x)
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.byte $42,$80
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eor $80,s
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mvp $84,$83
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eor L0080
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lsr L0080
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eor [L0080]
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pha
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eor #$80
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lsr a
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phk
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jmp L10C2
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L10C2 eor @wL0086
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lsr @wL0086
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eor @lL0089
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bvc L10CE
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L10CE eor (L0080),y
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eor (L0080)
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eor ($80,s),y
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mvn $84,$83
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eor L0080,x
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lsr L0080,x
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eor [L0080],y
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cli
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eor L0086,y
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phy
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tcd
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jml L10E7
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L10E7 eor @wL0086,x
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lsr @wL0086,x
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eor @lL0089,x
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rts
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L10F2 adc (L0080,x)
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per $0ff6
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adc $80,s
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stz L0080
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adc L0080
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ror L0080
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adc [L0080]
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pla
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adc #$80
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ror a
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rtl
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L1106 jmp (L0086)
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L1109 adc @wL0086
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ror @wL0086
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adc @lL0089
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bvs L1115
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L1115 adc (L0080),y
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adc (L0080)
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adc ($80,s),y
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stz L0080,x
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adc L0080,x
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ror L0080,x
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adc [L0080],y
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sei
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adc L0086,y
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ply
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tdc
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jmp (L0086,x)
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L112C adc @wL0086,x
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ror @wL0086,x
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adc @lL0089,x
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bra L1138
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L1138 sta (L0080,x)
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brl L113D
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L113D sta $80,s
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sty L0080
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sta L0080
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stx L0080
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sta [L0080]
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dey
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bit #$80
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txa
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phb
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sty @wL0086
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sta @wL0086
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stx @wL0086
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sta @lL0089
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bcc L115B
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L115B sta (L0080),y
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sta (L0080)
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sta ($80,s),y
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sty L0080,x
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sta L0080,x
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stx L0080,y
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sta [L0080],y
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tya
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sta L0086,y
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txs
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txy
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stz @wL0086
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sta @wL0086,x
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stz @wL0086,x
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sta @lL0089,x
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ldy #$80
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lda (L0080,x)
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ldx #$80
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lda $80,s
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ldy L0080
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lda L0080
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ldx L0080
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lda [L0080]
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tay
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lda #$80
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tax
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plb
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ldy @wL0086
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lda @wL0086
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ldx @wL0086
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lda @lL0089
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bcs L11A0
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L11A0 lda (L0080),y
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lda (L0080)
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lda ($80,s),y
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ldy L0080,x
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lda L0080,x
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ldx L0080,y
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lda [L0080],y
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clv
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lda L0086,y
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tsx
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tyx
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ldy @wL0086,x
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lda @wL0086,x
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ldx @wL0086,y
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lda @lL0089,x
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cpy #$80
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cmp (L0080,x)
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rep #$00
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cmp $80,s
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cpy L0080
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cmp L0080
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dec L0080
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cmp [L0080]
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iny
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cmp #$80
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dex
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wai
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cpy @wL0086
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cmp @wL0086
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dec @wL0086
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cmp @lL0089
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bne L11E5
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L11E5 cmp (L0080),y
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cmp (L0080)
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cmp ($80,s),y
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pei (L0080)
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cmp L0080,x
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dec L0080,x
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cmp [L0080],y
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cld
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cmp L0086,y
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phx
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stp
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L11F9 jml [L0086]
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L11FC cmp @wL0086,x
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dec @wL0086,x
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cmp @lL0089,x
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cpx #$80
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sbc (L0080,x)
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sep #$00
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sbc $80,s
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cpx L0080
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sbc L0080
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inc L0080
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sbc [L0080]
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inx
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sbc #$80
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nop
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xba
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cpx @wL0086
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sbc @wL0086
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inc @wL0086
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sbc @lL0089
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beq L122A
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L122A sbc (L0080),y
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sbc (L0080)
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sbc ($80,s),y
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pea L0086
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sbc L0080,x
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inc L0080,x
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sbc [L0080],y
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sed
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sbc L0086,y
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plx
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xce
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jsr (L0086,x)
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sbc @wL0086,x
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inc @wL0086,x
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sbc @lL0089,x
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.logical $0080
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L0080 bit L0082
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L0082 bit L0082
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bit L0082
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L0086 bit @wL0086
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L0089 lda @lL0089
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.here
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19
SourceGen/SGTestData/Source/2014-label-dp.S
Normal file
19
SourceGen/SGTestData/Source/2014-label-dp.S
Normal file
@ -0,0 +1,19 @@
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; Copyright 2018 faddenSoft. All Rights Reserved.
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; See the LICENSE.txt file for distribution terms (Apache 2.0).
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;
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; Assembler: Merlin 32
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ZP equ $80 ;must NOT be "$0080"
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MV0 EQU $83
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MV1 EQU $84
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PUT allops-common-65816.S
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org $0080
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bit _ZP
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_ZP bit _ZP
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bit _ZP
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ABS bit: ABS
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LONG ldal LONG
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