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Reverse position on '#' in block move operands

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During a discussion with the cc65 developers, I became convinced that
generating "MVN $01,$02" is wrong, and "MVN #$01,#$02" is correct.
64tass, cc65, and Merlin 32 all accept this syntax; only ACME does
not.  Operands without a leading '#' should be treated as 24-bit
values, and have the bank byte extracted.

This change updates the on-screen display and assembled output to
include the '#'.  The ACME generator uses a Quirk to suppress the
hash mark.  (It doesn't currently accept values larger than 8 bits,
so there's no ambiguity.)
This commit is contained in:
Andy McFadden 2019-08-08 13:02:01 -07:00
parent 0d0854bda7
commit 835c1c7fe2
18 changed files with 51 additions and 42 deletions
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1
SourceGen/AsmGen/AsmAcme.cs
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@ -161,6 +161,7 @@ namespace SourceGen.AsmGen {
Quirks = new AssemblerQuirks(); Quirks = new AssemblerQuirks();
Quirks.SinglePassAssembler = true; Quirks.SinglePassAssembler = true;
Quirks.SinglePassNoLabelCorrection = true; Quirks.SinglePassNoLabelCorrection = true;
Quirks.BlockMoveArgsNoHash = true;
mWorkDirectory = workDirectory; mWorkDirectory = workDirectory;
mFileNameBase = fileNameBase; mFileNameBase = fileNameBase;

8
SourceGen/AsmGen/AsmCc65.cs
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@ -149,9 +149,11 @@ namespace SourceGen.AsmGen {
mAsmVersion = V2_18; mAsmVersion = V2_18;
} }
// cc65 v2.17: https://github.com/cc65/cc65/issues/717 if (mAsmVersion <= V2_17) {
// cc65 v2.18: https://github.com/cc65/cc65/issues/925 // cc65 v2.17: https://github.com/cc65/cc65/issues/717
Quirks.BlockMoveArgsReversed = true; // see also https://github.com/cc65/cc65/issues/926
Quirks.BlockMoveArgsReversed = true;
}
// cc65 v2.17: https://github.com/cc65/cc65/issues/754 // cc65 v2.17: https://github.com/cc65/cc65/issues/754
// still broken in v2.18 // still broken in v2.18

8
SourceGen/AsmGen/GenCommon.cs
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@ -234,7 +234,8 @@ namespace SourceGen.AsmGen {
opstr1 = opstr2; opstr1 = opstr2;
opstr2 = tmp; opstr2 = tmp;
} }
formattedOperand = opstr1 + "," + opstr2; string hash = gen.Quirks.BlockMoveArgsNoHash ? "" : "#";
formattedOperand = hash + opstr1 + "," + hash + opstr2;
} else { } else {
formattedOperand = PseudoOp.FormatNumericOperand(formatter, proj.SymbolTable, formattedOperand = PseudoOp.FormatNumericOperand(formatter, proj.SymbolTable,
gen.Localizer.LabelMap, attr.DataDescriptor, gen.Localizer.LabelMap, attr.DataDescriptor,
@ -251,8 +252,9 @@ namespace SourceGen.AsmGen {
arg1 = operand >> 8; arg1 = operand >> 8;
arg2 = operand & 0xff; arg2 = operand & 0xff;
} }
formattedOperand = formatter.FormatHexValue(arg1, 2) + "," + string hash = gen.Quirks.BlockMoveArgsNoHash ? "" : "#";
formatter.FormatHexValue(arg2, 2); formattedOperand = hash + formatter.FormatHexValue(arg1, 2) + "," +
hash + formatter.FormatHexValue(arg2, 2);
} else { } else {
if (operandLen == 2) { if (operandLen == 2) {
// This is necessary for 16-bit operands, like "LDA abs" and "PEA val", // This is necessary for 16-bit operands, like "LDA abs" and "PEA val",

5
SourceGen/AsmGen/IGenerator.cs
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@ -172,6 +172,11 @@ namespace SourceGen.AsmGen {
/// </summary> /// </summary>
public bool BlockMoveArgsReversed { get; set; } public bool BlockMoveArgsReversed { get; set; }
/// <summary>
/// Are 8-bit constant args to MVN/MVP output without a leading '#'?
/// </summary>
public bool BlockMoveArgsNoHash { get; set; }
/// <summary> /// <summary>
/// Does the assembler configure assembler widths based on SEP/REP, but doesn't /// Does the assembler configure assembler widths based on SEP/REP, but doesn't
/// track the emulation bit? /// track the emulation bit?

6
SourceGen/LineListGen.cs
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@ -1151,7 +1151,7 @@ namespace SourceGen {
string opstr2 = PseudoOp.FormatNumericOperand(formatter, proj.SymbolTable, string opstr2 = PseudoOp.FormatNumericOperand(formatter, proj.SymbolTable,
null, attr.DataDescriptor, operand & 0xff, 1, null, attr.DataDescriptor, operand & 0xff, 1,
PseudoOp.FormatNumericOpFlags.None); PseudoOp.FormatNumericOpFlags.None);
formattedOperand = opstr1 + "," + opstr2; formattedOperand = '#' + opstr1 + "," + '#' + opstr2;
} else { } else {
formattedOperand = PseudoOp.FormatNumericOperand(formatter, proj.SymbolTable, formattedOperand = PseudoOp.FormatNumericOperand(formatter, proj.SymbolTable,
null, attr.DataDescriptor, operandForSymbol, operandLen, opFlags); null, attr.DataDescriptor, operandForSymbol, operandLen, opFlags);
@ -1159,8 +1159,8 @@ namespace SourceGen {
} else { } else {
// Show operand value in hex. // Show operand value in hex.
if (op.AddrMode == OpDef.AddressMode.BlockMove) { if (op.AddrMode == OpDef.AddressMode.BlockMove) {
formattedOperand = formatter.FormatHexValue(operand >> 8, 2) + "," + formattedOperand = '#' + formatter.FormatHexValue(operand >> 8, 2) + "," +
formatter.FormatHexValue(operand & 0xff, 2); '#' + formatter.FormatHexValue(operand & 0xff, 2);
} else { } else {
if (operandLen == 2) { if (operandLen == 2) {
// This is necessary for 16-bit operands, like "LDA abs" and "PEA val", // This is necessary for 16-bit operands, like "LDA abs" and "PEA val",

5
SourceGen/RuntimeData/Help/codegen.html
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@ -192,6 +192,8 @@ code, but also needs to know how to handle the corner cases.</p>
SourceGen for ACME also uses ".S".</li> SourceGen for ACME also uses ".S".</li>
<li>Does not allow the accumulator to be specified explicitly as an <li>Does not allow the accumulator to be specified explicitly as an
operand, e.g. you can't write <code>LSR A</code>.</li> operand, e.g. you can't write <code>LSR A</code>.</li>
<li>Syntax for <code>MVN</code>/<code>MVP</code> doesn't allow '#'
before 8-bit operands.</li>
</ul> </ul>
@ -230,9 +232,6 @@ code, but also needs to know how to handle the corner cases.</p>
multiple segments (it is, after all, an assembler for a C compiler). multiple segments (it is, after all, an assembler for a C compiler).
A linker configuration script is expected to be provided for anything A linker configuration script is expected to be provided for anything
complex. SourceGen generates a custom config file for each project.</li> complex. SourceGen generates a custom config file for each project.</li>
<li>The syntax for the 65816 block move instructions
(<code>MVN</code>/<code>MVP</code>) changed to a non-standard format
in v2.18, requiring a '#' before 8-bit constants.</li>
</ul> </ul>

4
SourceGen/SGTestData/Expected/1000-allops-value-65816_64tass.S
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@ -87,7 +87,7 @@ L1089 and ($ff),y
L10AB eor ($ff,x) L10AB eor ($ff,x)
.byte $42,$ff .byte $42,$ff
eor $ff,s eor $ff,s
mvp $fe,$ff mvp #$fe,#$ff
eor $ff eor $ff
lsr $ff lsr $ff
eor [$ff] eor [$ff]
@ -104,7 +104,7 @@ L10C2 eor $feff
L10CE eor ($ff),y L10CE eor ($ff),y
eor ($ff) eor ($ff)
eor ($ff,s),y eor ($ff,s),y
mvn $fe,$ff mvn #$fe,#$ff
eor $ff,x eor $ff,x
lsr $ff,x lsr $ff,x
eor [$ff],y eor [$ff],y

4
SourceGen/SGTestData/Expected/1000-allops-value-65816_Merlin32.S
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@ -84,7 +84,7 @@ L1089 and ($ff),y
L10AB eor ($ff,x) L10AB eor ($ff,x)
wdm $ff wdm $ff
eor $ff,S eor $ff,S
mvp $fe,$ff mvp #$fe,#$ff
eor $ff eor $ff
lsr $ff lsr $ff
eor [$ff] eor [$ff]
@ -101,7 +101,7 @@ L10C2 eor $feff
L10CE eor ($ff),y L10CE eor ($ff),y
eor ($ff) eor ($ff)
eor ($ff,S),y eor ($ff,S),y
mvn $fe,$ff mvn #$fe,#$ff
eor $ff,x eor $ff,x
lsr $ff,x lsr $ff,x
eor [$ff],y eor [$ff],y

4
SourceGen/SGTestData/Expected/1000-allops-value-65816_cc65.S
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@ -88,7 +88,7 @@ L1089: and ($ff),y
L10AB: eor ($ff,x) L10AB: eor ($ff,x)
wdm $ff wdm $ff
eor $ff,S eor $ff,S
.byte $44,$ff,$fe mvp #$fe,#$ff
eor $ff eor $ff
lsr $ff lsr $ff
eor [$ff] eor [$ff]
@ -105,7 +105,7 @@ L10C2: eor $feff
L10CE: eor ($ff),y L10CE: eor ($ff),y
eor ($ff) eor ($ff)
eor ($ff,S),y eor ($ff,S),y
.byte $54,$ff,$fe mvn #$fe,#$ff
eor $ff,x eor $ff,x
lsr $ff,x lsr $ff,x
eor [$ff],y eor [$ff],y

4
SourceGen/SGTestData/Expected/1001-allops-zero-65816_64tass.S
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@ -87,7 +87,7 @@ L1089 and ($00),y
L10AB eor ($00,x) L10AB eor ($00,x)
.byte $42,$00 .byte $42,$00
eor $00,s eor $00,s
mvp $00,$00 mvp #$00,#$00
eor $00 eor $00
lsr $00 lsr $00
eor [$00] eor [$00]
@ -104,7 +104,7 @@ L10C2 eor @w$0000
L10CE eor ($00),y L10CE eor ($00),y
eor ($00) eor ($00)
eor ($00,s),y eor ($00,s),y
mvn $00,$00 mvn #$00,#$00
eor $00,x eor $00,x
lsr $00,x lsr $00,x
eor [$00],y eor [$00],y

4
SourceGen/SGTestData/Expected/1001-allops-zero-65816_Merlin32.S
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@ -84,7 +84,7 @@ L1089 and ($00),y
L10AB eor ($00,x) L10AB eor ($00,x)
wdm $00 wdm $00
eor $00,S eor $00,S
mvp $00,$00 mvp #$00,#$00
eor $00 eor $00
lsr $00 lsr $00
eor [$00] eor [$00]
@ -101,7 +101,7 @@ L10C2 eor: $0000
L10CE eor ($00),y L10CE eor ($00),y
eor ($00) eor ($00)
eor ($00,S),y eor ($00,S),y
mvn $00,$00 mvn #$00,#$00
eor $00,x eor $00,x
lsr $00,x lsr $00,x
eor [$00],y eor [$00],y

4
SourceGen/SGTestData/Expected/1001-allops-zero-65816_cc65.S
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@ -88,7 +88,7 @@ L1089: and ($00),y
L10AB: eor ($00,x) L10AB: eor ($00,x)
wdm $00 wdm $00
eor $00,S eor $00,S
.byte $44,$00,$00 mvp #$00,#$00
eor $00 eor $00
lsr $00 lsr $00
eor [$00] eor [$00]
@ -105,7 +105,7 @@ L10C2: eor a:$0000
L10CE: eor ($00),y L10CE: eor ($00),y
eor ($00) eor ($00)
eor ($00,S),y eor ($00,S),y
.byte $54,$00,$00 mvn #$00,#$00
eor $00,x eor $00,x
lsr $00,x lsr $00,x
eor [$00],y eor [$00],y

8
SourceGen/SGTestData/Expected/2007-labels-and-symbols_64tass.S
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@ -114,10 +114,10 @@ start clc
.dword 0+(start >> 16) .dword 0+(start >> 16)
skipdata lda #(biggie >> 16)-1 skipdata lda #(biggie >> 16)-1
mvn `biggie,(`biggie)-17 mvn #`biggie,#(`biggie)-17
mvp `start,(`start)+17 mvp #`start,#(`start)+17
mvn 18,1 mvn #18,#1
mvp %00000001,%00010010 mvp #%00000001,#%00010010
per skipdata per skipdata
brl nextchunk brl nextchunk

8
SourceGen/SGTestData/Expected/2007-labels-and-symbols_Merlin32.S
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@ -110,10 +110,10 @@ start clc
adrl ^start adrl ^start
skipdata lda #^biggie-65536 skipdata lda #^biggie-65536
mvn ^biggie,^biggie-1114112 mvn #^biggie,#^biggie-1114112
mvp ^start,^start+1114112 mvp #^start,#^start+1114112
mvn 18,1 mvn #18,#1
mvp %00000001,%00010010 mvp #%00000001,#%00010010
per skipdata per skipdata
brl nextchunk brl nextchunk

8
SourceGen/SGTestData/Expected/2007-labels-and-symbols_cc65.S
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@ -115,10 +115,10 @@ start: clc
.dword start >> 16 .dword start >> 16
skipdata: lda #biggie >> 16 -1 skipdata: lda #biggie >> 16 -1
.byte $54,$01,$12 mvn #^biggie,#^biggie-17
.byte $44,$12,$01 mvp #^start,#^start+17
.byte $54,$01,$12 mvn #18,#1
.byte $44,$12,$01 mvp #%00000001,#%00010010
per skipdata per skipdata
brl nextchunk brl nextchunk

4
SourceGen/SGTestData/Expected/2014-label-dp_64tass.S
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@ -88,7 +88,7 @@ L1089 and (L0080),y
L10AB eor (L0080,x) L10AB eor (L0080,x)
.byte $42,$80 .byte $42,$80
eor $80,s eor $80,s
mvp $84,$83 mvp #$84,#$83
eor L0080 eor L0080
lsr L0080 lsr L0080
eor [L0080] eor [L0080]
@ -105,7 +105,7 @@ L10C2 eor @wL0086
L10CE eor (L0080),y L10CE eor (L0080),y
eor (L0080) eor (L0080)
eor ($80,s),y eor ($80,s),y
mvn $84,$83 mvn #$84,#$83
eor L0080,x eor L0080,x
lsr L0080,x lsr L0080,x
eor [L0080],y eor [L0080],y

4
SourceGen/SGTestData/Expected/2014-label-dp_Merlin32.S
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@ -85,7 +85,7 @@ L1089 and (L0080),y
L10AB dfb $41,$80 L10AB dfb $41,$80
wdm $80 wdm $80
eor $80,S eor $80,S
mvp $84,$83 mvp #$84,#$83
eor L0080 eor L0080
lsr L0080 lsr L0080
dfb $47,$80 dfb $47,$80
@ -102,7 +102,7 @@ L10C2 eor: L0086
L10CE eor (L0080),y L10CE eor (L0080),y
dfb $52,$80 dfb $52,$80
eor ($80,S),y eor ($80,S),y
mvn $84,$83 mvn #$84,#$83
eor L0080,x eor L0080,x
lsr L0080,x lsr L0080,x
eor [L0080],y eor [L0080],y

4
SourceGen/SGTestData/Expected/2014-label-dp_cc65.S
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@ -89,7 +89,7 @@ L1089: and (L0080),y
L10AB: eor (L0080,x) L10AB: eor (L0080,x)
wdm $80 wdm $80
eor $80,S eor $80,S
.byte $44,$83,$84 mvp #$84,#$83
eor z:L0080 eor z:L0080
lsr z:L0080 lsr z:L0080
eor [L0080] eor [L0080]
@ -106,7 +106,7 @@ L10C2: eor a:L0086
L10CE: eor (L0080),y L10CE: eor (L0080),y
eor (L0080) eor (L0080)
eor ($80,S),y eor ($80,S),y
.byte $54,$83,$84 mvn #$84,#$83
eor z:L0080,x eor z:L0080,x
lsr z:L0080,x lsr z:L0080,x
eor [L0080],y eor [L0080],y