diff --git a/SourceGen/SGTestData/20052-branches-and-banks b/SourceGen/SGTestData/20052-branches-and-banks
index d493663..43e83e0 100644
Binary files a/SourceGen/SGTestData/20052-branches-and-banks and b/SourceGen/SGTestData/20052-branches-and-banks differ
diff --git a/SourceGen/SGTestData/20052-branches-and-banks.dis65 b/SourceGen/SGTestData/20052-branches-and-banks.dis65
index a23d28f..ad45105 100644
--- a/SourceGen/SGTestData/20052-branches-and-banks.dis65
+++ b/SourceGen/SGTestData/20052-branches-and-banks.dis65
@@ -1,8 +1,8 @@
 ### 6502bench SourceGen dis65 v1.0 ###
 {
 "_ContentVersion":4,
-"FileDataLength":234,
-"FileDataCrc32":1224113674,
+"FileDataLength":238,
+"FileDataCrc32":2077431201,
 "ProjectProps":{
 "CpuName":"65816",
 "IncludeUndocumentedInstr":false,
diff --git a/SourceGen/SGTestData/Expected/20052-branches-and-banks_64tass.S b/SourceGen/SGTestData/Expected/20052-branches-and-banks_64tass.S
index af40eb0..48a9d62 100644
--- a/SourceGen/SGTestData/Expected/20052-branches-and-banks_64tass.S
+++ b/SourceGen/SGTestData/Expected/20052-branches-and-banks_64tass.S
@@ -132,6 +132,8 @@ L543280 jsr     skip+$540000
         lda     #$eaea
         rep     #$30
         nop
+        jsr     $54edcb
+        nop
         rtl
 
         .here
diff --git a/SourceGen/SGTestData/Expected/20052-branches-and-banks_acme.S b/SourceGen/SGTestData/Expected/20052-branches-and-banks_acme.S
index f9a2e1c..5065ef6 100644
--- a/SourceGen/SGTestData/Expected/20052-branches-and-banks_acme.S
+++ b/SourceGen/SGTestData/Expected/20052-branches-and-banks_acme.S
@@ -8,5 +8,5 @@
         !hex    1632201732201832207d32207e32207f32eaa200fc1932fc7a32206e32207132
         !hex    206832206b3220743220773280187c19327c7a326c08106c0810dc0810dc0810
         !hex    7d3254eaea60200e20eac23008a90000e230a90028a9eaeae23008a900c230a9
-        !hex    000028a9eaeac230ea6b
+        !hex    000028a9eaeac230ea20cbedea6b
         } ;!pseudopc
diff --git a/SourceGen/SGTestData/Expected/20052-branches-and-banks_cc65.S b/SourceGen/SGTestData/Expected/20052-branches-and-banks_cc65.S
index 6b68221..988010b 100644
--- a/SourceGen/SGTestData/Expected/20052-branches-and-banks_cc65.S
+++ b/SourceGen/SGTestData/Expected/20052-branches-and-banks_cc65.S
@@ -134,5 +134,7 @@ L543280: jsr     skip
          lda     #$eaea
          rep     #$30
          nop
+         jsr     $edcb
+         nop
          rtl
 
diff --git a/SourceGen/SGTestData/Expected/20052-branches-and-banks_cc65.cfg b/SourceGen/SGTestData/Expected/20052-branches-and-banks_cc65.cfg
index 19491ea..eed875b 100644
--- a/SourceGen/SGTestData/Expected/20052-branches-and-banks_cc65.cfg
+++ b/SourceGen/SGTestData/Expected/20052-branches-and-banks_cc65.cfg
@@ -5,7 +5,7 @@ MEMORY {
 #    MEM001: file=%O, start=$440000, size=28;
 #    MEM002: file=%O, start=$44ffc0, size=15;
 #    MEM003: file=%O, start=$2000, size=32;
-#    MEM004: file=%O, start=$543210, size=148;
+#    MEM004: file=%O, start=$543210, size=152;
 }
 SEGMENTS {
     CODE: load=MAIN, type=rw;
diff --git a/SourceGen/SGTestData/Expected/20052-branches-and-banks_merlin32.S b/SourceGen/SGTestData/Expected/20052-branches-and-banks_merlin32.S
index af43dbf..eaa5b92 100644
--- a/SourceGen/SGTestData/Expected/20052-branches-and-banks_merlin32.S
+++ b/SourceGen/SGTestData/Expected/20052-branches-and-banks_merlin32.S
@@ -123,5 +123,7 @@ L543280  jsr   skip
          lda   #$eaea
          rep   #$30
          nop
+         jsr   $edcb
+         nop
          rtl
 
diff --git a/SourceGen/SGTestData/Source/20052-branches-and-banks.S b/SourceGen/SGTestData/Source/20052-branches-and-banks.S
index e8ee3e4..48b0184 100644
--- a/SourceGen/SGTestData/Source/20052-branches-and-banks.S
+++ b/SourceGen/SGTestData/Source/20052-branches-and-banks.S
@@ -2,6 +2,7 @@
 ; See the LICENSE.txt file for distribution terms (Apache 2.0).
 ;
 ; Assembler: cc65
+; (cl65 --target none -C <cfg>.cfg <src>.S)
 ;
 ; For the 65816 we want to exercise some additional things.
 
@@ -129,6 +130,9 @@ fwdchk:
         rts
 
 nxt54b:
+; Do odd thing: JSR to address in bank $00 from bank $54.
+; Most assemblers just accept this because it's a JSR to
+; a 16-bit address.
         jsr     skip                    ;EDIT: set to "skip" label
         nop
 
@@ -165,4 +169,8 @@ nxt54b:
         .i16
         nop
 
+; try a 16-bit JSR with no symbol
+        jsr     $edcb
+        nop
+
         rtl