From d80132e94191d9cb77aa9ee62345df868ad98fa6 Mon Sep 17 00:00:00 2001
From: Andy McFadden
Date: Sun, 4 Aug 2019 14:48:42 -0700
Subject: [PATCH] Finish ACME v0.96.4 support
There's no easy way to make non-zero-bank 65816 code work, so I'm
punting and just generating a whole-file hex dump for those. This
renders tests 2007 and 2009 useless, so I'm hesitant to claim that
ACME support is fully functional.
---
SourceGen/AsmGen/AsmAcme.cs | 36 ++-
SourceGen/RuntimeData/Help/codegen.html | 73 ++++-
.../Expected/1000-allops-value-65816_acme.S | 287 +++++++++++++++++
.../Expected/1001-allops-zero-65816_acme.S | 287 +++++++++++++++++
.../1002-embedded-instructions_acme.S | 77 +++++
.../Expected/1003-flags-and-branches_acme.S | 260 +++++++++++++++
.../Expected/1004-data-recognition_acme.S | 35 +++
.../Expected/2000-allops-value-6502_acme.S | 296 ++++++++++++++++++
.../Expected/2001-allops-zero-6502_acme.S | 296 ++++++++++++++++++
.../Expected/2002-allops-value-65C02_acme.S | 275 ++++++++++++++++
.../Expected/2003-allops-zero-65C02_acme.S | 275 ++++++++++++++++
.../Expected/2004-numeric-types_acme.S | 31 ++
.../Expected/2005-string-types_acme.S | 145 +++++++++
.../Expected/2006-operand-formats_acme.S | 65 ++++
.../Expected/2007-labels-and-symbols_acme.S | 24 ++
.../Expected/2008-address-changes_acme.S | 123 ++++++++
.../Expected/2009-branches-and-banks_acme.S | 6 +
.../Expected/2010-target-adjustment_acme.S | 60 ++++
.../SGTestData/Expected/2011-hinting_acme.S | 35 +++
.../Expected/2012-label-localizer_acme.S | 59 ++++
.../Expected/2013-notes-and-comments_acme.S | 71 +++++
.../SGTestData/Expected/2014-label-dp_acme.S | 295 +++++++++++++++++
22 files changed, 3093 insertions(+), 18 deletions(-)
create mode 100644 SourceGen/SGTestData/Expected/1000-allops-value-65816_acme.S
create mode 100644 SourceGen/SGTestData/Expected/1001-allops-zero-65816_acme.S
create mode 100644 SourceGen/SGTestData/Expected/1002-embedded-instructions_acme.S
create mode 100644 SourceGen/SGTestData/Expected/1003-flags-and-branches_acme.S
create mode 100644 SourceGen/SGTestData/Expected/1004-data-recognition_acme.S
create mode 100644 SourceGen/SGTestData/Expected/2000-allops-value-6502_acme.S
create mode 100644 SourceGen/SGTestData/Expected/2001-allops-zero-6502_acme.S
create mode 100644 SourceGen/SGTestData/Expected/2002-allops-value-65C02_acme.S
create mode 100644 SourceGen/SGTestData/Expected/2003-allops-zero-65C02_acme.S
create mode 100644 SourceGen/SGTestData/Expected/2004-numeric-types_acme.S
create mode 100644 SourceGen/SGTestData/Expected/2005-string-types_acme.S
create mode 100644 SourceGen/SGTestData/Expected/2006-operand-formats_acme.S
create mode 100644 SourceGen/SGTestData/Expected/2007-labels-and-symbols_acme.S
create mode 100644 SourceGen/SGTestData/Expected/2008-address-changes_acme.S
create mode 100644 SourceGen/SGTestData/Expected/2009-branches-and-banks_acme.S
create mode 100644 SourceGen/SGTestData/Expected/2010-target-adjustment_acme.S
create mode 100644 SourceGen/SGTestData/Expected/2011-hinting_acme.S
create mode 100644 SourceGen/SGTestData/Expected/2012-label-localizer_acme.S
create mode 100644 SourceGen/SGTestData/Expected/2013-notes-and-comments_acme.S
create mode 100644 SourceGen/SGTestData/Expected/2014-label-dp_acme.S
diff --git a/SourceGen/AsmGen/AsmAcme.cs b/SourceGen/AsmGen/AsmAcme.cs
index 733c37c..2f8b88e 100644
--- a/SourceGen/AsmGen/AsmAcme.cs
+++ b/SourceGen/AsmGen/AsmAcme.cs
@@ -31,7 +31,12 @@ namespace SourceGen.AsmGen {
/// (https://sourceforge.net/projects/acme-crossass/).
///
public class GenAcme : IGenerator {
- private const string ASM_FILE_SUFFIX = "_acme.a"; // must start with underscore
+ // The ACME docs say that ACME sources should use the ".a" extension. However, this
+ // is already used for static libraries on UNIX systems, which means filename
+ // completion in shells tends to ignore them, and it can cause confusion in
+ // makefile rules. Since ".S" is pretty universal for assembly language sources,
+ // I'm sticking with that.
+ private const string ASM_FILE_SUFFIX = "_acme.S"; // must start with underscore
private const int MAX_OPERAND_LEN = 64;
private const string CLOSE_PSEUDOPC = "} ;!pseudopc";
@@ -94,7 +99,7 @@ namespace SourceGen.AsmGen {
private static CommonUtil.Version V0_96_4 = new CommonUtil.Version(0, 96, 4);
// Set if we're inside a "pseudopc" block, which will need to be closed.
- private bool mInPseudoPcBlock = false;
+ private bool mInPseudoPcBlock;
// Pseudo-op string constants.
@@ -220,7 +225,16 @@ namespace SourceGen.AsmGen {
"acme", V0_96_4, AsmAcme.OPTIONS));
}
- GenCommon.Generate(this, sw, worker);
+ if (HasNonZeroBankCode()) {
+ // don't try
+ OutputLine(SourceFormatter.FullLineCommentDelimiter +
+ "ACME can't handle 65816 code that lives outside bank zero");
+ int orgAddr = Project.AddrMap.Get(0);
+ OutputOrgDirective(0, orgAddr);
+ OutputDenseHex(0, Project.FileData.Length, string.Empty, string.Empty);
+ } else {
+ GenCommon.Generate(this, sw, worker);
+ }
if (mInPseudoPcBlock) {
OutputLine(string.Empty, CLOSE_PSEUDOPC, string.Empty, string.Empty);
@@ -231,6 +245,22 @@ namespace SourceGen.AsmGen {
return pathNames;
}
+ ///
+ /// Determines whether the project has any code assembled outside bank zero.
+ ///
+ private bool HasNonZeroBankCode() {
+ if (Project.CpuDef.HasAddr16) {
+ // Not possible on this CPU.
+ return false;
+ }
+ foreach (AddressMap.AddressMapEntry ent in Project.AddrMap) {
+ if (ent.Addr > 0xffff) {
+ return true;
+ }
+ }
+ return false;
+ }
+
// IGenerator
public void OutputAsmConfig() {
CpuDef cpuDef = Project.CpuDef;
diff --git a/SourceGen/RuntimeData/Help/codegen.html b/SourceGen/RuntimeData/Help/codegen.html
index 2d45805..0789625 100644
--- a/SourceGen/RuntimeData/Help/codegen.html
+++ b/SourceGen/RuntimeData/Help/codegen.html
@@ -24,9 +24,10 @@ for each.
SourceGen currently supports the following cross-assemblers:
@@ -124,7 +125,8 @@ code, but also needs to know how to handle the corner cases.
-Code is generated for 64tass v1.53.1515.
+Code is generated for 64tass v1.53.1515 or later.
+[web site]
Bugs:
@@ -157,16 +159,52 @@ code, but also needs to know how to handle the corner cases.
-
+
-Code is generated for cc65 v2.27.
+Code is generated for ACME v0.96.4 or later.
+[web site]
Bugs:
- - The arguments to MVN/MVP are reversed.
+ - The "pseudo PC" is only 16 bits, so any 65816 code targeted to run
+ outside bank zero cannot be assembled. SourceGen currently deals with
+ this by outputting the entire file as a hex dump.
+ - Undocumented opcode $AB (
LAX #imm
) generates an error.
+
+
+Quirks:
+
+ - The assembler shares some traits with one-pass assemblers. In
+ particular, if you forward-reference a zero-page label, the reference
+ generates a 16-bit absolute address instead of an 8-bit zero-page
+ address. Unlike other one-pass assemblers, the width is "sticky",
+ and backward references appearing later in the file also use absolute
+ addressing even though the proper width is known at that point. This is
+ worked around by using explicit "force zero page" annotations on
+ all references to zero-page labels.
+ - Undocumented opcode
ALR
($4b) uses mnemonic
+ ASR
instead.
+ - Officially, the preferred file extension for ACME source code is ".a",
+ but this is already used on UNIX systems for static libraries (which
+ means shell file completion tends to ignore it). Since ".S" is pretty
+ universally recognized as assembly source, code generated by SourceGen
+ for ACME also uses ".S".
+
+
+
+
+
+Code is generated for cc65 v2.17 or v2.18.
+[web site]
+
+Bugs:
+
+ - The arguments to
MVN
/MVP
are reversed (v2.17)
+ or zeroed (v2.18).
- PC relative branches don't wrap around at bank boundaries.
- - BRK <arg> is assembled to opcode $05 rather than $00.
- - WDM is not supported.
+ - [fixed in v2.18]
BRK <arg>
is assembled to opcode
+ $05 rather than $00.
+ - [fixed in v2.18]
WDM
is not supported.
Quirks:
@@ -182,9 +220,9 @@ code, but also needs to know how to handle the corner cases.
other opcodes match up with the "unintended opcodes" document.
ca65 is implemented as a single-pass assembler, so label widths
can't always be known in time. For example, if you use some zero-page
- labels, but they're defined via .ORG $0000 after the point where the
- labels are used, the assembler will already have generated them as
- absolute values. Width disambiguation must be applied to operands
+ labels, but they're defined via .ORG $0000
after the point
+ where the labels are used, the assembler will already have generated them
+ as absolute values. Width disambiguation must be applied to operands
that wouldn't be ambiguous to a multi-pass assembler.
The assembler is geared toward generating relocatable code with
multiple segments (it is, after all, an assembler for a C compiler).
@@ -195,7 +233,10 @@ code, but also needs to know how to handle the corner cases.
-Code is generated for Merlin 32 v1.0.
+Code is generated for Merlin 32 v1.0.
+[web site]
+[bug tracker]
+
Bugs:
@@ -227,9 +268,11 @@ code, but also needs to know how to handle the corner cases.
but doesn't attempt to track the emulation flag. So if you issue a
REP #$20
while in emulation mode, the assembler will incorrectly assume long
- registers. (Really I just want to be able to turn the width-tracking
- off, but there's no way to do that.)
+ registers. Ideally it would be possible to configure that off, but
+ there's no way to do that, so instead we occasionally generate
+ additional width directives.
Non-unique local labels should cause an error, but don't.
+ No undocumented opcodes are supported.
diff --git a/SourceGen/SGTestData/Expected/1000-allops-value-65816_acme.S b/SourceGen/SGTestData/Expected/1000-allops-value-65816_acme.S
new file mode 100644
index 0000000..fc024fe
--- /dev/null
+++ b/SourceGen/SGTestData/Expected/1000-allops-value-65816_acme.S
@@ -0,0 +1,287 @@
+ !cpu 65816
+* = $1000
+ !as
+ !rs
+ sec
+ xce
+ jsr L101F
+ jsr L10AB
+ jsr L10F2
+ jsr L1106
+ jsr L1109
+ jsr L112C
+ jsr L11F9
+ jsr L11FC
+ nop
+ nop
+ nop
+ brk
+
+ !byte $ff
+
+L101F ora ($ff,x)
+ cop $ff
+ ora $ff,S
+ tsb $ff
+ ora $ff
+ asl $ff
+ ora [$ff]
+ php
+ ora #$ff
+ asl
+ phd
+ tsb $feff
+ ora $feff
+ asl $feff
+ ora+3 $fdfeff
+ bpl L1041
+L1041 ora ($ff),y
+ ora ($ff)
+ ora ($ff,S),y
+ trb $ff
+ ora $ff,x
+ asl $ff,x
+ ora [$ff],y
+ clc
+ ora $feff,y
+ inc
+ tcs
+ trb $feff
+ ora $feff,x
+ asl $feff,x
+ ora+3 $fdfeff,x
+ jsr $feff
+ and ($ff,x)
+ jsl $fdfeff
+ and $ff,S
+ bit $ff
+ and $ff
+ rol $ff
+ and [$ff]
+ plp
+ and #$ff
+ rol
+ pld
+ bit $feff
+ and $feff
+ rol $feff
+ and+3 $fdfeff
+ bmi L1089
+L1089 and ($ff),y
+ and ($ff)
+ and ($ff,S),y
+ bit $ff,x
+ and $ff,x
+ rol $ff,x
+ and [$ff],y
+ sec
+ and $feff,y
+ dec
+ tsc
+ bit $feff,x
+ and $feff,x
+ rol $feff,x
+ and+3 $fdfeff,x
+ rti
+
+L10AB eor ($ff,x)
+ !byte $42,$ff
+ eor $ff,S
+ mvp $fe,$ff
+ eor $ff
+ lsr $ff
+ eor [$ff]
+ pha
+ eor #$ff
+ lsr
+ phk
+ jmp L10C2
+
+L10C2 eor $feff
+ lsr $feff
+ eor+3 $fdfeff
+ bvc L10CE
+L10CE eor ($ff),y
+ eor ($ff)
+ eor ($ff,S),y
+ mvn $fe,$ff
+ eor $ff,x
+ lsr $ff,x
+ eor [$ff],y
+ cli
+ eor $feff,y
+ phy
+ tcd
+ jml L10E7
+
+L10E7 eor $feff,x
+ lsr $feff,x
+ eor+3 $fdfeff,x
+ rts
+
+L10F2 adc ($ff,x)
+ per $0ff6
+ adc $ff,S
+ stz $ff
+ adc $ff
+ ror $ff
+ adc [$ff]
+ pla
+ adc #$ff
+ ror
+ rtl
+
+L1106 jmp ($feff)
+
+L1109 adc $feff
+ ror $feff
+ adc+3 $fdfeff
+ bvs L1115
+L1115 adc ($ff),y
+ adc ($ff)
+ adc ($ff,S),y
+ stz $ff,x
+ adc $ff,x
+ ror $ff,x
+ adc [$ff],y
+ sei
+ adc $feff,y
+ ply
+ tdc
+ jmp ($feff,x)
+
+L112C adc $feff,x
+ ror $feff,x
+ adc+3 $fdfeff,x
+ bra L1138
+
+L1138 sta ($ff,x)
+ brl L113D
+
+L113D sta $ff,S
+ sty $ff
+ sta $ff
+ stx $ff
+ sta [$ff]
+ dey
+ bit #$ff
+ txa
+ phb
+ sty $feff
+ sta $feff
+ stx $feff
+ sta+3 $fdfeff
+ bcc L115B
+L115B sta ($ff),y
+ sta ($ff)
+ sta ($ff,S),y
+ sty $ff,x
+ sta $ff,x
+ stx $ff,y
+ sta [$ff],y
+ tya
+ sta $feff,y
+ txs
+ txy
+ stz $feff
+ sta $feff,x
+ stz $feff,x
+ sta+3 $fdfeff,x
+ ldy #$ff
+ lda ($ff,x)
+ ldx #$ff
+ lda $ff,S
+ ldy $ff
+ lda $ff
+ ldx $ff
+ lda [$ff]
+ tay
+ lda #$ff
+ tax
+ plb
+ ldy $feff
+ lda $feff
+ ldx $feff
+ lda+3 $fdfeff
+ bcs L11A0
+L11A0 lda ($ff),y
+ lda ($ff)
+ lda ($ff,S),y
+ ldy $ff,x
+ lda $ff,x
+ ldx $ff,y
+ lda [$ff],y
+ clv
+ lda $feff,y
+ tsx
+ tyx
+ ldy $feff,x
+ lda $feff,x
+ ldx $feff,y
+ lda+3 $fdfeff,x
+ cpy #$ff
+ cmp ($ff,x)
+ rep #$00
+ cmp $ff,S
+ cpy $ff
+ cmp $ff
+ dec $ff
+ cmp [$ff]
+ iny
+ cmp #$ff
+ dex
+ wai
+ cpy $feff
+ cmp $feff
+ dec $feff
+ cmp+3 $fdfeff
+ bne L11E5
+L11E5 cmp ($ff),y
+ cmp ($ff)
+ cmp ($ff,S),y
+ pei ($ff)
+ cmp $ff,x
+ dec $ff,x
+ cmp [$ff],y
+ cld
+ cmp $feff,y
+ phx
+ stp
+
+L11F9 jml [$feff]
+
+L11FC cmp $feff,x
+ dec $feff,x
+ cmp+3 $fdfeff,x
+ cpx #$ff
+ sbc ($ff,x)
+ sep #$00
+ sbc $ff,S
+ cpx $ff
+ sbc $ff
+ inc $ff
+ sbc [$ff]
+ inx
+ sbc #$ff
+ nop
+ xba
+ cpx $feff
+ sbc $feff
+ inc $feff
+ sbc+3 $fdfeff
+ beq L122A
+L122A sbc ($ff),y
+ sbc ($ff)
+ sbc ($ff,S),y
+ pea $feff
+ sbc $ff,x
+ inc $ff,x
+ sbc [$ff],y
+ sed
+ sbc $feff,y
+ plx
+ xce
+ jsr ($feff,x)
+ sbc $feff,x
+ inc $feff,x
+ sbc+3 $fdfeff,x
diff --git a/SourceGen/SGTestData/Expected/1001-allops-zero-65816_acme.S b/SourceGen/SGTestData/Expected/1001-allops-zero-65816_acme.S
new file mode 100644
index 0000000..d69a4a3
--- /dev/null
+++ b/SourceGen/SGTestData/Expected/1001-allops-zero-65816_acme.S
@@ -0,0 +1,287 @@
+ !cpu 65816
+* = $1000
+ !as
+ !rs
+ sec
+ xce
+ jsr L101F
+ jsr L10AB
+ jsr L10F2
+ jsr L1106
+ jsr L1109
+ jsr L112C
+ jsr L11F9
+ jsr L11FC
+ nop
+ nop
+ nop
+ brk
+
+ !byte $00
+
+L101F ora ($00,x)
+ cop $00
+ ora $00,S
+ tsb $00
+ ora $00
+ asl $00
+ ora [$00]
+ php
+ ora #$00
+ asl
+ phd
+ tsb+2 $0000
+ ora+2 $0000
+ asl+2 $0000
+ ora+3 $000000
+ bpl L1041
+L1041 ora ($00),y
+ ora ($00)
+ ora ($00,S),y
+ trb $00
+ ora $00,x
+ asl $00,x
+ ora [$00],y
+ clc
+ ora $0000,y
+ inc
+ tcs
+ trb+2 $0000
+ ora+2 $0000,x
+ asl+2 $0000,x
+ ora+3 $000000,x
+ jsr $0000
+ and ($00,x)
+ jsl $000000
+ and $00,S
+ bit $00
+ and $00
+ rol $00
+ and [$00]
+ plp
+ and #$00
+ rol
+ pld
+ bit+2 $0000
+ and+2 $0000
+ rol+2 $0000
+ and+3 $000000
+ bmi L1089
+L1089 and ($00),y
+ and ($00)
+ and ($00,S),y
+ bit $00,x
+ and $00,x
+ rol $00,x
+ and [$00],y
+ sec
+ and $0000,y
+ dec
+ tsc
+ bit+2 $0000,x
+ and+2 $0000,x
+ rol+2 $0000,x
+ and+3 $000000,x
+ rti
+
+L10AB eor ($00,x)
+ !byte $42,$00
+ eor $00,S
+ mvp $00,$00
+ eor $00
+ lsr $00
+ eor [$00]
+ pha
+ eor #$00
+ lsr
+ phk
+ jmp L10C2
+
+L10C2 eor+2 $0000
+ lsr+2 $0000
+ eor+3 $000000
+ bvc L10CE
+L10CE eor ($00),y
+ eor ($00)
+ eor ($00,S),y
+ mvn $00,$00
+ eor $00,x
+ lsr $00,x
+ eor [$00],y
+ cli
+ eor $0000,y
+ phy
+ tcd
+ jml L10E7
+
+L10E7 eor+2 $0000,x
+ lsr+2 $0000,x
+ eor+3 $000000,x
+ rts
+
+L10F2 adc ($00,x)
+ per $0ff6
+ adc $00,S
+ stz $00
+ adc $00
+ ror $00
+ adc [$00]
+ pla
+ adc #$00
+ ror
+ rtl
+
+L1106 jmp ($0000)
+
+L1109 adc+2 $0000
+ ror+2 $0000
+ adc+3 $000000
+ bvs L1115
+L1115 adc ($00),y
+ adc ($00)
+ adc ($00,S),y
+ stz $00,x
+ adc $00,x
+ ror $00,x
+ adc [$00],y
+ sei
+ adc $0000,y
+ ply
+ tdc
+ jmp ($0000,x)
+
+L112C adc+2 $0000,x
+ ror+2 $0000,x
+ adc+3 $000000,x
+ bra L1138
+
+L1138 sta ($00,x)
+ brl L113D
+
+L113D sta $00,S
+ sty $00
+ sta $00
+ stx $00
+ sta [$00]
+ dey
+ bit #$00
+ txa
+ phb
+ sty+2 $0000
+ sta+2 $0000
+ stx+2 $0000
+ sta+3 $000000
+ bcc L115B
+L115B sta ($00),y
+ sta ($00)
+ sta ($00,S),y
+ sty $00,x
+ sta $00,x
+ stx $00,y
+ sta [$00],y
+ tya
+ sta $0000,y
+ txs
+ txy
+ stz+2 $0000
+ sta+2 $0000,x
+ stz+2 $0000,x
+ sta+3 $000000,x
+ ldy #$00
+ lda ($00,x)
+ ldx #$00
+ lda $00,S
+ ldy $00
+ lda $00
+ ldx $00
+ lda [$00]
+ tay
+ lda #$00
+ tax
+ plb
+ ldy+2 $0000
+ lda+2 $0000
+ ldx+2 $0000
+ lda+3 $000000
+ bcs L11A0
+L11A0 lda ($00),y
+ lda ($00)
+ lda ($00,S),y
+ ldy $00,x
+ lda $00,x
+ ldx $00,y
+ lda [$00],y
+ clv
+ lda $0000,y
+ tsx
+ tyx
+ ldy+2 $0000,x
+ lda+2 $0000,x
+ ldx+2 $0000,y
+ lda+3 $000000,x
+ cpy #$00
+ cmp ($00,x)
+ rep #$00
+ cmp $00,S
+ cpy $00
+ cmp $00
+ dec $00
+ cmp [$00]
+ iny
+ cmp #$00
+ dex
+ wai
+ cpy+2 $0000
+ cmp+2 $0000
+ dec+2 $0000
+ cmp+3 $000000
+ bne L11E5
+L11E5 cmp ($00),y
+ cmp ($00)
+ cmp ($00,S),y
+ pei ($00)
+ cmp $00,x
+ dec $00,x
+ cmp [$00],y
+ cld
+ cmp $0000,y
+ phx
+ stp
+
+L11F9 jml [$0000]
+
+L11FC cmp+2 $0000,x
+ dec+2 $0000,x
+ cmp+3 $000000,x
+ cpx #$00
+ sbc ($00,x)
+ sep #$00
+ sbc $00,S
+ cpx $00
+ sbc $00
+ inc $00
+ sbc [$00]
+ inx
+ sbc #$00
+ nop
+ xba
+ cpx+2 $0000
+ sbc+2 $0000
+ inc+2 $0000
+ sbc+3 $000000
+ beq L122A
+L122A sbc ($00),y
+ sbc ($00)
+ sbc ($00,S),y
+ pea $0000
+ sbc $00,x
+ inc $00,x
+ sbc [$00],y
+ sed
+ sbc $0000,y
+ plx
+ xce
+ jsr ($0000,x)
+ sbc+2 $0000,x
+ inc+2 $0000,x
+ sbc+3 $000000,x
diff --git a/SourceGen/SGTestData/Expected/1002-embedded-instructions_acme.S b/SourceGen/SGTestData/Expected/1002-embedded-instructions_acme.S
new file mode 100644
index 0000000..ed208e9
--- /dev/null
+++ b/SourceGen/SGTestData/Expected/1002-embedded-instructions_acme.S
@@ -0,0 +1,77 @@
+ !cpu 65816
+* = $1000
+ !as
+ !rs
+ clc
+ xce
+ sep #$30
+ jsr L1014
+ jsr L101C
+ jsr L102A
+ jsr L102F
+ jsr L1059
+ rts
+
+L1014 lda #$00
+ !byte $2c
+L1017 lda #$01
+ beq L1017
+ rts
+
+L101C sep #$30
+ lda $00
+ beq L1025
+ lda #$00
+ brk
+
+L1025 sta+3 $012345
+ rts
+
+L102A !byte $20
+L102B rts
+
+ !byte $ea
+ bra L102B
+
+L102F !byte $2c
+L1030 !byte $2c
+L1031 !byte $2c
+L1032 !byte $2c
+L1033 !byte $2c
+L1034 !byte $2c
+L1035 !byte $2c
+L1036 !byte $2c
+L1037 !byte $2c
+L1038 nop
+ nop
+ asl
+ bcc L102F
+ asl
+ bcc L1030
+ asl
+ bcc L1031
+ asl
+ bcc L1032
+ asl
+ bcc L1033
+ asl
+ bcc L1034
+ asl
+ bcc L1035
+ asl
+ bcc L1036
+ asl
+ bcc L1037
+ asl
+ bcc L1038
+ rts
+
+L1059 !byte $2c
+L105A nop
+ !byte $ad
+L105C lda $00
+ asl
+ bcc L105A
+ asl
+ bcc L105C
+ !byte $af
diff --git a/SourceGen/SGTestData/Expected/1003-flags-and-branches_acme.S b/SourceGen/SGTestData/Expected/1003-flags-and-branches_acme.S
new file mode 100644
index 0000000..5bf56a3
--- /dev/null
+++ b/SourceGen/SGTestData/Expected/1003-flags-and-branches_acme.S
@@ -0,0 +1,260 @@
+ !cpu 65816
+* = $1000
+ !as
+ !rs
+ clc
+ xce
+ sep #$ff
+ clv
+ cld
+ cli
+ clc
+ lda #$80
+ lda #$01
+ sed
+ sei
+ sec
+ lda #$ff
+ adc #$00
+ sep #$ff
+ rep #$80
+ rep #$40
+ rep #$20
+ !al
+ rep #$10
+ !rl
+ rep #$08
+ rep #$04
+ rep #$02
+ rep #$01
+ sep #$00
+ sep #$ff
+ !as
+ !rs
+ rep #$00
+ rep #$ff
+ !al
+ !rl
+ lda #$feed
+ sec
+ xce
+ !as
+ !rs
+ lda #$ff
+ rep #$30
+ lda #$ff
+ clc
+ xce
+ lda #$ff
+ rep #$20
+ !al
+ sep #$10
+ lda #$0000
+ ldx #$01
+ ldy #$02
+ sep #$20
+ !as
+ rep #$10
+ !rl
+ lda #$01
+ ldx #$0000
+ ldy #$0000
+ sep #$30
+ !rs
+ lda #$00
+ pha
+ plp
+ rep #$80
+ bpl L105F
+
+ !byte $00
+ !byte $00
+
+L105F sep #$80
+ bpl L1065
+ bmi L1067
+
+L1065 !byte $00
+ !byte $00
+
+L1067 rep #$40
+ bvc L106D
+
+ !byte $00
+ !byte $00
+
+L106D sep #$40
+ bvs L1073
+
+ !byte $00
+ !byte $00
+
+L1073 rep #$01
+ bcc L1079
+
+ !byte $00
+ !byte $00
+
+L1079 sep #$01
+ bcs L107F
+
+ !byte $00
+ !byte $00
+
+L107F rep #$02
+ bne L1085
+
+ !byte $00
+ !byte $00
+
+L1085 sep #$02
+ beq L108B
+
+ !byte $00
+ !byte $00
+
+L108B sep #$ff
+ lda #$01
+ bne L1093
+
+ !byte $00
+ !byte $db
+
+L1093 lda #$00
+ beq L1099
+
+ !byte $00
+ !byte $db
+
+L1099 bpl L109D
+
+ !byte $00
+ !byte $db
+
+L109D lda #$80
+ bmi L10A3
+
+ !byte $00
+ !byte $db
+
+L10A3 lda #$ff
+ and #$00
+ beq L10AB
+
+ !byte $00
+ !byte $db
+
+L10AB lda #$00
+ and #$ff
+ beq L10B3
+
+ !byte $00
+ !byte $db
+
+L10B3 lda #$ff
+ and #$7f
+ bne L10BB
+
+ !byte $00
+ !byte $db
+
+L10BB bpl L10BF
+
+ !byte $00
+ !byte $db
+
+L10BF lda #$ff
+ and #$80
+ bmi L10C7
+
+ !byte $00
+ !byte $db
+
+L10C7 lda #$00
+ ora #$00
+ beq L10CF
+
+ !byte $00
+ !byte $db
+
+L10CF ora #$01
+ bne L10D5
+
+ !byte $00
+ !byte $db
+
+L10D5 lda #$00
+ ora #$7f
+ bpl L10DD
+
+ !byte $00
+ !byte $db
+
+L10DD ora #$80
+ bmi L10E3
+
+ !byte $00
+ !byte $db
+
+L10E3 lda L10E3
+ sec
+ ror
+ bmi L10EC
+
+ !byte $00
+ !byte $dc
+
+L10EC clc
+ ror
+ bpl L10F2
+
+ !byte $00
+ !byte $dc
+
+L10F2 lda #$00
+ sec
+ rol
+ bne L10FA
+
+ !byte $00
+ !byte $dc
+
+L10FA clc
+ php
+ sec
+ plp
+ bcc L1102
+
+ !byte $00
+ !byte $00
+
+L1102 rep #$20
+ !al
+ sep #$10
+ jsr L111D
+ rep #$30
+ !rl
+ jsr L1123
+ sep #$30
+ !as
+ !rs
+ jsr L1123
+ rep #$20
+ !al
+ sep #$10
+ jsr L111D
+ sep #$30
+ !as
+ rts
+
+ !al
+L111D lda #$1234
+ ldx #$ff
+ rts
+
+ !as
+L1123 lda #$ff
+ ldx #$ee
+ ldy #$dd
+ rts
+
diff --git a/SourceGen/SGTestData/Expected/1004-data-recognition_acme.S b/SourceGen/SGTestData/Expected/1004-data-recognition_acme.S
new file mode 100644
index 0000000..a3dcab9
--- /dev/null
+++ b/SourceGen/SGTestData/Expected/1004-data-recognition_acme.S
@@ -0,0 +1,35 @@
+ !cpu 65816
+* = $1000
+ !as
+ !rs
+ lda L10AC
+ ora L10BC
+ rts
+
+ !byte $33
+ !byte $33
+ !byte $33
+ !byte $80
+ !text "4444"
+ !byte $80
+ !text "55555"
+ !byte $80
+ !text "MMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMM"
+ !byte $80
+ !fill 63,$4c
+ !byte $81
+ !byte $00
+ !byte $00
+ !byte $00
+ !byte $81
+ !byte $00
+ !byte $00
+ !byte $00
+ !byte $00
+ !byte $81
+ !fill 5,$00
+ !byte $81
+ !fill 8,$00
+L10AC !fill 8,$00
+ !fill 8,$82
+L10BC !fill 8,$82
diff --git a/SourceGen/SGTestData/Expected/2000-allops-value-6502_acme.S b/SourceGen/SGTestData/Expected/2000-allops-value-6502_acme.S
new file mode 100644
index 0000000..33326d7
--- /dev/null
+++ b/SourceGen/SGTestData/Expected/2000-allops-value-6502_acme.S
@@ -0,0 +1,296 @@
+ !cpu 6510
+* = $1000
+ jsr L1035
+ jsr L1038
+ jsr L1059
+ jsr L107D
+ jsr L109E
+ jsr L10BD
+ jsr L10C0
+ jsr L10E1
+ jsr L1100
+ jsr L1103
+ jsr L1116
+ jsr L1124
+ jsr L1169
+ jsr L11AE
+ jsr L11F3
+ jsr L1238
+ nop
+ nop
+ nop
+ brk
+
+ !byte $ff
+
+L1035 ora ($ff,x)
+ jam
+
+L1038 slo ($ff,x)
+ !byte $04,$ff
+ ora $ff
+ asl $ff
+ slo $ff
+ php
+ ora #$ff
+ asl
+ anc #$ff
+ !byte $0c,$ff,$fe
+ ora $feff
+ asl $feff
+ slo $feff
+ bpl L1056
+L1056 ora ($ff),y
+ !byte $12
+
+L1059 slo ($ff),y
+ !byte $14,$ff
+ ora $ff,x
+ asl $ff,x
+ slo $ff,x
+ clc
+ ora $feff,y
+ !byte $1a
+ slo $feff,y
+ !byte $1c,$ff,$fe
+ ora $feff,x
+ asl $feff,x
+ slo $feff,x
+ jsr $feff
+ and ($ff,x)
+ !byte $22
+
+L107D rla ($ff,x)
+ bit $ff
+ and $ff
+ rol $ff
+ rla $ff
+ plp
+ and #$ff
+ rol
+ !byte $2b,$ff
+ bit $feff
+ and $feff
+ rol $feff
+ rla $feff
+ bmi L109B
+L109B and ($ff),y
+ !byte $32
+
+L109E rla ($ff),y
+ !byte $34,$ff
+ and $ff,x
+ rol $ff,x
+ rla $ff,x
+ sec
+ and $feff,y
+ !byte $3a
+ rla $feff,y
+ !byte $3c,$ff,$fe
+ and $feff,x
+ rol $feff,x
+ rla $feff,x
+ rti
+
+L10BD eor ($ff,x)
+ !byte $42
+
+L10C0 sre ($ff,x)
+ !byte $44,$ff
+ eor $ff
+ lsr $ff
+ sre $ff
+ pha
+ eor #$ff
+ lsr
+ asr #$ff
+ jmp L10D3
+
+L10D3 eor $feff
+ lsr $feff
+ sre $feff
+ bvc L10DE
+L10DE eor ($ff),y
+ !byte $52
+
+L10E1 sre ($ff),y
+ !byte $54,$ff
+ eor $ff,x
+ lsr $ff,x
+ sre $ff,x
+ cli
+ eor $feff,y
+ !byte $5a
+ sre $feff,y
+ !byte $5c,$ff,$fe
+ eor $feff,x
+ lsr $feff,x
+ sre $feff,x
+ rts
+
+L1100 adc ($ff,x)
+ !byte $62
+
+L1103 rra ($ff,x)
+ !byte $64,$ff
+ adc $ff
+ ror $ff
+ rra $ff
+ pla
+ adc #$ff
+ ror
+ arr #$ff
+ jmp ($feff)
+
+L1116 adc $feff
+ ror $feff
+ rra $feff
+ bvs L1121
+L1121 adc ($ff),y
+ !byte $72
+
+L1124 rra ($ff),y
+ !byte $74,$ff
+ adc $ff,x
+ ror $ff,x
+ rra $ff,x
+ sei
+ adc $feff,y
+ !byte $7a
+ rra $feff,y
+ !byte $7c,$ff,$fe
+ adc $feff,x
+ ror $feff,x
+ rra $feff,x
+ !byte $80,$ff
+ sta ($ff,x)
+ !byte $82,$ff
+ sax ($ff,x)
+ sty $ff
+ sta $ff
+ stx $ff
+ sax $ff
+ dey
+ !byte $89,$ff
+ txa
+ ane #$ff
+ sty $feff
+ sta $feff
+ stx $feff
+ sax $feff
+ bcc L1166
+L1166 sta ($ff),y
+ !byte $92
+
+L1169 sha ($ff),y
+ sty $ff,x
+ sta $ff,x
+ stx $ff,y
+ sax $ff,y
+ tya
+ sta $feff,y
+ txs
+ tas $feff,y
+ shy $feff,x
+ sta $feff,x
+ shx $feff,y
+ sha $feff,y
+ ldy #$ff
+ lda ($ff,x)
+ ldx #$ff
+ lax ($ff,x)
+ ldy $ff
+ lda $ff
+ ldx $ff
+ lax $ff
+ tay
+ lda #$ff
+ tax
+ !byte $ab,$ff
+ ldy $feff
+ lda $feff
+ ldx $feff
+ lax $feff
+ bcs L11AB
+L11AB lda ($ff),y
+ !byte $b2
+
+L11AE lax ($ff),y
+ ldy $ff,x
+ lda $ff,x
+ ldx $ff,y
+ lax $ff,y
+ clv
+ lda $feff,y
+ tsx
+ las $feff,y
+ ldy $feff,x
+ lda $feff,x
+ ldx $feff,y
+ lax $feff,y
+ cpy #$ff
+ cmp ($ff,x)
+ !byte $c2,$ff
+ dcp ($ff,x)
+ cpy $ff
+ cmp $ff
+ dec $ff
+ dcp $ff
+ iny
+ cmp #$ff
+ dex
+ sbx #$ff
+ cpy $feff
+ cmp $feff
+ dec $feff
+ dcp $feff
+ bne L11F0
+L11F0 cmp ($ff),y
+ !byte $d2
+
+L11F3 dcp ($ff),y
+ !byte $d4,$ff
+ cmp $ff,x
+ dec $ff,x
+ dcp $ff,x
+ cld
+ cmp $feff,y
+ !byte $da
+ dcp $feff,y
+ !byte $dc,$ff,$fe
+ cmp $feff,x
+ dec $feff,x
+ dcp $feff,x
+ cpx #$ff
+ sbc ($ff,x)
+ !byte $e2,$ff
+ isc ($ff,x)
+ cpx $ff
+ sbc $ff
+ inc $ff
+ isc $ff
+ inx
+ sbc #$ff
+ nop
+ !byte $eb,$ff
+ cpx $feff
+ sbc $feff
+ inc $feff
+ isc $feff
+ beq L1235
+L1235 sbc ($ff),y
+ !byte $f2
+
+L1238 isc ($ff),y
+ !byte $f4,$ff
+ sbc $ff,x
+ inc $ff,x
+ isc $ff,x
+ sed
+ sbc $feff,y
+ !byte $fa
+ isc $feff,y
+ !byte $fc,$ff,$fe
+ sbc $feff,x
+ inc $feff,x
+ isc $feff,x
diff --git a/SourceGen/SGTestData/Expected/2001-allops-zero-6502_acme.S b/SourceGen/SGTestData/Expected/2001-allops-zero-6502_acme.S
new file mode 100644
index 0000000..6274d61
--- /dev/null
+++ b/SourceGen/SGTestData/Expected/2001-allops-zero-6502_acme.S
@@ -0,0 +1,296 @@
+ !cpu 6510
+* = $1000
+ jsr L1035
+ jsr L1038
+ jsr L1059
+ jsr L107D
+ jsr L109E
+ jsr L10BD
+ jsr L10C0
+ jsr L10E1
+ jsr L1100
+ jsr L1103
+ jsr L1116
+ jsr L1124
+ jsr L1169
+ jsr L11AE
+ jsr L11F3
+ jsr L1238
+ nop
+ nop
+ nop
+ brk
+
+ !byte $00
+
+L1035 ora ($00,x)
+ jam
+
+L1038 slo ($00,x)
+ !byte $04,$00
+ ora $00
+ asl $00
+ slo $00
+ php
+ ora #$00
+ asl
+ anc #$00
+ !byte $0c,$00,$00
+ ora+2 $0000
+ asl+2 $0000
+ slo+2 $0000
+ bpl L1056
+L1056 ora ($00),y
+ !byte $12
+
+L1059 slo ($00),y
+ !byte $14,$00
+ ora $00,x
+ asl $00,x
+ slo $00,x
+ clc
+ ora $0000,y
+ !byte $1a
+ slo $0000,y
+ !byte $1c,$00,$00
+ ora+2 $0000,x
+ asl+2 $0000,x
+ slo+2 $0000,x
+ jsr $0000
+ and ($00,x)
+ !byte $22
+
+L107D rla ($00,x)
+ bit $00
+ and $00
+ rol $00
+ rla $00
+ plp
+ and #$00
+ rol
+ !byte $2b,$00
+ bit+2 $0000
+ and+2 $0000
+ rol+2 $0000
+ rla+2 $0000
+ bmi L109B
+L109B and ($00),y
+ !byte $32
+
+L109E rla ($00),y
+ !byte $34,$00
+ and $00,x
+ rol $00,x
+ rla $00,x
+ sec
+ and $0000,y
+ !byte $3a
+ rla $0000,y
+ !byte $3c,$00,$00
+ and+2 $0000,x
+ rol+2 $0000,x
+ rla+2 $0000,x
+ rti
+
+L10BD eor ($00,x)
+ !byte $42
+
+L10C0 sre ($00,x)
+ !byte $44,$00
+ eor $00
+ lsr $00
+ sre $00
+ pha
+ eor #$00
+ lsr
+ asr #$00
+ jmp L10D3
+
+L10D3 eor+2 $0000
+ lsr+2 $0000
+ sre+2 $0000
+ bvc L10DE
+L10DE eor ($00),y
+ !byte $52
+
+L10E1 sre ($00),y
+ !byte $54,$00
+ eor $00,x
+ lsr $00,x
+ sre $00,x
+ cli
+ eor $0000,y
+ !byte $5a
+ sre $0000,y
+ !byte $5c,$00,$00
+ eor+2 $0000,x
+ lsr+2 $0000,x
+ sre+2 $0000,x
+ rts
+
+L1100 adc ($00,x)
+ !byte $62
+
+L1103 rra ($00,x)
+ !byte $64,$00
+ adc $00
+ ror $00
+ rra $00
+ pla
+ adc #$00
+ ror
+ arr #$00
+ jmp ($0000)
+
+L1116 adc+2 $0000
+ ror+2 $0000
+ rra+2 $0000
+ bvs L1121
+L1121 adc ($00),y
+ !byte $72
+
+L1124 rra ($00),y
+ !byte $74,$00
+ adc $00,x
+ ror $00,x
+ rra $00,x
+ sei
+ adc $0000,y
+ !byte $7a
+ rra $0000,y
+ !byte $7c,$00,$00
+ adc+2 $0000,x
+ ror+2 $0000,x
+ rra+2 $0000,x
+ !byte $80,$00
+ sta ($00,x)
+ !byte $82,$00
+ sax ($00,x)
+ sty $00
+ sta $00
+ stx $00
+ sax $00
+ dey
+ !byte $89,$00
+ txa
+ ane #$00
+ sty+2 $0000
+ sta+2 $0000
+ stx+2 $0000
+ sax+2 $0000
+ bcc L1166
+L1166 sta ($00),y
+ !byte $92
+
+L1169 sha ($00),y
+ sty $00,x
+ sta $00,x
+ stx $00,y
+ sax $00,y
+ tya
+ sta $0000,y
+ txs
+ tas $0000,y
+ shy+2 $0000,x
+ sta+2 $0000,x
+ shx $0000,y
+ sha $0000,y
+ ldy #$00
+ lda ($00,x)
+ ldx #$00
+ lax ($00,x)
+ ldy $00
+ lda $00
+ ldx $00
+ lax $00
+ tay
+ lda #$00
+ tax
+ !byte $ab,$00
+ ldy+2 $0000
+ lda+2 $0000
+ ldx+2 $0000
+ lax+2 $0000
+ bcs L11AB
+L11AB lda ($00),y
+ !byte $b2
+
+L11AE lax ($00),y
+ ldy $00,x
+ lda $00,x
+ ldx $00,y
+ lax $00,y
+ clv
+ lda $0000,y
+ tsx
+ las $0000,y
+ ldy+2 $0000,x
+ lda+2 $0000,x
+ ldx+2 $0000,y
+ lax+2 $0000,y
+ cpy #$00
+ cmp ($00,x)
+ !byte $c2,$00
+ dcp ($00,x)
+ cpy $00
+ cmp $00
+ dec $00
+ dcp $00
+ iny
+ cmp #$00
+ dex
+ sbx #$00
+ cpy+2 $0000
+ cmp+2 $0000
+ dec+2 $0000
+ dcp+2 $0000
+ bne L11F0
+L11F0 cmp ($00),y
+ !byte $d2
+
+L11F3 dcp ($00),y
+ !byte $d4,$00
+ cmp $00,x
+ dec $00,x
+ dcp $00,x
+ cld
+ cmp $0000,y
+ !byte $da
+ dcp $0000,y
+ !byte $dc,$00,$00
+ cmp+2 $0000,x
+ dec+2 $0000,x
+ dcp+2 $0000,x
+ cpx #$00
+ sbc ($00,x)
+ !byte $e2,$00
+ isc ($00,x)
+ cpx $00
+ sbc $00
+ inc $00
+ isc $00
+ inx
+ sbc #$00
+ nop
+ !byte $eb,$00
+ cpx+2 $0000
+ sbc+2 $0000
+ inc+2 $0000
+ isc+2 $0000
+ beq L1235
+L1235 sbc ($00),y
+ !byte $f2
+
+L1238 isc ($00),y
+ !byte $f4,$00
+ sbc $00,x
+ inc $00,x
+ isc $00,x
+ sed
+ sbc $0000,y
+ !byte $fa
+ isc $0000,y
+ !byte $fc,$00,$00
+ sbc+2 $0000,x
+ inc+2 $0000,x
+ isc+2 $0000,x
diff --git a/SourceGen/SGTestData/Expected/2002-allops-value-65C02_acme.S b/SourceGen/SGTestData/Expected/2002-allops-value-65C02_acme.S
new file mode 100644
index 0000000..e8d66bb
--- /dev/null
+++ b/SourceGen/SGTestData/Expected/2002-allops-value-65C02_acme.S
@@ -0,0 +1,275 @@
+ !cpu 65c02
+* = $1000
+ jsr L1014
+ jsr L108A
+ jsr L10C4
+ jsr L10D8
+ jsr L10F6
+ nop
+ nop
+ nop
+ brk
+
+ !byte $ff
+
+L1014 ora ($ff,x)
+ !byte $02,$ff
+ !byte $03
+ tsb $ff
+ ora $ff
+ asl $ff
+ !byte $07
+ php
+ ora #$ff
+ asl
+ !byte $0b
+ tsb $feff
+ ora $feff
+ asl $feff
+ !byte $0f
+ bpl L1031
+L1031 ora ($ff),y
+ ora ($ff)
+ !byte $13
+ trb $ff
+ ora $ff,x
+ asl $ff,x
+ !byte $17
+ clc
+ ora $feff,y
+ inc
+ !byte $1b
+ trb $feff
+ ora $feff,x
+ asl $feff,x
+ !byte $1f
+ jsr $feff
+ and ($ff,x)
+ !byte $22,$ff
+ !byte $23
+ bit $ff
+ and $ff
+ rol $ff
+ !byte $27
+ plp
+ and #$ff
+ rol
+ !byte $2b
+ bit $feff
+ and $feff
+ rol $feff
+ !byte $2f
+ bmi L106D
+L106D and ($ff),y
+ and ($ff)
+ !byte $33
+ bit $ff,x
+ and $ff,x
+ rol $ff,x
+ !byte $37
+ sec
+ and $feff,y
+ dec
+ !byte $3b
+ bit $feff,x
+ and $feff,x
+ rol $feff,x
+ !byte $3f
+ rti
+
+L108A eor ($ff,x)
+ !byte $42,$ff
+ !byte $43
+ !byte $44,$ff
+ eor $ff
+ lsr $ff
+ !byte $47
+ pha
+ eor #$ff
+ lsr
+ !byte $4b
+ jmp L109E
+
+L109E eor $feff
+ lsr $feff
+ !byte $4f
+ bvc L10A7
+L10A7 eor ($ff),y
+ eor ($ff)
+ !byte $53
+ !byte $54,$ff
+ eor $ff,x
+ lsr $ff,x
+ !byte $57
+ cli
+ eor $feff,y
+ phy
+ !byte $5b
+ !byte $5c,$ff,$fe
+ eor $feff,x
+ lsr $feff,x
+ !byte $5f
+ rts
+
+L10C4 adc ($ff,x)
+ !byte $62,$ff
+ !byte $63
+ stz $ff
+ adc $ff
+ ror $ff
+ !byte $67
+ pla
+ adc #$ff
+ ror
+ !byte $6b
+ jmp ($feff)
+
+L10D8 adc $feff
+ ror $feff
+ !byte $6f
+ bvs L10E1
+L10E1 adc ($ff),y
+ adc ($ff)
+ !byte $73
+ stz $ff,x
+ adc $ff,x
+ ror $ff,x
+ !byte $77
+ sei
+ adc $feff,y
+ ply
+ !byte $7b
+ jmp ($feff,x)
+
+L10F6 adc $feff,x
+ ror $feff,x
+ !byte $7f
+ bra L10FF
+
+L10FF sta ($ff,x)
+ !byte $82,$ff
+ !byte $83
+ sty $ff
+ sta $ff
+ stx $ff
+ !byte $87
+ dey
+ bit #$ff
+ txa
+ !byte $8b
+ sty $feff
+ sta $feff
+ stx $feff
+ !byte $8f
+ bcc L111C
+L111C sta ($ff),y
+ sta ($ff)
+ !byte $93
+ sty $ff,x
+ sta $ff,x
+ stx $ff,y
+ !byte $97
+ tya
+ sta $feff,y
+ txs
+ !byte $9b
+ stz $feff
+ sta $feff,x
+ stz $feff,x
+ !byte $9f
+ ldy #$ff
+ lda ($ff,x)
+ ldx #$ff
+ !byte $a3
+ ldy $ff
+ lda $ff
+ ldx $ff
+ !byte $a7
+ tay
+ lda #$ff
+ tax
+ !byte $ab
+ ldy $feff
+ lda $feff
+ ldx $feff
+ !byte $af
+ bcs L1157
+L1157 lda ($ff),y
+ lda ($ff)
+ !byte $b3
+ ldy $ff,x
+ lda $ff,x
+ ldx $ff,y
+ !byte $b7
+ clv
+ lda $feff,y
+ tsx
+ !byte $bb
+ ldy $feff,x
+ lda $feff,x
+ ldx $feff,y
+ !byte $bf
+ cpy #$ff
+ cmp ($ff,x)
+ !byte $c2,$ff
+ !byte $c3
+ cpy $ff
+ cmp $ff
+ dec $ff
+ !byte $c7
+ iny
+ cmp #$ff
+ dex
+ !byte $cb
+ cpy $feff
+ cmp $feff
+ dec $feff
+ !byte $cf
+ bne L1192
+L1192 cmp ($ff),y
+ cmp ($ff)
+ !byte $d3
+ !byte $d4,$ff
+ cmp $ff,x
+ dec $ff,x
+ !byte $d7
+ cld
+ cmp $feff,y
+ phx
+ !byte $db
+ !byte $dc,$ff,$fe
+ cmp $feff,x
+ dec $feff,x
+ !byte $df
+ cpx #$ff
+ sbc ($ff,x)
+ !byte $e2,$ff
+ !byte $e3
+ cpx $ff
+ sbc $ff
+ inc $ff
+ !byte $e7
+ inx
+ sbc #$ff
+ nop
+ !byte $eb
+ cpx $feff
+ sbc $feff
+ inc $feff
+ !byte $ef
+ beq L11CD
+L11CD sbc ($ff),y
+ sbc ($ff)
+ !byte $f3
+ !byte $f4,$ff
+ sbc $ff,x
+ inc $ff,x
+ !byte $f7
+ sed
+ sbc $feff,y
+ plx
+ !byte $fb
+ !byte $fc,$ff,$fe
+ sbc $feff,x
+ inc $feff,x
+ !byte $ff
diff --git a/SourceGen/SGTestData/Expected/2003-allops-zero-65C02_acme.S b/SourceGen/SGTestData/Expected/2003-allops-zero-65C02_acme.S
new file mode 100644
index 0000000..cc3b4a9
--- /dev/null
+++ b/SourceGen/SGTestData/Expected/2003-allops-zero-65C02_acme.S
@@ -0,0 +1,275 @@
+ !cpu 65c02
+* = $1000
+ jsr L1014
+ jsr L108A
+ jsr L10C4
+ jsr L10D8
+ jsr L10F6
+ nop
+ nop
+ nop
+ brk
+
+ !byte $00
+
+L1014 ora ($00,x)
+ !byte $02,$00
+ !byte $03
+ tsb $00
+ ora $00
+ asl $00
+ !byte $07
+ php
+ ora #$00
+ asl
+ !byte $0b
+ tsb+2 $0000
+ ora+2 $0000
+ asl+2 $0000
+ !byte $0f
+ bpl L1031
+L1031 ora ($00),y
+ ora ($00)
+ !byte $13
+ trb $00
+ ora $00,x
+ asl $00,x
+ !byte $17
+ clc
+ ora $0000,y
+ inc
+ !byte $1b
+ trb+2 $0000
+ ora+2 $0000,x
+ asl+2 $0000,x
+ !byte $1f
+ jsr $0000
+ and ($00,x)
+ !byte $22,$00
+ !byte $23
+ bit $00
+ and $00
+ rol $00
+ !byte $27
+ plp
+ and #$00
+ rol
+ !byte $2b
+ bit+2 $0000
+ and+2 $0000
+ rol+2 $0000
+ !byte $2f
+ bmi L106D
+L106D and ($00),y
+ and ($00)
+ !byte $33
+ bit $00,x
+ and $00,x
+ rol $00,x
+ !byte $37
+ sec
+ and $0000,y
+ dec
+ !byte $3b
+ bit+2 $0000,x
+ and+2 $0000,x
+ rol+2 $0000,x
+ !byte $3f
+ rti
+
+L108A eor ($00,x)
+ !byte $42,$00
+ !byte $43
+ !byte $44,$00
+ eor $00
+ lsr $00
+ !byte $47
+ pha
+ eor #$00
+ lsr
+ !byte $4b
+ jmp L109E
+
+L109E eor+2 $0000
+ lsr+2 $0000
+ !byte $4f
+ bvc L10A7
+L10A7 eor ($00),y
+ eor ($00)
+ !byte $53
+ !byte $54,$00
+ eor $00,x
+ lsr $00,x
+ !byte $57
+ cli
+ eor $0000,y
+ phy
+ !byte $5b
+ !byte $5c,$00,$00
+ eor+2 $0000,x
+ lsr+2 $0000,x
+ !byte $5f
+ rts
+
+L10C4 adc ($00,x)
+ !byte $62,$00
+ !byte $63
+ stz $00
+ adc $00
+ ror $00
+ !byte $67
+ pla
+ adc #$00
+ ror
+ !byte $6b
+ jmp ($0000)
+
+L10D8 adc+2 $0000
+ ror+2 $0000
+ !byte $6f
+ bvs L10E1
+L10E1 adc ($00),y
+ adc ($00)
+ !byte $73
+ stz $00,x
+ adc $00,x
+ ror $00,x
+ !byte $77
+ sei
+ adc $0000,y
+ ply
+ !byte $7b
+ jmp ($0000,x)
+
+L10F6 adc+2 $0000,x
+ ror+2 $0000,x
+ !byte $7f
+ bra L10FF
+
+L10FF sta ($00,x)
+ !byte $82,$00
+ !byte $83
+ sty $00
+ sta $00
+ stx $00
+ !byte $87
+ dey
+ bit #$00
+ txa
+ !byte $8b
+ sty+2 $0000
+ sta+2 $0000
+ stx+2 $0000
+ !byte $8f
+ bcc L111C
+L111C sta ($00),y
+ sta ($00)
+ !byte $93
+ sty $00,x
+ sta $00,x
+ stx $00,y
+ !byte $97
+ tya
+ sta $0000,y
+ txs
+ !byte $9b
+ stz+2 $0000
+ sta+2 $0000,x
+ stz+2 $0000,x
+ !byte $9f
+ ldy #$00
+ lda ($00,x)
+ ldx #$00
+ !byte $a3
+ ldy $00
+ lda $00
+ ldx $00
+ !byte $a7
+ tay
+ lda #$00
+ tax
+ !byte $ab
+ ldy+2 $0000
+ lda+2 $0000
+ ldx+2 $0000
+ !byte $af
+ bcs L1157
+L1157 lda ($00),y
+ lda ($00)
+ !byte $b3
+ ldy $00,x
+ lda $00,x
+ ldx $00,y
+ !byte $b7
+ clv
+ lda $0000,y
+ tsx
+ !byte $bb
+ ldy+2 $0000,x
+ lda+2 $0000,x
+ ldx+2 $0000,y
+ !byte $bf
+ cpy #$00
+ cmp ($00,x)
+ !byte $c2,$00
+ !byte $c3
+ cpy $00
+ cmp $00
+ dec $00
+ !byte $c7
+ iny
+ cmp #$00
+ dex
+ !byte $cb
+ cpy+2 $0000
+ cmp+2 $0000
+ dec+2 $0000
+ !byte $cf
+ bne L1192
+L1192 cmp ($00),y
+ cmp ($00)
+ !byte $d3
+ !byte $d4,$00
+ cmp $00,x
+ dec $00,x
+ !byte $d7
+ cld
+ cmp $0000,y
+ phx
+ !byte $db
+ !byte $dc,$00,$00
+ cmp+2 $0000,x
+ dec+2 $0000,x
+ !byte $df
+ cpx #$00
+ sbc ($00,x)
+ !byte $e2,$00
+ !byte $e3
+ cpx $00
+ sbc $00
+ inc $00
+ !byte $e7
+ inx
+ sbc #$00
+ nop
+ !byte $eb
+ cpx+2 $0000
+ sbc+2 $0000
+ inc+2 $0000
+ !byte $ef
+ beq L11CD
+L11CD sbc ($00),y
+ sbc ($00)
+ !byte $f3
+ !byte $f4,$00
+ sbc $00,x
+ inc $00,x
+ !byte $f7
+ sed
+ sbc $0000,y
+ plx
+ !byte $fb
+ !byte $fc,$00,$00
+ sbc+2 $0000,x
+ inc+2 $0000,x
+ !byte $ff
diff --git a/SourceGen/SGTestData/Expected/2004-numeric-types_acme.S b/SourceGen/SGTestData/Expected/2004-numeric-types_acme.S
new file mode 100644
index 0000000..be6ed0c
--- /dev/null
+++ b/SourceGen/SGTestData/Expected/2004-numeric-types_acme.S
@@ -0,0 +1,31 @@
+;Project file was edited to get all big-endian data types.
+ !cpu 6502
+* = $1000
+ rts
+
+ !byte $11
+ !word $1122
+ !24 $112233
+ !32 $11223344
+ !byte $11
+ !byte $11,$22
+ !byte $11,$22,$33
+ !byte $11,$22,$33,$44
+ !fill 2,$00
+ !byte $80
+ !fill 3,$00
+ !byte $80
+ !fill 4,$00
+ !byte $80
+ !fill 5,$00
+ !byte $80
+ !fill 256,$00
+ !byte $80
+ !fill 257,$cc
+ !hex 11
+ !byte $80
+ !hex 11223344556677889900
+ !byte $80
+LABEL !hex 00112233445566778899aabbccddeeff00112233445566778899aabbccddeeff ;comment
+ !hex 00112233445566778899aabbccddeeffffeeddccbbaa99887766554433221100
+ !byte $80
diff --git a/SourceGen/SGTestData/Expected/2005-string-types_acme.S b/SourceGen/SGTestData/Expected/2005-string-types_acme.S
new file mode 100644
index 0000000..63f27cc
--- /dev/null
+++ b/SourceGen/SGTestData/Expected/2005-string-types_acme.S
@@ -0,0 +1,145 @@
+;Project file was edited to get zero-length strings and reverse DCI.
+ !cpu 6502
+* = $1000
+ rts
+
+ !text "low ASCII str"
+ !byte $80
+ !hex e8e9e7e8a0c1d3c3c9c9a0f3f4f2
+ !byte $80
+ !text "'low'quoted",$22,"''text"
+ !byte $80
+ !hex a2e8e9e7e8a2f1f5eff4e5e4a7a2a2f4e5f8f4
+ !byte $80
+ !text "01234567890123456789012345678901234567890123456789012345678901"
+ !text "234567890123456789"
+ !byte $80
+ !text "0123456789012345678901234567890123456789012345678901234567'''"
+ !byte $80
+ !text "01234567890123456789012345678901234567890123456789012345678'''"
+ !byte $80
+ !text "012345678901234567890123456789012345678901234567890123456789''"
+ !text "'"
+ !byte $80
+ !text "0123456789012345678901234567890123456789012345678901234567890'"
+ !text "''"
+ !byte $80
+ !text "01234567890123456789012345678901234567890123456789012345678901"
+ !text "'''"
+ !byte $80
+ !text "012345678901234567890123456789012345678901234567890167",$22,$22
+ !text $22
+ !byte $80
+ !text "0123456789012345678901234567890123456789012345678901678",$22
+ !text $22,$22
+ !byte $80
+ !text "01234567890123456789012345678901234567890123456789016789",$22
+ !text $22,$22
+ !byte $80
+ !text "012345678901234567890123456789012345678901234567890167890",$22
+ !text $22,$22
+ !byte $80
+ !text "0123456789012345678901234567890123456789012345678901678901",$22
+ !text $22,$22
+ !byte $81
+ !fill 62,$aa
+ !byte $80
+ !fill 96,$aa
+ !byte $81
+ !text "ver IICSA wol"
+ !byte $80
+ !hex f6e5f2a0c9c9c3d3c1a0e8e7e9e8
+ !byte $80
+ !text ".eeht rof sllot ti ;sllot lleb eht mohw rof wonk ot dnes reven"
+ !text " erofereht dna ,dniknam ni devlovni ma I esuaceb ,em sehsinimi"
+ !text "d htaed snam ynA .erew nwo eniht fo ro sdneirf yht fo ronam a"
+ !text " fi sa llew sA .erew yrotnomorp a fi sa llew sA .ssel eht si e"
+ !text "poruE ,aes eht yb yawa dehsaw eb dolc a fI .niam eht fo trap "
+ !text "a ,tnenitnoc eht fo eceip a si nam yreve ;flesti fo eritne ,dn"
+ !text "alsi na si nam oN"
+ !byte $81
+ !text $00
+ !byte $80
+ !text "low ASCII strz",$00
+ !byte $80
+ !hex e8e9e7e8a0c1d3c3c9c9a0f3f4f2fa00
+ !byte $80
+ !text "'low'quoted",$22,"''text",$00
+ !byte $80
+ !hex a2e8e9e7e8a2f1f5eff4e5e4a7a2a2f4e5f8f400
+ !byte $80
+ !text "012345678901234567890123456789012345678901234567890123456789''"
+ !text "'",$00
+ !byte $80
+ !text "01234567890123456789012345678901234567890123456789012345678901"
+ !text "234567890123456789",$00
+ !byte $81
+ !text $00
+ !byte $80
+ !text $0e,"low ASCII str1"
+ !byte $80
+ !hex 0fe8e9e7e8a0c1d3c3c9c9a0f3f4f2b1
+ !byte $80
+ !text $12,"'low'quoted",$22,"''text"
+ !byte $80
+ !hex 13a2e8e9e7e8a2f1f5eff4e5e4a7a2a2f4e5f8f4
+ !byte $80
+ !text $3f,"0123456789012345678901234567890123456789012345678901234567"
+ !text "89'''"
+ !byte $80
+ !text $50,"0123456789012345678901234567890123456789012345678901234567"
+ !text "8901234567890123456789"
+ !byte $81
+ !text $00,$00
+ !byte $80
+ !text $0e,$00,"low ASCII str2"
+ !byte $80
+ !hex 0f00e8e9e7e8a0c1d3c3c9c9a0f3f4f2b2
+ !byte $80
+ !text $12,$00,"'low'quoted",$22,"''text"
+ !byte $80
+ !hex 1300a2e8e9e7e8a2f1f5eff4e5e4a7a2a2f4e5f8f4
+ !byte $80
+ !text $3f,$00,"012345678901234567890123456789012345678901234567890123"
+ !text "456789'''"
+ !byte $80
+ !text $50,$00,"012345678901234567890123456789012345678901234567890123"
+ !text "45678901234567890123456789"
+ !byte $80
+ !text $85,$01,"No man is an island, entire of itself; every man is a "
+ !text "piece of the continent, a part of the main. If a clod be wash"
+ !text "ed away by the sea, Europe is the less. As well as if a promon"
+ !text "tory were. As well as if a manor of thy friends or of thine ow"
+ !text "n were. Any mans death diminishes me, because I am involved i"
+ !text "n mankind, and therefore never send to know for whom the bell "
+ !text "tolls; it tolls for thee."
+ !byte $81
+ !text "low ASCII dc",$e9
+ !byte $80
+ !hex e8e9e7e8a0c1d3c3c9c9a0e4e369
+ !byte $80
+ !text "'low'quoted",$22,"''tex",$f4
+ !byte $80
+ !hex a2e8e9e7e8a2f1f5eff4e5e4a7a2a2f4e5f874
+ !byte $80
+ !text "012345678901234567890123456789012345678901234567890123456789''"
+ !text $a7
+ !byte $80
+ !text "01234567890123456789012345678901234567890123456789012345678901"
+ !text "23456789012345678",$b9
+ !byte $81
+ !text $f2,"icd IICSA wol"
+ !byte $80
+ !hex 72e9e3e4a0c9c9c3d3c1a0e8e7e9e8
+ !byte $80
+ !text $b9,"8765432109876543210987654321098765432109876543210987654321"
+ !text "098765432109876543210"
+ !byte $80
+ !text $ae,"eeht rof sllot ti ;sllot lleb eht mohw rof wonk ot dnes re"
+ !text "ven erofereht dna ,dniknam ni devlovni ma I esuaceb ,em sehsin"
+ !text "imid htaed snam ynA .erew nwo eniht fo ro sdneirf yht fo rona"
+ !text "m a fi sa llew sA .erew yrotnomorp a fi sa llew sA .ssel eht s"
+ !text "i eporuE ,aes eht yb yawa dehsaw eb dolc a fI .niam eht fo tr"
+ !text "ap a ,tnenitnoc eht fo eceip a si nam yreve ;flesti fo eritne "
+ !text ",dnalsi na si nam oN"
+ !byte $81
diff --git a/SourceGen/SGTestData/Expected/2006-operand-formats_acme.S b/SourceGen/SGTestData/Expected/2006-operand-formats_acme.S
new file mode 100644
index 0000000..c9829e2
--- /dev/null
+++ b/SourceGen/SGTestData/Expected/2006-operand-formats_acme.S
@@ -0,0 +1,65 @@
+;Project file was edited for some ASCII operands.
+ !cpu 65816
+* = $1000
+ !as
+ !rs
+ clc
+ xce
+ sep #$30
+ lda $01
+ lda $0102
+ lda+3 $010203
+ lda 1
+ lda 258
+ lda+3 66051
+ lda %00000001
+ lda %0000000100000010
+ lda+3 %000000010000001000000011
+ bra skipdata
+
+ !byte $01
+ !word $0201
+ !24 $030201
+ !32 $04030201
+ !byte 1
+ !word 513
+ !24 197121
+ !32 67305985
+ !byte %00000001
+ !word %0000001000000001
+ !24 %000000110000001000000001
+ !32 %00000100000000110000001000000001
+
+skipdata lda #'h'
+ lda 'h'
+ lda+2 'h'
+ lda+3 'h'
+ lda #$1f
+ lda #' '
+ lda #'~'
+ lda #$7f
+ lda #$80
+ lda #$9f
+ lda #$a0
+ lda #$fe
+ lda #$ff
+ rep #'0'
+ !al
+ !rl
+ lda #'h'
+ lda #$c8
+ lda #$6868
+ rts
+
+more_ascii !byte 'h'
+ !byte $80
+ !word $6868
+ !byte $80
+ !word skipdata
+ !24 skipdata
+ !byte $10,$3f
+ !byte more_ascii
+ !word more_ascii
+ !24 more_ascii
+ !byte $10,$68
diff --git a/SourceGen/SGTestData/Expected/2007-labels-and-symbols_acme.S b/SourceGen/SGTestData/Expected/2007-labels-and-symbols_acme.S
new file mode 100644
index 0000000..f766091
--- /dev/null
+++ b/SourceGen/SGTestData/Expected/2007-labels-and-symbols_acme.S
@@ -0,0 +1,24 @@
+;ACME can't handle 65816 code that lives outside bank zero
+* = $012345
+ !hex 18fbe230a9cda9dda90da9eda9fea92da9ffa929a910a9e9a90fa945a923a901
+ !hex f4edfef44523f40100f45634f41200f4edfef44523f40100f45634f41200a5ce
+ !hex adce00afce0000adecfeafecfe00adeefeafeefe00ad4623af462301ad4423af
+ !hex 442301ad5734af573412ad5534af553412c230a9cd00a9dd00a90d01a92910a9
+ !hex 1000a92900a90000a90000a9edfea9fe00a9ed0ea90e01a90100a94523a92301
+ !hex a90100a95634a93412a912008050cdedfe452301cd002910100029000000edfe
+ !hex fe00ed0e0e01452323010100462323010100feedcd0000edfe00fe0000452301
+ !hex 230100010000cd000000edfe0000fe000000442301002301000001000000a911
+ !hex 0054011244120154011244120162eeff8200005c001000eaeaeae230ad0030ad
+ !hex 0031ad0032ad00338039eaeaea62faff62f8ff62f6ff20131020141020151080
+ !hex e980e880e782e2ff82e0ff82deff4c13104c14104c15105c1310005c1410005c
+ !hex 151000201610202810202a10202c10202e10203110203410203710203a10203d
+ !hex 10204010204410204810821801808182838485868788898a8b8c8d8e8f808182
+ !hex 838485868788898a8b8c8d8e8f808182838485868788898a8b8c8d8e8f808182
+ !hex 838485868788898a8b8c8d8e8f808182838485868788898a8b8c8d8e8f808182
+ !hex 838485868788898a8b8c8d8e8f808182838485868788898a8b8c8d8e8f546869
+ !hex 732069732061206c6f6e6720737472696e672e205075742061206c6162656c20
+ !hex 616e6420636f6d6d656e74206f6e20697420746f20636f6e6669726d20746861
+ !hex 7420746865206c6162656c20616e6420636f6d6d656e74206f6e6c7920617070
+ !hex 656172206f6e20746865206669727374206c696e652e20205468652071756963
+ !hex 6b2062726f776e20666f78206a756d7073206f76657220746865206c617a7920
+ !hex 646f67732ea97aa959a934c230a97b56a95a34a9341260
diff --git a/SourceGen/SGTestData/Expected/2008-address-changes_acme.S b/SourceGen/SGTestData/Expected/2008-address-changes_acme.S
new file mode 100644
index 0000000..02d34e5
--- /dev/null
+++ b/SourceGen/SGTestData/Expected/2008-address-changes_acme.S
@@ -0,0 +1,123 @@
+ !cpu 65816
+* = $1000
+ !as
+ !rs
+ clc
+ xce
+ sep #$ff
+ jsr L1100
+ jsr L1107
+ jmp L2000
+
+ !pseudopc $1100 {
+L1100 bit L1100
+L1103 lda #$11
+ ldx #$11
+L1107 ldy #$11
+ per L1103
+ bra L1103
+
+ } ;!pseudopc
+ !pseudopc $1100 {
+L1100_0 bit L1100_0
+ lda #$22
+L1105 ldx #$22
+ ldy #$22
+ per L1105
+ jmp L1105
+
+ } ;!pseudopc
+ !pseudopc $1100 {
+L1100_1 bit L1100_1
+ lda #$33
+ ldx #$33
+L1107_0 ldy #$33
+ per L1107_0
+ bra L1107_0
+
+ } ;!pseudopc
+ !pseudopc $2000 {
+L2000 bit L2000
+ beq $2018
+ bra L2020
+
+ } ;!pseudopc
+ !pseudopc $2020 {
+L2020 bit L2020
+ beq offend+1
+ brl L2080
+
+offend nop
+ } ;!pseudopc
+ !pseudopc $2080 {
+L2080 bit L2080
+ lda offend
+ jsr offend
+ lda offend+1
+ jsr offend+1
+ lda $207f
+ jsr $207f
+ lda L2080
+ jsr L2080
+ lda $00
+ beq L2100
+ !byte $ad
+
+ } ;!pseudopc
+ !pseudopc $2100 {
+L2100 nop
+ nop
+ jmp L3000
+
+ } ;!pseudopc
+ !pseudopc $2800 {
+ !byte $00
+ !byte $28
+ !fill 14,$00
+ } ;!pseudopc
+ !pseudopc $2820 {
+ !fill 18,$00
+
+ } ;!pseudopc
+ !pseudopc $3000 {
+L3000 bit L3000
+ lda #$44
+ ldx #$44
+ ldy #$44
+ brl fwd
+
+ulabel !byte $00
+ !byte $01
+ } ;!pseudopc
+ !pseudopc $3100 {
+L3100 !byte $02
+
+fwd bit fwd
+ lda ulabel
+ lda ulabel+1
+ lda ulabel+2
+ lda $300f
+ lda L3100
+ beq L3182
+ !byte $ea
+ !byte $ea
+ } ;!pseudopc
+ !pseudopc $3180 {
+ !byte $00
+ !byte $01
+
+L3182 bit L3182
+ lda label1
+ lda label1+1
+ lda label1+112
+ bra L3200
+
+label1 !byte $ea
+ !byte $ea
+
+ } ;!pseudopc
+ !pseudopc $3200 {
+L3200 bit L3200
+ !byte $00
+ !byte $01
+ } ;!pseudopc
diff --git a/SourceGen/SGTestData/Expected/2009-branches-and-banks_acme.S b/SourceGen/SGTestData/Expected/2009-branches-and-banks_acme.S
new file mode 100644
index 0000000..448ce21
--- /dev/null
+++ b/SourceGen/SGTestData/Expected/2009-branches-and-banks_acme.S
@@ -0,0 +1,6 @@
+;ACME can't handle 65816 code that lives outside bank zero
+* = $1000
+ !hex 18fbe2304c00002c0000a500a503d0ba30b862b5ff9006826d00000102a51482
+ !hex a5ff2c80005c0000442cc0ff823d00cf000044af000044ad0000a50030f562b2
+ !hex ffd0b082a9ff1700170044cfc0ff44f005303c8239005c0020002c0020f41700
+ !hex f44400d003dc1300ea201220201520200f202256341260
diff --git a/SourceGen/SGTestData/Expected/2010-target-adjustment_acme.S b/SourceGen/SGTestData/Expected/2010-target-adjustment_acme.S
new file mode 100644
index 0000000..542536b
--- /dev/null
+++ b/SourceGen/SGTestData/Expected/2010-target-adjustment_acme.S
@@ -0,0 +1,60 @@
+ !cpu 65816
+* = $1000
+ !as
+ !rs
+load11 lda #$11
+L1002 ldx #$22
+load33 ldy #$33
+L1006 lda #$44
+predat bra L1042
+
+ !word $0123
+dat1 !word $4567
+ !word $89ab
+L1010 !word $cdef
+L1012 !word $0011
+L1014 !word $2233
+ !byte $80
+ !text "The quick brown fox"
+ !byte $80
+ !word L1042
+ !word L1041
+ !word L1042+1
+fill0 !fill 16,$00
+L1041 !byte $80
+
+L1042 lda predat+2
+ lda L1041
+ asl dat1
+ rol dat1+2
+ ror L1010
+ and L1012
+ ora L1014
+ lda fill0
+ sta fill0+4
+ lda fill0+8
+ sta fill0+12
+ jsr L1002
+ lda L1006
+L1069 pea L1069-1
+ per L1069-1
+ lda L1069+1
+ lda L1069+2
+ lda #$ea
+L1077 sta L1077
+L107A sta L107A+1
+ sta $107f
+ brl L2002
+
+ !byte $80
+dat81 !byte $81
+ !pseudopc $2000 {
+L2000 !byte $82
+ !byte $83
+
+L2002 bit L2002
+ lda dat81
+ lda L2000
+ rts
+
+ } ;!pseudopc
diff --git a/SourceGen/SGTestData/Expected/2011-hinting_acme.S b/SourceGen/SGTestData/Expected/2011-hinting_acme.S
new file mode 100644
index 0000000..9091181
--- /dev/null
+++ b/SourceGen/SGTestData/Expected/2011-hinting_acme.S
@@ -0,0 +1,35 @@
+ !cpu 6502
+* = $1000
+ !byte $03
+ !byte $02
+
+L1002 bit L1002
+ !byte $2c
+ lda #$11
+ nop
+ !byte $2c
+L100A ldx #$ff
+ nop
+ jsr L100A
+ nop
+ !byte $2c
+L1012 ldx #$ff
+ nop
+ jsr L1012
+ jsr $2456
+L101B !32 $22a211a9
+ jsr L101B
+ jsr L1028
+ jsr $2456
+L1028 !32 $44a233a9
+ jsr L1037
+ jsr L103A
+ nop
+ lda $2456
+ rts
+
+L1037 jsr $2456
+L103A lda #$55
+ ldx #$66
+ rts
+
diff --git a/SourceGen/SGTestData/Expected/2012-label-localizer_acme.S b/SourceGen/SGTestData/Expected/2012-label-localizer_acme.S
new file mode 100644
index 0000000..a7d7845
--- /dev/null
+++ b/SourceGen/SGTestData/Expected/2012-label-localizer_acme.S
@@ -0,0 +1,59 @@
+ !cpu 65816
+REALLYLONGLABELNAME = $8888 ;that's a long name
+
+* = $1000
+ !as
+ !rs
+ nop
+_start lda @start
+ lda X_start
+ lda pastglob
+ lda @__nopped
+@start nop
+@__nopped
+ nop
+X_start nop
+pastglob
+ nop
+ lda nlocal
+nlocal lda #$11
+reach1G nop
+ lda reach1G+1
+ lda @reach2+2
+@reach2 nop
+reach3G nop
+@_reach4
+ nop
+ lda @_reach4-2
+ lda $00
+ beq @L102D
+ jsr @_reach4
+ jsr _start
+@L102D lda #$22
+ lda gtest2
+gtest1 nop
+ lda gtest3
+gtest2 nop
+gtest3 nop
+ lda #$33
+ lda $1041
+topglob nop
+ lda @L1043
+ nop
+ nop
+@L1043 nop
+ lda #$44
+globalnm
+ jsr @L104A
+ nop
+@L104A nop
+ nop
+nglobal nop
+globlat jsr nglobal
+ bra end
+
+end nop
+EXCESSIVELY_LONG_LABEL
+ lda REALLYLONGLABELNAME
+ rts
+
diff --git a/SourceGen/SGTestData/Expected/2013-notes-and-comments_acme.S b/SourceGen/SGTestData/Expected/2013-notes-and-comments_acme.S
new file mode 100644
index 0000000..9d9155b
--- /dev/null
+++ b/SourceGen/SGTestData/Expected/2013-notes-and-comments_acme.S
@@ -0,0 +1,71 @@
+;***************************************
+;* Old school boxed output header. *
+;* Brk *
+;* multiple lines yay. How about a *
+;* hy-phenated word? *
+;* Looonglonglonglonglonglonglonglongl *
+;* onglonglongword. *
+;***************************************
+;* Throw in a line divider. These *
+;* aren't: *
+;* *! *
+;* * *
+;* &XYZ *
+;* *
+;***************************************
+ !cpu 6502
+plataddr = $3000 ;address only in platform file
+
+;Short, unboxed comment here!!
+; Two spaces after. More hyp-
+;hens?
+* = $1000
+ lda #$01 ;Comment!
+;Comment rulers can be helpful in findin the edges of notes. Comments are hyph-
+;enatingly fun. Like the note, this goes out to 80 columns.
+ lda #$02 ;&another comment with &&s!
+;Down to 64 columns this time. Why 64? Why not 64. A rose, by
+;any other name, would break the line at the same place. Or hy-
+;phen split.
+ lda #$03
+;Ah, the classic 40-column limitation...
+;brings back memories. Of, you know, h-
+;yphenated things.
+ lda #$04
+;Thirty columns. 'cause forty
+;felt like too many. Oh, hyp-
+;henation!
+ lda #$05
+;*******************************************************************************
+;* Short box comment, 80 cols. *
+;*******************************************************************************
+ lda #$06
+;***************************************************************
+;* *
+;* Choppy *
+;* *
+;* box *
+;* *
+;* comment *
+;* *
+;* 64 cols *
+;* *
+;***************************************************************
+ lda #$07
+;*****************************
+;* Some non-ASCII stuff: *
+;* †•�␇ *
+;*****************************
+ lda #$08
+ lda #$09
+ lda #$0a
+ lda #$0b
+ lda #$0c
+ lda #$0d
+ lda #$0e
+ lda #$0f
+ bit plataddr ;Pull in plataddr to see the comment on the platform file entry.
+ rts
+
+bytes !hex 000102030405060708090a0b0c0d0e0f000102030405060708090a0b0c0d0e0f ;Comment at the end of a lengthy bulk hex item might overflow various things, but could be wrapped.
+ !hex 000102030405060708090a0b0c0d0e0f000102030405060708090a0b0c0d0e0f
diff --git a/SourceGen/SGTestData/Expected/2014-label-dp_acme.S b/SourceGen/SGTestData/Expected/2014-label-dp_acme.S
new file mode 100644
index 0000000..6c8e287
--- /dev/null
+++ b/SourceGen/SGTestData/Expected/2014-label-dp_acme.S
@@ -0,0 +1,295 @@
+;6502bench SourceGen v1.1.0-dev1
+ !cpu 65816
+* = $1000
+ !as
+ !rs
+ sec
+ xce
+ jsr L101F
+ jsr L10AB
+ jsr L10F2
+ jsr L1106
+ jsr L1109
+ jsr L112C
+ jsr L11F9
+ jsr L11FC
+ nop
+ nop
+ nop
+ brk
+
+ !byte $80
+
+L101F ora (L0080,x)
+ cop $80
+ ora $80,S
+ tsb+1 L0080
+ ora+1 L0080
+ asl+1 L0080
+ ora [L0080]
+ php
+ ora #$80
+ asl
+ phd
+ tsb+2 L0086
+ ora+2 L0086
+ asl+2 L0086
+ ora+3 L0089
+ bpl L1041
+L1041 ora (L0080),y
+ ora (L0080)
+ ora ($80,S),y
+ trb+1 L0080
+ ora+1 L0080,x
+ asl+1 L0080,x
+ ora [L0080],y
+ clc
+ ora L0086,y
+ inc
+ tcs
+ trb+2 L0086
+ ora+2 L0086,x
+ asl+2 L0086,x
+ ora+3 L0089,x
+ jsr L0086
+ and (L0080,x)
+ jsl L0089
+ and $80,S
+ bit+1 L0080
+ and+1 L0080
+ rol+1 L0080
+ and [L0080]
+ plp
+ and #$80
+ rol
+ pld
+ bit+2 L0086
+ and+2 L0086
+ rol+2 L0086
+ and+3 L0089
+ bmi L1089
+L1089 and (L0080),y
+ and (L0080)
+ and ($80,S),y
+ bit+1 L0080,x
+ and+1 L0080,x
+ rol+1 L0080,x
+ and [L0080],y
+ sec
+ and L0086,y
+ dec
+ tsc
+ bit+2 L0086,x
+ and+2 L0086,x
+ rol+2 L0086,x
+ and+3 L0089,x
+ rti
+
+L10AB eor (L0080,x)
+ !byte $42,$80
+ eor $80,S
+ mvp $84,$83
+ eor+1 L0080
+ lsr+1 L0080
+ eor [L0080]
+ pha
+ eor #$80
+ lsr
+ phk
+ jmp L10C2
+
+L10C2 eor+2 L0086
+ lsr+2 L0086
+ eor+3 L0089
+ bvc L10CE
+L10CE eor (L0080),y
+ eor (L0080)
+ eor ($80,S),y
+ mvn $84,$83
+ eor+1 L0080,x
+ lsr+1 L0080,x
+ eor [L0080],y
+ cli
+ eor L0086,y
+ phy
+ tcd
+ jml L10E7
+
+L10E7 eor+2 L0086,x
+ lsr+2 L0086,x
+ eor+3 L0089,x
+ rts
+
+L10F2 adc (L0080,x)
+ per $0ff6
+ adc $80,S
+ stz+1 L0080
+ adc+1 L0080
+ ror+1 L0080
+ adc [L0080]
+ pla
+ adc #$80
+ ror
+ rtl
+
+L1106 jmp (L0086)
+
+L1109 adc+2 L0086
+ ror+2 L0086
+ adc+3 L0089
+ bvs L1115
+L1115 adc (L0080),y
+ adc (L0080)
+ adc ($80,S),y
+ stz+1 L0080,x
+ adc+1 L0080,x
+ ror+1 L0080,x
+ adc [L0080],y
+ sei
+ adc L0086,y
+ ply
+ tdc
+ jmp (L0086,x)
+
+L112C adc+2 L0086,x
+ ror+2 L0086,x
+ adc+3 L0089,x
+ bra L1138
+
+L1138 sta (L0080,x)
+ brl L113D
+
+L113D sta $80,S
+ sty+1 L0080
+ sta+1 L0080
+ stx+1 L0080
+ sta [L0080]
+ dey
+ bit #$80
+ txa
+ phb
+ sty+2 L0086
+ sta+2 L0086
+ stx+2 L0086
+ sta+3 L0089
+ bcc L115B
+L115B sta (L0080),y
+ sta (L0080)
+ sta ($80,S),y
+ sty+1 L0080,x
+ sta+1 L0080,x
+ stx+1 L0080,y
+ sta [L0080],y
+ tya
+ sta L0086,y
+ txs
+ txy
+ stz+2 L0086
+ sta+2 L0086,x
+ stz+2 L0086,x
+ sta+3 L0089,x
+ ldy #$80
+ lda (L0080,x)
+ ldx #$80
+ lda $80,S
+ ldy+1 L0080
+ lda+1 L0080
+ ldx+1 L0080
+ lda [L0080]
+ tay
+ lda #$80
+ tax
+ plb
+ ldy+2 L0086
+ lda+2 L0086
+ ldx+2 L0086
+ lda+3 L0089
+ bcs L11A0
+L11A0 lda (L0080),y
+ lda (L0080)
+ lda ($80,S),y
+ ldy+1 L0080,x
+ lda+1 L0080,x
+ ldx+1 L0080,y
+ lda [L0080],y
+ clv
+ lda L0086,y
+ tsx
+ tyx
+ ldy+2 L0086,x
+ lda+2 L0086,x
+ ldx+2 L0086,y
+ lda+3 L0089,x
+ cpy #$80
+ cmp (L0080,x)
+ rep #$00
+ cmp $80,S
+ cpy+1 L0080
+ cmp+1 L0080
+ dec+1 L0080
+ cmp [L0080]
+ iny
+ cmp #$80
+ dex
+ wai
+ cpy+2 L0086
+ cmp+2 L0086
+ dec+2 L0086
+ cmp+3 L0089
+ bne L11E5
+L11E5 cmp (L0080),y
+ cmp (L0080)
+ cmp ($80,S),y
+ pei (L0080)
+ cmp+1 L0080,x
+ dec+1 L0080,x
+ cmp [L0080],y
+ cld
+ cmp L0086,y
+ phx
+ stp
+
+L11F9 jml [L0086]
+
+L11FC cmp+2 L0086,x
+ dec+2 L0086,x
+ cmp+3 L0089,x
+ cpx #$80
+ sbc (L0080,x)
+ sep #$00
+ sbc $80,S
+ cpx+1 L0080
+ sbc+1 L0080
+ inc+1 L0080
+ sbc [L0080]
+ inx
+ sbc #$80
+ nop
+ xba
+ cpx+2 L0086
+ sbc+2 L0086
+ inc+2 L0086
+ sbc+3 L0089
+ beq L122A
+L122A sbc (L0080),y
+ sbc (L0080)
+ sbc ($80,S),y
+ pea L0086
+ sbc+1 L0080,x
+ inc+1 L0080,x
+ sbc [L0080],y
+ sed
+ sbc L0086,y
+ plx
+ xce
+ jsr (L0086,x)
+ sbc+2 L0086,x
+ inc+2 L0086,x
+ sbc+3 L0089,x
+ !pseudopc $0080 {
+L0080 bit+1 L0082
+L0082 bit+1 L0082
+ bit+1 L0082
+L0086 bit+2 L0086
+L0089 lda+3 L0089
+ } ;!pseudopc