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204 lines
9.3 KiB
Plaintext
204 lines
9.3 KiB
Plaintext
; Copyright 2018 faddenSoft. All Rights Reserved.
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; See the LICENSE.txt file for distribution terms (Apache 2.0).
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;
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; Sources:
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; NiftyList, by Dave Lyons
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; Various Apple II reference materials found online
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*SYNOPSIS Symbols from the Cxxx I/O area, common to most Apple II models.
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; There's a lot here that you wouldn't find on an Apple ][+, but since
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; this is for a disassembler it's okay to have extra stuff so long as it
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; doesn't conflict.
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KBD < $C000 ;R last key pressed + 128
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CLR80COL > $C000 ;W use $C002-C005 for aux mem (80STOREOFF)
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SET80COL @ $C001 ;W use PAGE2 for aux mem (80STOREON)
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RDMAINRAM @ $C002 ;W if 80STORE off: read main mem $0200-BFFF
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RDCARDRAM @ $C003 ;W if 80STORE off: read aux mem $0200-BFFF
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WRMAINRAM @ $C004 ;W if 80STORE off: write main mem $0200-BFFF
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WRCARDRAM @ $C005 ;W if 80STORE off: write aux mem $0200-BFFF
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SETSLOTCXROM @ $C006 ;W use peripheral ROM ($C100-CFFF)
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SETINTCXROM @ $C007 ;W use internal ROM ($C100-CFFF)
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SETSTDZP @ $C008 ;W use main stack and zero page
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SETALTZP @ $C009 ;W use aux stack and zero page
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SETINTC3ROM @ $C00A ;W use internal slot 3 ROM
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SETSLOTC3ROM @ $C00B ;W use external slot 3 ROM
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CLR80VID @ $C00C ;W disable 80-column display mode
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SET80VID @ $C00D ;W enable 80-column display mode
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CLRALTCHAR @ $C00E ;W use primary char set
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SETALTCHAR @ $C00F ;W use alternate char set
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KBDSTRB @ $C010 ;RW keyboard strobe
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RDLCBNK2 @ $C011 ;R bit 7: reading from LC bank 2 ($Dx)?
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RDLCRAM @ $C012 ;R bit 7: reading from LC RAM?
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RDRAMRD @ $C013 ;R bit 7: reading from aux/alt 48K?
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RDRAMWRT @ $C014 ;R bit 7: writing to aux/alt 48K?
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RDCXROM @ $C015 ;R bit 7: using internal slot ROM?
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RDALTZP @ $C016 ;R bit 7: using alt zero page, stack, & LC?
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RDC3ROM @ $C017 ;R bit 7: using external (slot 3) ROM?
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RD80COL @ $C018 ;R bit 7: 80STORE is on?
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RDVBLBAR @ $C019 ;R bit 7: not VBL (VBL signal is low)?
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RDTEXT @ $C01A ;R bit 7: using text mode?
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RDMIX @ $C01B ;R bit 7: using mixed mode?
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RDPAGE2 @ $C01C ;R bit 7: using page 2?
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RDHIRES @ $C01D ;R bit 7: using hi-res graphics?
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ALTCHARSET @ $C01E ;R bit 7: using alt char set?
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RD80VID @ $C01F ;R bit 7: using 80 columns?
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TAPEOUT @ $C020 ;RW toggle caseette tape output
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MONOCOLOR @ $C021 ;W color/mono
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TBCOLOR @ $C022 ;RW screen color (low is BG, high is FG)
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VGCINT @ $C023 ;R VGC interrupts
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MOUSEDATA @ $C024 ;R mouse data: high bit is button
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KEYMODREG @ $C025 ;R modifier key state
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DATAREG @ $C026 ;RW ADB command/data
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KMSTATUS @ $C027 ;RW ADB status
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ROMBANK @ $C028 ;RW ROM bank select (IIc Plus)
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NEWVIDEO @ $C029 ;RW video select (SHR)
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LANGSEL @ $C02B ;RW ROM bank select
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CHARROM @ $C02C ;R addr for character ROM test
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SLTROMSEL @ $C02D ;RW slot vs. ROM selection
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VERTCNT @ $C02E ;R read video counter bits (V5-VB)
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HORIZCNT @ $C02F ;R read video counter bits (VA-H0)
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SPKR @ $C030 ;RW toggle speaker
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DISKREG @ $C031 ;RW disk interface
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SCANINT @ $C032 ;W VGC interrupt clear
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CLOCKDATA @ $C033 ;RW battery RAM interface
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CLOCKCTL @ $C034 ;RW bits 0-3 = border color
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SHADOW @ $C035 ;RW inhibit shadowing
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CYAREG @ $C036 ;RW Configure Your Apple
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DMAREG @ $C037 ;RW
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SCCBREG @ $C038 ;RW SCC command channel B
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SCCAREG @ $C039 ;RW SCC command channel A
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SCCBDATA @ $C03A ;RW SCC data channel B
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SCCADATA @ $C03B ;RW SCC data channel A
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SOUNDCTL @ $C03C ;RW sound settings (0-3=volume)
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SOUNDDATA @ $C03D ;RW sound data
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SOUNDADRL @ $C03E ;RW low pointer
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SOUNDADRH @ $C03F ;RW high pointer
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STROBE @ $C040 ;R game I/O strobe
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INTEN @ $C041 ;RW read VBL interrupt
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MMDELTAX @ $C044 ;R mouse delta movement X
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MMDELTAY @ $C045 ;R mouse delta movement Y
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DIAGTYPE @ $C046 ;W self-test diagnostics
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CLRVBLINT @ $C047 ;W clear VBL interrupt
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CLRXYINT @ $C048 ;W clear XY interrupt
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EMUBYTE @ $C04F ;RW used by emulators to identify themselves
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TXTCLR @ $C050 ;RW display graphics
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TXTSET @ $C051 ;RW display text
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MIXCLR @ $C052 ;RW display full screen
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MIXSET @ $C053 ;RW display split screen
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TXTPAGE1 @ $C054 ;RW display page 1
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TXTPAGE2 @ $C055 ;RW display page 2 (or read/write aux mem)
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LORES @ $C056 ;RW display lo-res graphics
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HIRES @ $C057 ;RW display hi-res graphics
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SETAN0 @ $C058 ;RW annunciator 0 off
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CLRAN0 @ $C059 ;RW annunciator 0 on
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SETAN1 @ $C05A ;RW annunciator 1 off
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CLRAN1 @ $C05B ;RW annunciator 1 on
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SETAN2 @ $C05C ;RW annunciator 2 off
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CLRAN2 @ $C05D ;RW annunciator 2 on
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SETAN3 @ $C05E ;RW annunciator 3 off
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SETDHIRES = $C05E ;W if IOUDIS set, turn on double hi-res
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CLRAN3 @ $C05F ;RW annunciator 3 on
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CLRDHIRES = $C05F ;W if IOUDIS set, turn off double hi-res
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TAPEIN @ $C060 ;R read cassette input
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BUTN3 = $C060 ;R switch input 3
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BUTN0 @ $C061 ;R switch input 0 / open-apple
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BUTN1 @ $C062 ;R switch input 1 / closed-apple
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BUTN2 @ $C063 ;R switch input 2 / shift key
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PADDL0 @ $C064 ;R analog input 0
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PADDL1 @ $C065 ;R analog input 1
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PADDL2 @ $C066 ;R analog input 2
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PADDL3 @ $C067 ;R analog input 3
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STATEREG @ $C068 ;RW address state
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TESTREG @ $C06D ;test mode
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CLTRM @ $C06E ;clear test mode
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ENTM @ $C06F ;enable test mode
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PTRIG @ $C070 ;RW analog input reset
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RDIOUDIS < $C07E ;R status of IOU disabling
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SETIOUDIS > $C07E ;W disable IOU
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RDDHIRES < $C07F ;R status of double hi-res
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CLRIOUDIS > $C07F ;W enable IOU
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; $C080 ;RW read RAM bank 2, write off
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ROMIN @ $C081 ;RWx2 read ROM, write RAM bank 2
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ROMIN_RO @ $C082 ;RW read ROM, no write
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LCBANK2 @ $C083 ;RWx2 read/write RAM bank 2
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; C084-C087 repeats
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; $C088 ;RW read RAM bank 1, write off
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; $C089 ;RW read ROM, write RAM bank 1
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; $C08A ;RW read ROM, no write
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LCBANK1 @ $C08B ;RWx2 read/write RAM bank 1
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; C08C-C08F repeats
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CLRROM @ $CFFF ;disable slot C8 ROM
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; Disk ][ I/O locations.
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;
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; A few things hard-code slot 6 for disk access, in which case
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; these will work. In most cases code uses something like
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; "LDA $C088,X", which clashes with the slot 0 definitions. We
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; define these for slot 6 to get the symbols defined in a way that
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; is unlikely to clash, allowing them to be manually set for values
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; in the C08x range.
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IWM_PH0_OFF @ $C0E0 ;IWM phase 0 off
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IWM_PH0_ON @ $C0E1 ;IWM phase 0 on
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IWM_PH1_OFF @ $C0E2 ;IWM phase 1 off
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IWM_PH1_ON @ $C0E3 ;IWM phase 1 on
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IWM_PH2_OFF @ $C0E4 ;IWM phase 2 off
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IWM_PH2_ON @ $C0E5 ;IWM phase 2 on
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IWM_PH3_OFF @ $C0E6 ;IWM phase 3 off
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IWM_PH3_ON @ $C0E7 ;IWM phase 3 on
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IWM_MOTOR_OFF @ $C0E8 ;IWM motor off
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IWM_MOTOR_ON @ $C0E9 ;IWM motor on
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IWM_DRIVE_1 @ $C0EA ;IWM select drive 1
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IWM_DRIVE_2 @ $C0EB ;IWM select drive 2
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IWM_Q6_OFF @ $C0EC ;read
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IWM_Q6_ON @ $C0ED ;WP-sense
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IWM_Q7_OFF @ $C0EE ;WP-sense/read
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IWM_Q7_ON @ $C0EF ;write
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; Not strictly I/O locations, but they're in the neighborhood.
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ROM_AUXMOVE @ $C311
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ROM_XFER @ $C314
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;
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; I/O scratchpad RAM addresses
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;
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; Each slot has 8 bytes of storage available in the "screen holes" in
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; text page 1. See Apple II Reference Manual table page 83,
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; "Peripheral Slot Scratchpad RAM", and
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; https://retrocomputing.stackexchange.com/a/2541/56
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;
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; Slot number:
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; * 1 2 3 4 5 6 7
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; $0478 $0479 $047A $047B $047C $047D $047E $047F
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; $04F8 $04F9 $04FA $04FB $04FC $04FD $04FE $04FF
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; $0578 $0579 $057A $057B $057C $057D $057E $057F
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; $05F8 $05F9 $05FA $05FB $05FC $05FD $0SFE $05FF
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; $0678 $0679 $067A $067B $067C $067D $067E $067F
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; $06F8 $06F9 $06FA $06FB $06FC $06FD $06FE $06FF
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; $0778 $0779 $077A $077B $077C $077D $077E $077F
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; $07F8 $07F9 $07FA $07FB $07FC $07FD $07FE $07FF
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;
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; The slot 0 holes are shared among peripheral cards and the operating
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; system, e.g. DOS puts the slot number of the peripheral card from
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; which it was booted into $5F8.
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;
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SCRNHOLE0 @ $0478 8 ;text page 1 screen holes
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SCRNHOLE1 @ $04F8 8 ;text page 1 screen holes
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SCRNHOLE2 @ $0578 8 ;text page 1 screen holes
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SCRNHOLE3 @ $05F8 8 ;text page 1 screen holes
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SCRNHOLE4 @ $0678 8 ;text page 1 screen holes
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SCRNHOLE5 @ $06F8 8 ;text page 1 screen holes
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SCRNHOLE6 @ $0778 8 ;text page 1 screen holes
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SCRNHOLE7 @ $07F8 8 ;text page 1 screen holes
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ACTV_PERIP_SLOT @ $07F8 ;slot num ($Cn) of active peripheral card
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