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6502bench/SourceGen/SGTestData/Expected/20260-pre-labels_64tass.S
Andy McFadden 0ac0686c7a ORG rework, part 9
Modified "jump to" code to understand address range start/end lines.
If there are multiple starts or ends at the same offset, we jump to
the first one in the set, which is suboptimal but simpler to do.
Simplified the API, embedding GoToMode in the Location object (which
is where it really needs to be, to make fwd/back work right).

Updated HTML export to grey out addresses in NON_ADDR sections.

Changed default pseudo-op strings for address regions to ".addrs" and
".adrend", after trying a bunch of things that were worse.  Added
definitions for region-end pseudo-ops to Merlin32 and cc65 for display
on screen.

Added regression test 20260 for address region pre-labels.

Fixed handling of leading underscores in platform/project symbols.
These need to be escaped in 64tass output.  Updated regression test
20170-external-symbols to check it.
2021-10-07 12:39:30 -07:00

77 lines
1.2 KiB
ArmAsm

.cpu "6502"
zzz = $103b
* = $1000
begin bit begin
nop
nop
nop
jmp part2
.logical $2000
part2 bit part2
nop
lda _local1
lda local2
lda local4
nop
nop
nop
bit b4_part3
jmp part3
_local1 .byte $81
local2 .byte $82
b4_part3
.logical $3000
part3 bit part3
nop
lda local2
lda _local3
lda local4
nop
nop
nop
bit X_b4_part4
jmp part4
_local3 .byte $83
local4 .byte $84
.here
.here
.logical $4000
b4_part4a
.logical $5000
X_b4_part4
.logical $6000
part4 bit part4
bit X_b4_part4
nop
nop
nop
jmp part4a
.here
part4a bit part4a
bit b4_part4a
jsr part4b
.here
.byte $00
part4b bit part4b
bit zzz
jmp _LF000
.here
.logical $f000
_LF000 nop
bne $f003
.here
.logical $0000
.byte $ea
.byte $00
.here