mirror of
https://github.com/fadden/6502bench.git
synced 2024-12-02 13:51:36 +00:00
3ff0fbae34
The regression tests were written with the assumption that all cross assemblers would support 6502, 65C02, and 65816 code. There are a few that support 65816 partially (e.g. ACME) or not at all. To best support these, we need to split some of the tests into pieces, so that important 6502 tests aren't skipped simply because parts of the test also exercise 65816 code. The first step is to change the regression test naming scheme. The old system used 1xxx for tests without project files, and 2xxx for tests with project files. The new system uses 1xxxN / 2xxxN, where N indicates the CPU type: 0 for 6502, 1 for 65C02, and 2 for 65816. For the 1xxxN tests the new value determines which CPU is used, which allows us to move the "allops" 6502/65C02 tests into the no-project category. For 2xxxN it just allows the 6502 and 65816 versions to have the same base name and number. This change updates the first batch of tests. It involves minor changes to the test harness and a whole bunch of renaming.
276 lines
5.4 KiB
ArmAsm
276 lines
5.4 KiB
ArmAsm
.cpu "65c02"
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* = $1000
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jsr L1014
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jsr L108A
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jsr L10C4
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jsr L10D8
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jsr L10F6
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nop
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nop
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nop
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brk
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.byte $00
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L1014 ora ($00,x)
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.byte $02,$00
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.byte $03
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tsb $00
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ora $00
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asl $00
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.byte $07
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php
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ora #$00
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asl a
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.byte $0b
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tsb @w$0000
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ora @w$0000
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asl @w$0000
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.byte $0f
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bpl _L1031
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_L1031 ora ($00),y
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ora ($00)
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.byte $13
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trb $00
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ora $00,x
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asl $00,x
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.byte $17
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clc
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ora $0000,y
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inc a
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.byte $1b
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trb @w$0000
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ora @w$0000,x
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asl @w$0000,x
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.byte $1f
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jsr $0000
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and ($00,x)
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.byte $22,$00
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.byte $23
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bit $00
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and $00
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rol $00
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.byte $27
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plp
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and #$00
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rol a
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.byte $2b
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bit @w$0000
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and @w$0000
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rol @w$0000
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.byte $2f
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bmi _L106D
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_L106D and ($00),y
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and ($00)
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.byte $33
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bit $00,x
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and $00,x
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rol $00,x
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.byte $37
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sec
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and $0000,y
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dec a
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.byte $3b
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bit @w$0000,x
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and @w$0000,x
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rol @w$0000,x
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.byte $3f
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rti
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L108A eor ($00,x)
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.byte $42,$00
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.byte $43
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.byte $44,$00
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eor $00
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lsr $00
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.byte $47
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pha
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eor #$00
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lsr a
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.byte $4b
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jmp _L109E
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_L109E eor @w$0000
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lsr @w$0000
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.byte $4f
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bvc _L10A7
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_L10A7 eor ($00),y
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eor ($00)
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.byte $53
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.byte $54,$00
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eor $00,x
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lsr $00,x
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.byte $57
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cli
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eor $0000,y
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phy
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.byte $5b
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.byte $5c,$00,$00
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eor @w$0000,x
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lsr @w$0000,x
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.byte $5f
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rts
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L10C4 adc ($00,x)
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.byte $62,$00
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.byte $63
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stz $00
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adc $00
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ror $00
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.byte $67
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pla
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adc #$00
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ror a
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.byte $6b
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jmp ($0000)
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L10D8 adc @w$0000
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ror @w$0000
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.byte $6f
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bvs _L10E1
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_L10E1 adc ($00),y
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adc ($00)
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.byte $73
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stz $00,x
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adc $00,x
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ror $00,x
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.byte $77
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sei
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adc $0000,y
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ply
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.byte $7b
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jmp ($0000,x)
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L10F6 adc @w$0000,x
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ror @w$0000,x
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.byte $7f
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bra _L10FF
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_L10FF sta ($00,x)
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.byte $82,$00
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.byte $83
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sty $00
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sta $00
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stx $00
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.byte $87
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dey
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bit #$00
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txa
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.byte $8b
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sty @w$0000
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sta @w$0000
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stx @w$0000
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.byte $8f
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bcc _L111C
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_L111C sta ($00),y
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sta ($00)
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.byte $93
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sty $00,x
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sta $00,x
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stx $00,y
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.byte $97
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tya
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sta $0000,y
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txs
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.byte $9b
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stz @w$0000
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sta @w$0000,x
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stz @w$0000,x
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.byte $9f
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ldy #$00
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lda ($00,x)
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ldx #$00
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.byte $a3
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ldy $00
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lda $00
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ldx $00
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.byte $a7
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tay
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lda #$00
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tax
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.byte $ab
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ldy @w$0000
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lda @w$0000
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ldx @w$0000
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.byte $af
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bcs _L1157
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_L1157 lda ($00),y
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lda ($00)
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.byte $b3
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ldy $00,x
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lda $00,x
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ldx $00,y
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.byte $b7
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clv
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lda $0000,y
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tsx
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.byte $bb
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ldy @w$0000,x
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lda @w$0000,x
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ldx @w$0000,y
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.byte $bf
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cpy #$00
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cmp ($00,x)
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.byte $c2,$00
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.byte $c3
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cpy $00
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cmp $00
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dec $00
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.byte $c7
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iny
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cmp #$00
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dex
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.byte $cb
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cpy @w$0000
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cmp @w$0000
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dec @w$0000
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.byte $cf
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bne _L1192
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_L1192 cmp ($00),y
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cmp ($00)
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.byte $d3
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.byte $d4,$00
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cmp $00,x
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dec $00,x
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.byte $d7
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cld
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cmp $0000,y
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phx
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.byte $db
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.byte $dc,$00,$00
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cmp @w$0000,x
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dec @w$0000,x
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.byte $df
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cpx #$00
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sbc ($00,x)
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.byte $e2,$00
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.byte $e3
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cpx $00
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sbc $00
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inc $00
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.byte $e7
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inx
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sbc #$00
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nop
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.byte $eb
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cpx @w$0000
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sbc @w$0000
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inc @w$0000
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.byte $ef
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beq _L11CD
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_L11CD sbc ($00),y
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sbc ($00)
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.byte $f3
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.byte $f4,$00
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sbc $00,x
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inc $00,x
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.byte $f7
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sed
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sbc $0000,y
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plx
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.byte $fb
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.byte $fc,$00,$00
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sbc @w$0000,x
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inc @w$0000,x
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.byte $ff
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