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6502bench/SourceGen/SGTestData/Expected/20050-branches-and-banks_cc65.S
Andy McFadden 39b7b20144 ORG rework, part 1
This is the first step toward changing the address region map from a
linear list to a hierarchy.  See issue #107 for the plan.

The AddressMap class has been rewritten to support the new approach.
The rest of the project has been updated to conform to the new API,
but feature-wise is unchanged.  While the map class supports
nested regions with explicit lengths, the rest of the application
still assumes a series of non-overlapping regions with "floating"
lengths.

The Set Address dialog is currently non-functional.

All of the output for cc65 changed because generation of segment
comments has been removed.  Some of the output for ACME changed as
well, because we no longer follow "* = addr" with a redundant
pseudopc statement.  ACME and 65tass have similar approaches to
placing things in memory, and so now have similar implementations.
2021-09-16 17:02:19 -07:00

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561 B
ArmAsm

.setcpu "6502"
.org $1000
jmp L0000
.org $0000
L0000: bit a:L0000
L0003: lda L0000
lda L0003
.byte $d0,$ba
.byte $30,$b8
bvs L0012
bvc L0080
lodat: .byte $00
.byte $01
.byte $02
L0012: lda lodat+1
clc
.byte $90,$a9
.org $0080
L0080: bit a:L0080
jmp LFFC6
.org $ffc0
LFFC0: bit LFFC0
LFFC3: clc
.byte $90,$3d
LFFC6: rts